2 * Copyright (c) 2015-2016 Svatopluk Kraus
3 * Copyright (c) 2015-2016 Michal Meloun
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
30 * New-style Interrupt Framework
32 * TODO: - add support for disconnected PICs.
33 * - to support IPI (PPI) enabling on other CPUs if already started.
34 * - to complete things for removable PICs.
38 #include "opt_hwpmc_hooks.h"
39 #include "opt_iommu.h"
41 #include <sys/param.h>
42 #include <sys/systm.h>
44 #include <sys/bitstring.h>
47 #include <sys/cpuset.h>
48 #include <sys/interrupt.h>
49 #include <sys/kernel.h>
51 #include <sys/malloc.h>
52 #include <sys/mutex.h>
54 #include <sys/queue.h>
56 #include <sys/sched.h>
58 #include <sys/sysctl.h>
59 #include <sys/syslog.h>
60 #include <sys/taskqueue.h>
62 #include <sys/vmmeter.h>
64 #include <sys/pmckern.h>
67 #include <machine/atomic.h>
68 #include <machine/cpu.h>
69 #include <machine/intr.h>
70 #include <machine/smp.h>
71 #include <machine/stdarg.h>
78 #include <dev/iommu/iommu_msi.h>
84 #define INTRNAME_LEN (2*MAXCOMLEN + 1)
87 #define debugf(fmt, args...) do { printf("%s(): ", __func__); \
88 printf(fmt,##args); } while (0)
90 #define debugf(fmt, args...)
93 MALLOC_DECLARE(M_INTRNG);
94 MALLOC_DEFINE(M_INTRNG, "intr", "intr interrupt handling");
96 /* Main interrupt handler called from assembler -> 'hidden' for C code. */
97 void intr_irq_handler(struct trapframe *tf);
99 /* Root interrupt controller stuff. */
100 device_t intr_irq_root_dev;
101 static intr_irq_filter_t *irq_root_filter;
102 static void *irq_root_arg;
103 static u_int irq_root_ipicount;
105 struct intr_pic_child {
106 SLIST_ENTRY(intr_pic_child) pc_next;
107 struct intr_pic *pc_pic;
108 intr_child_irq_filter_t *pc_filter;
114 /* Interrupt controller definition. */
116 SLIST_ENTRY(intr_pic) pic_next;
117 intptr_t pic_xref; /* hardware identification */
119 /* Only one of FLAG_PIC or FLAG_MSI may be set */
120 #define FLAG_PIC (1 << 0)
121 #define FLAG_MSI (1 << 1)
122 #define FLAG_TYPE_MASK (FLAG_PIC | FLAG_MSI)
124 struct mtx pic_child_lock;
125 SLIST_HEAD(, intr_pic_child) pic_children;
128 static struct mtx pic_list_lock;
129 static SLIST_HEAD(, intr_pic) pic_list;
131 static struct intr_pic *pic_lookup(device_t dev, intptr_t xref, int flags);
133 /* Interrupt source definition. */
134 static struct mtx isrc_table_lock;
135 static struct intr_irqsrc **irq_sources;
136 static u_int irq_next_free;
139 #ifdef EARLY_AP_STARTUP
140 static bool irq_assign_cpu = true;
142 static bool irq_assign_cpu = false;
146 u_int intr_nirq = NIRQ;
147 SYSCTL_UINT(_machdep, OID_AUTO, nirq, CTLFLAG_RDTUN, &intr_nirq, 0,
150 /* Data for MI statistics reporting. */
156 static bitstr_t *intrcnt_bitmap;
158 static struct intr_irqsrc *intr_map_get_isrc(u_int res_id);
159 static void intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc);
160 static struct intr_map_data * intr_map_get_map_data(u_int res_id);
161 static void intr_map_copy_map_data(u_int res_id, device_t *dev, intptr_t *xref,
162 struct intr_map_data **data);
165 * Interrupt framework initialization routine.
168 intr_irq_init(void *dummy __unused)
171 SLIST_INIT(&pic_list);
172 mtx_init(&pic_list_lock, "intr pic list", NULL, MTX_DEF);
174 mtx_init(&isrc_table_lock, "intr isrc table", NULL, MTX_DEF);
177 * - 2 counters for each I/O interrupt.
178 * - mp_maxid + 1 counters for each IPI counters for SMP.
180 nintrcnt = intr_nirq * 2;
182 nintrcnt += INTR_IPI_COUNT * (mp_maxid + 1);
185 intrcnt = mallocarray(nintrcnt, sizeof(u_long), M_INTRNG,
187 intrnames = mallocarray(nintrcnt, INTRNAME_LEN, M_INTRNG,
189 sintrcnt = nintrcnt * sizeof(u_long);
190 sintrnames = nintrcnt * INTRNAME_LEN;
192 /* Allocate the bitmap tracking counter allocations. */
193 intrcnt_bitmap = bit_alloc(nintrcnt, M_INTRNG, M_WAITOK | M_ZERO);
195 irq_sources = mallocarray(intr_nirq, sizeof(struct intr_irqsrc*),
196 M_INTRNG, M_WAITOK | M_ZERO);
198 SYSINIT(intr_irq_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_irq_init, NULL);
201 intrcnt_setname(const char *name, int index)
204 snprintf(intrnames + INTRNAME_LEN * index, INTRNAME_LEN, "%-*s",
205 INTRNAME_LEN - 1, name);
209 * Update name for interrupt source with interrupt event.
212 intrcnt_updatename(struct intr_irqsrc *isrc)
215 /* QQQ: What about stray counter name? */
216 mtx_assert(&isrc_table_lock, MA_OWNED);
217 intrcnt_setname(isrc->isrc_event->ie_fullname, isrc->isrc_index);
221 * Virtualization for interrupt source interrupt counter increment.
224 isrc_increment_count(struct intr_irqsrc *isrc)
227 if (isrc->isrc_flags & INTR_ISRCF_PPI)
228 atomic_add_long(&isrc->isrc_count[0], 1);
230 isrc->isrc_count[0]++;
234 * Virtualization for interrupt source interrupt stray counter increment.
237 isrc_increment_straycount(struct intr_irqsrc *isrc)
240 isrc->isrc_count[1]++;
244 * Virtualization for interrupt source interrupt name update.
247 isrc_update_name(struct intr_irqsrc *isrc, const char *name)
249 char str[INTRNAME_LEN];
251 mtx_assert(&isrc_table_lock, MA_OWNED);
254 snprintf(str, INTRNAME_LEN, "%s: %s", isrc->isrc_name, name);
255 intrcnt_setname(str, isrc->isrc_index);
256 snprintf(str, INTRNAME_LEN, "stray %s: %s", isrc->isrc_name,
258 intrcnt_setname(str, isrc->isrc_index + 1);
260 snprintf(str, INTRNAME_LEN, "%s:", isrc->isrc_name);
261 intrcnt_setname(str, isrc->isrc_index);
262 snprintf(str, INTRNAME_LEN, "stray %s:", isrc->isrc_name);
263 intrcnt_setname(str, isrc->isrc_index + 1);
268 * Virtualization for interrupt source interrupt counters setup.
271 isrc_setup_counters(struct intr_irqsrc *isrc)
275 mtx_assert(&isrc_table_lock, MA_OWNED);
278 * Allocate two counter values, the second tracking "stray" interrupts.
280 bit_ffc_area(intrcnt_bitmap, nintrcnt, 2, &index);
282 panic("Failed to allocate 2 counters. Array exhausted?");
283 bit_nset(intrcnt_bitmap, index, index + 1);
284 isrc->isrc_index = index;
285 isrc->isrc_count = &intrcnt[index];
286 isrc_update_name(isrc, NULL);
290 * Virtualization for interrupt source interrupt counters release.
293 isrc_release_counters(struct intr_irqsrc *isrc)
295 int idx = isrc->isrc_index;
297 mtx_assert(&isrc_table_lock, MA_OWNED);
299 bit_nclear(intrcnt_bitmap, idx, idx + 1);
304 * Virtualization for interrupt source IPI counters setup.
307 intr_ipi_setup_counters(const char *name)
310 char str[INTRNAME_LEN];
312 mtx_lock(&isrc_table_lock);
315 * We should never have a problem finding mp_maxid + 1 contiguous
316 * counters, in practice. Interrupts will be allocated sequentially
317 * during boot, so the array should fill from low to high index. Once
318 * reserved, the IPI counters will never be released. Similarly, we
319 * will not need to allocate more IPIs once the system is running.
321 bit_ffc_area(intrcnt_bitmap, nintrcnt, mp_maxid + 1, &index);
323 panic("Failed to allocate %d counters. Array exhausted?",
325 bit_nset(intrcnt_bitmap, index, index + mp_maxid);
326 for (i = 0; i < mp_maxid + 1; i++) {
327 snprintf(str, INTRNAME_LEN, "cpu%d:%s", i, name);
328 intrcnt_setname(str, index + i);
330 mtx_unlock(&isrc_table_lock);
331 return (&intrcnt[index]);
336 * Main interrupt dispatch handler. It's called straight
337 * from the assembler, where CPU interrupt is served.
340 intr_irq_handler(struct trapframe *tf)
342 struct trapframe * oldframe;
345 KASSERT(irq_root_filter != NULL, ("%s: no filter", __func__));
347 kasan_mark(tf, sizeof(*tf), sizeof(*tf), 0);
352 oldframe = td->td_intr_frame;
353 td->td_intr_frame = tf;
354 irq_root_filter(irq_root_arg);
355 td->td_intr_frame = oldframe;
358 if (pmc_hook && TRAPF_USERMODE(tf) &&
359 (PCPU_GET(curthread)->td_pflags & TDP_CALLCHAIN))
360 pmc_hook(PCPU_GET(curthread), PMC_FN_USER_CALLCHAIN, tf);
365 intr_child_irq_handler(struct intr_pic *parent, uintptr_t irq)
367 struct intr_pic_child *child;
371 mtx_lock_spin(&parent->pic_child_lock);
372 SLIST_FOREACH(child, &parent->pic_children, pc_next) {
373 if (child->pc_start <= irq &&
374 irq < (child->pc_start + child->pc_length)) {
379 mtx_unlock_spin(&parent->pic_child_lock);
382 return (child->pc_filter(child->pc_filter_arg, irq));
384 return (FILTER_STRAY);
388 * interrupt controller dispatch function for interrupts. It should
389 * be called straight from the interrupt controller, when associated interrupt
393 intr_isrc_dispatch(struct intr_irqsrc *isrc, struct trapframe *tf)
396 KASSERT(isrc != NULL, ("%s: no source", __func__));
398 isrc_increment_count(isrc);
401 if (isrc->isrc_filter != NULL) {
403 error = isrc->isrc_filter(isrc->isrc_arg, tf);
404 PIC_POST_FILTER(isrc->isrc_dev, isrc);
405 if (error == FILTER_HANDLED)
409 if (isrc->isrc_event != NULL) {
410 if (intr_event_handle(isrc->isrc_event, tf) == 0)
414 isrc_increment_straycount(isrc);
419 * Alloc unique interrupt number (resource handle) for interrupt source.
421 * There could be various strategies how to allocate free interrupt number
422 * (resource handle) for new interrupt source.
424 * 1. Handles are always allocated forward, so handles are not recycled
425 * immediately. However, if only one free handle left which is reused
429 isrc_alloc_irq(struct intr_irqsrc *isrc)
433 mtx_assert(&isrc_table_lock, MA_OWNED);
435 if (irq_next_free >= intr_nirq)
438 for (irq = irq_next_free; irq < intr_nirq; irq++) {
439 if (irq_sources[irq] == NULL)
442 for (irq = 0; irq < irq_next_free; irq++) {
443 if (irq_sources[irq] == NULL)
447 irq_next_free = intr_nirq;
451 isrc->isrc_irq = irq;
452 irq_sources[irq] = isrc;
454 irq_next_free = irq + 1;
455 if (irq_next_free >= intr_nirq)
461 * Free unique interrupt number (resource handle) from interrupt source.
464 isrc_free_irq(struct intr_irqsrc *isrc)
467 mtx_assert(&isrc_table_lock, MA_OWNED);
469 if (isrc->isrc_irq >= intr_nirq)
471 if (irq_sources[isrc->isrc_irq] != isrc)
474 irq_sources[isrc->isrc_irq] = NULL;
475 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
478 * If we are recovering from the state irq_sources table is full,
479 * then the following allocation should check the entire table. This
480 * will ensure maximum separation of allocation order from release
483 if (irq_next_free >= intr_nirq)
490 * Initialize interrupt source and register it into global interrupt table.
493 intr_isrc_register(struct intr_irqsrc *isrc, device_t dev, u_int flags,
494 const char *fmt, ...)
499 bzero(isrc, sizeof(struct intr_irqsrc));
500 isrc->isrc_dev = dev;
501 isrc->isrc_irq = INTR_IRQ_INVALID; /* just to be safe */
502 isrc->isrc_flags = flags;
505 vsnprintf(isrc->isrc_name, INTR_ISRC_NAMELEN, fmt, ap);
508 mtx_lock(&isrc_table_lock);
509 error = isrc_alloc_irq(isrc);
511 mtx_unlock(&isrc_table_lock);
515 * Setup interrupt counters, but not for IPI sources. Those are setup
516 * later and only for used ones (up to INTR_IPI_COUNT) to not exhaust
519 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
520 isrc_setup_counters(isrc);
521 mtx_unlock(&isrc_table_lock);
526 * Deregister interrupt source from global interrupt table.
529 intr_isrc_deregister(struct intr_irqsrc *isrc)
533 mtx_lock(&isrc_table_lock);
534 if ((isrc->isrc_flags & INTR_ISRCF_IPI) == 0)
535 isrc_release_counters(isrc);
536 error = isrc_free_irq(isrc);
537 mtx_unlock(&isrc_table_lock);
543 * A support function for a PIC to decide if provided ISRC should be inited
544 * on given cpu. The logic of INTR_ISRCF_BOUND flag and isrc_cpu member of
545 * struct intr_irqsrc is the following:
547 * If INTR_ISRCF_BOUND is set, the ISRC should be inited only on cpus
548 * set in isrc_cpu. If not, the ISRC should be inited on every cpu and
549 * isrc_cpu is kept consistent with it. Thus isrc_cpu is always correct.
552 intr_isrc_init_on_cpu(struct intr_irqsrc *isrc, u_int cpu)
555 if (isrc->isrc_handlers == 0)
557 if ((isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI)) == 0)
559 if (isrc->isrc_flags & INTR_ISRCF_BOUND)
560 return (CPU_ISSET(cpu, &isrc->isrc_cpu));
562 CPU_SET(cpu, &isrc->isrc_cpu);
569 * Setup filter into interrupt source.
572 iscr_setup_filter(struct intr_irqsrc *isrc, const char *name,
573 intr_irq_filter_t *filter, void *arg, void **cookiep)
579 mtx_lock(&isrc_table_lock);
581 * Make sure that we do not mix the two ways
582 * how we handle interrupt sources.
584 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
585 mtx_unlock(&isrc_table_lock);
588 isrc->isrc_filter = filter;
589 isrc->isrc_arg = arg;
590 isrc_update_name(isrc, name);
591 mtx_unlock(&isrc_table_lock);
599 * Interrupt source pre_ithread method for MI interrupt framework.
602 intr_isrc_pre_ithread(void *arg)
604 struct intr_irqsrc *isrc = arg;
606 PIC_PRE_ITHREAD(isrc->isrc_dev, isrc);
610 * Interrupt source post_ithread method for MI interrupt framework.
613 intr_isrc_post_ithread(void *arg)
615 struct intr_irqsrc *isrc = arg;
617 PIC_POST_ITHREAD(isrc->isrc_dev, isrc);
621 * Interrupt source post_filter method for MI interrupt framework.
624 intr_isrc_post_filter(void *arg)
626 struct intr_irqsrc *isrc = arg;
628 PIC_POST_FILTER(isrc->isrc_dev, isrc);
632 * Interrupt source assign_cpu method for MI interrupt framework.
635 intr_isrc_assign_cpu(void *arg, int cpu)
638 struct intr_irqsrc *isrc = arg;
641 mtx_lock(&isrc_table_lock);
643 CPU_ZERO(&isrc->isrc_cpu);
644 isrc->isrc_flags &= ~INTR_ISRCF_BOUND;
646 CPU_SETOF(cpu, &isrc->isrc_cpu);
647 isrc->isrc_flags |= INTR_ISRCF_BOUND;
651 * In NOCPU case, it's up to PIC to either leave ISRC on same CPU or
652 * re-balance it to another CPU or enable it on more CPUs. However,
653 * PIC is expected to change isrc_cpu appropriately to keep us well
654 * informed if the call is successful.
656 if (irq_assign_cpu) {
657 error = PIC_BIND_INTR(isrc->isrc_dev, isrc);
659 CPU_ZERO(&isrc->isrc_cpu);
660 mtx_unlock(&isrc_table_lock);
664 mtx_unlock(&isrc_table_lock);
672 * Create interrupt event for interrupt source.
675 isrc_event_create(struct intr_irqsrc *isrc)
677 struct intr_event *ie;
680 error = intr_event_create(&ie, isrc, 0, isrc->isrc_irq,
681 intr_isrc_pre_ithread, intr_isrc_post_ithread, intr_isrc_post_filter,
682 intr_isrc_assign_cpu, "%s:", isrc->isrc_name);
686 mtx_lock(&isrc_table_lock);
688 * Make sure that we do not mix the two ways
689 * how we handle interrupt sources. Let contested event wins.
692 if (isrc->isrc_filter != NULL || isrc->isrc_event != NULL) {
694 if (isrc->isrc_event != NULL) {
696 mtx_unlock(&isrc_table_lock);
697 intr_event_destroy(ie);
698 return (isrc->isrc_event != NULL ? EBUSY : 0);
700 isrc->isrc_event = ie;
701 mtx_unlock(&isrc_table_lock);
707 * Destroy interrupt event for interrupt source.
710 isrc_event_destroy(struct intr_irqsrc *isrc)
712 struct intr_event *ie;
714 mtx_lock(&isrc_table_lock);
715 ie = isrc->isrc_event;
716 isrc->isrc_event = NULL;
717 mtx_unlock(&isrc_table_lock);
720 intr_event_destroy(ie);
724 * Add handler to interrupt source.
727 isrc_add_handler(struct intr_irqsrc *isrc, const char *name,
728 driver_filter_t filter, driver_intr_t handler, void *arg,
729 enum intr_type flags, void **cookiep)
733 if (isrc->isrc_event == NULL) {
734 error = isrc_event_create(isrc);
739 error = intr_event_add_handler(isrc->isrc_event, name, filter, handler,
740 arg, intr_priority(flags), flags, cookiep);
742 mtx_lock(&isrc_table_lock);
743 intrcnt_updatename(isrc);
744 mtx_unlock(&isrc_table_lock);
751 * Lookup interrupt controller locked.
753 static inline struct intr_pic *
754 pic_lookup_locked(device_t dev, intptr_t xref, int flags)
756 struct intr_pic *pic;
758 mtx_assert(&pic_list_lock, MA_OWNED);
760 if (dev == NULL && xref == 0)
763 /* Note that pic->pic_dev is never NULL on registered PIC. */
764 SLIST_FOREACH(pic, &pic_list, pic_next) {
765 if ((pic->pic_flags & FLAG_TYPE_MASK) !=
766 (flags & FLAG_TYPE_MASK))
770 if (xref == pic->pic_xref)
772 } else if (xref == 0 || pic->pic_xref == 0) {
773 if (dev == pic->pic_dev)
775 } else if (xref == pic->pic_xref && dev == pic->pic_dev)
782 * Lookup interrupt controller.
784 static struct intr_pic *
785 pic_lookup(device_t dev, intptr_t xref, int flags)
787 struct intr_pic *pic;
789 mtx_lock(&pic_list_lock);
790 pic = pic_lookup_locked(dev, xref, flags);
791 mtx_unlock(&pic_list_lock);
796 * Create interrupt controller.
798 static struct intr_pic *
799 pic_create(device_t dev, intptr_t xref, int flags)
801 struct intr_pic *pic;
803 mtx_lock(&pic_list_lock);
804 pic = pic_lookup_locked(dev, xref, flags);
806 mtx_unlock(&pic_list_lock);
809 pic = malloc(sizeof(*pic), M_INTRNG, M_NOWAIT | M_ZERO);
811 mtx_unlock(&pic_list_lock);
814 pic->pic_xref = xref;
816 pic->pic_flags = flags;
817 mtx_init(&pic->pic_child_lock, "pic child lock", NULL, MTX_SPIN);
818 SLIST_INSERT_HEAD(&pic_list, pic, pic_next);
819 mtx_unlock(&pic_list_lock);
825 * Destroy interrupt controller.
828 pic_destroy(device_t dev, intptr_t xref, int flags)
830 struct intr_pic *pic;
832 mtx_lock(&pic_list_lock);
833 pic = pic_lookup_locked(dev, xref, flags);
835 mtx_unlock(&pic_list_lock);
838 SLIST_REMOVE(&pic_list, pic, intr_pic, pic_next);
839 mtx_unlock(&pic_list_lock);
845 * Register interrupt controller.
848 intr_pic_register(device_t dev, intptr_t xref)
850 struct intr_pic *pic;
854 pic = pic_create(dev, xref, FLAG_PIC);
858 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
859 device_get_nameunit(dev), dev, (uintmax_t)xref);
864 * Unregister interrupt controller.
867 intr_pic_deregister(device_t dev, intptr_t xref)
870 panic("%s: not implemented", __func__);
874 * Mark interrupt controller (itself) as a root one.
876 * Note that only an interrupt controller can really know its position
877 * in interrupt controller's tree. So root PIC must claim itself as a root.
879 * In FDT case, according to ePAPR approved version 1.1 from 08 April 2011,
881 * "The root of the interrupt tree is determined when traversal
882 * of the interrupt tree reaches an interrupt controller node without
883 * an interrupts property and thus no explicit interrupt parent."
886 intr_pic_claim_root(device_t dev, intptr_t xref, intr_irq_filter_t *filter,
887 void *arg, u_int ipicount)
889 struct intr_pic *pic;
891 pic = pic_lookup(dev, xref, FLAG_PIC);
893 device_printf(dev, "not registered\n");
897 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
898 ("%s: Found a non-PIC controller: %s", __func__,
899 device_get_name(pic->pic_dev)));
901 if (filter == NULL) {
902 device_printf(dev, "filter missing\n");
907 * Only one interrupt controllers could be on the root for now.
908 * Note that we further suppose that there is not threaded interrupt
909 * routine (handler) on the root. See intr_irq_handler().
911 if (intr_irq_root_dev != NULL) {
912 device_printf(dev, "another root already set\n");
916 intr_irq_root_dev = dev;
917 irq_root_filter = filter;
919 irq_root_ipicount = ipicount;
921 debugf("irq root set to %s\n", device_get_nameunit(dev));
926 * Add a handler to manage a sub range of a parents interrupts.
929 intr_pic_add_handler(device_t parent, struct intr_pic *pic,
930 intr_child_irq_filter_t *filter, void *arg, uintptr_t start,
933 struct intr_pic *parent_pic;
934 struct intr_pic_child *newchild;
936 struct intr_pic_child *child;
939 /* Find the parent PIC */
940 parent_pic = pic_lookup(parent, 0, FLAG_PIC);
941 if (parent_pic == NULL)
944 newchild = malloc(sizeof(*newchild), M_INTRNG, M_WAITOK | M_ZERO);
945 newchild->pc_pic = pic;
946 newchild->pc_filter = filter;
947 newchild->pc_filter_arg = arg;
948 newchild->pc_start = start;
949 newchild->pc_length = length;
951 mtx_lock_spin(&parent_pic->pic_child_lock);
953 SLIST_FOREACH(child, &parent_pic->pic_children, pc_next) {
954 KASSERT(child->pc_pic != pic, ("%s: Adding a child PIC twice",
958 SLIST_INSERT_HEAD(&parent_pic->pic_children, newchild, pc_next);
959 mtx_unlock_spin(&parent_pic->pic_child_lock);
965 intr_resolve_irq(device_t dev, intptr_t xref, struct intr_map_data *data,
966 struct intr_irqsrc **isrc)
968 struct intr_pic *pic;
969 struct intr_map_data_msi *msi;
974 pic = pic_lookup(dev, xref,
975 (data->type == INTR_MAP_DATA_MSI) ? FLAG_MSI : FLAG_PIC);
979 switch (data->type) {
980 case INTR_MAP_DATA_MSI:
981 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
982 ("%s: Found a non-MSI controller: %s", __func__,
983 device_get_name(pic->pic_dev)));
984 msi = (struct intr_map_data_msi *)data;
989 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_PIC,
990 ("%s: Found a non-PIC controller: %s", __func__,
991 device_get_name(pic->pic_dev)));
992 return (PIC_MAP_INTR(pic->pic_dev, data, isrc));
997 intr_is_per_cpu(struct resource *res)
1000 struct intr_irqsrc *isrc;
1002 res_id = (u_int)rman_get_start(res);
1003 isrc = intr_map_get_isrc(res_id);
1006 panic("Attempt to get isrc for non-active resource id: %u\n",
1008 return ((isrc->isrc_flags & INTR_ISRCF_PPI) != 0);
1012 intr_activate_irq(device_t dev, struct resource *res)
1016 struct intr_map_data *data;
1017 struct intr_irqsrc *isrc;
1021 KASSERT(rman_get_start(res) == rman_get_end(res),
1022 ("%s: more interrupts in resource", __func__));
1024 res_id = (u_int)rman_get_start(res);
1025 if (intr_map_get_isrc(res_id) != NULL)
1026 panic("Attempt to double activation of resource id: %u\n",
1028 intr_map_copy_map_data(res_id, &map_dev, &map_xref, &data);
1029 error = intr_resolve_irq(map_dev, map_xref, data, &isrc);
1031 free(data, M_INTRNG);
1032 /* XXX TODO DISCONECTED PICs */
1033 /* if (error == EINVAL) return(0); */
1036 intr_map_set_isrc(res_id, isrc);
1037 rman_set_virtual(res, data);
1038 return (PIC_ACTIVATE_INTR(isrc->isrc_dev, isrc, res, data));
1042 intr_deactivate_irq(device_t dev, struct resource *res)
1044 struct intr_map_data *data;
1045 struct intr_irqsrc *isrc;
1049 KASSERT(rman_get_start(res) == rman_get_end(res),
1050 ("%s: more interrupts in resource", __func__));
1052 res_id = (u_int)rman_get_start(res);
1053 isrc = intr_map_get_isrc(res_id);
1055 panic("Attempt to deactivate non-active resource id: %u\n",
1058 data = rman_get_virtual(res);
1059 error = PIC_DEACTIVATE_INTR(isrc->isrc_dev, isrc, res, data);
1060 intr_map_set_isrc(res_id, NULL);
1061 rman_set_virtual(res, NULL);
1062 free(data, M_INTRNG);
1067 intr_setup_irq(device_t dev, struct resource *res, driver_filter_t filt,
1068 driver_intr_t hand, void *arg, int flags, void **cookiep)
1071 struct intr_map_data *data;
1072 struct intr_irqsrc *isrc;
1076 KASSERT(rman_get_start(res) == rman_get_end(res),
1077 ("%s: more interrupts in resource", __func__));
1079 res_id = (u_int)rman_get_start(res);
1080 isrc = intr_map_get_isrc(res_id);
1082 /* XXX TODO DISCONECTED PICs */
1086 data = rman_get_virtual(res);
1087 name = device_get_nameunit(dev);
1091 * Standard handling is done through MI interrupt framework. However,
1092 * some interrupts could request solely own special handling. This
1093 * non standard handling can be used for interrupt controllers without
1094 * handler (filter only), so in case that interrupt controllers are
1095 * chained, MI interrupt framework is called only in leaf controller.
1097 * Note that root interrupt controller routine is served as well,
1098 * however in intr_irq_handler(), i.e. main system dispatch routine.
1100 if (flags & INTR_SOLO && hand != NULL) {
1101 debugf("irq %u cannot solo on %s\n", irq, name);
1105 if (flags & INTR_SOLO) {
1106 error = iscr_setup_filter(isrc, name, (intr_irq_filter_t *)filt,
1108 debugf("irq %u setup filter error %d on %s\n", isrc->isrc_irq, error,
1113 error = isrc_add_handler(isrc, name, filt, hand, arg, flags,
1115 debugf("irq %u add handler error %d on %s\n", isrc->isrc_irq, error, name);
1120 mtx_lock(&isrc_table_lock);
1121 error = PIC_SETUP_INTR(isrc->isrc_dev, isrc, res, data);
1123 isrc->isrc_handlers++;
1124 if (isrc->isrc_handlers == 1)
1125 PIC_ENABLE_INTR(isrc->isrc_dev, isrc);
1127 mtx_unlock(&isrc_table_lock);
1129 intr_event_remove_handler(*cookiep);
1134 intr_teardown_irq(device_t dev, struct resource *res, void *cookie)
1137 struct intr_map_data *data;
1138 struct intr_irqsrc *isrc;
1141 KASSERT(rman_get_start(res) == rman_get_end(res),
1142 ("%s: more interrupts in resource", __func__));
1144 res_id = (u_int)rman_get_start(res);
1145 isrc = intr_map_get_isrc(res_id);
1146 if (isrc == NULL || isrc->isrc_handlers == 0)
1149 data = rman_get_virtual(res);
1152 if (isrc->isrc_filter != NULL) {
1156 mtx_lock(&isrc_table_lock);
1157 isrc->isrc_filter = NULL;
1158 isrc->isrc_arg = NULL;
1159 isrc->isrc_handlers = 0;
1160 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1161 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1162 isrc_update_name(isrc, NULL);
1163 mtx_unlock(&isrc_table_lock);
1167 if (isrc != intr_handler_source(cookie))
1170 error = intr_event_remove_handler(cookie);
1172 mtx_lock(&isrc_table_lock);
1173 isrc->isrc_handlers--;
1174 if (isrc->isrc_handlers == 0)
1175 PIC_DISABLE_INTR(isrc->isrc_dev, isrc);
1176 PIC_TEARDOWN_INTR(isrc->isrc_dev, isrc, res, data);
1177 intrcnt_updatename(isrc);
1178 mtx_unlock(&isrc_table_lock);
1184 intr_describe_irq(device_t dev, struct resource *res, void *cookie,
1188 struct intr_irqsrc *isrc;
1191 KASSERT(rman_get_start(res) == rman_get_end(res),
1192 ("%s: more interrupts in resource", __func__));
1194 res_id = (u_int)rman_get_start(res);
1195 isrc = intr_map_get_isrc(res_id);
1196 if (isrc == NULL || isrc->isrc_handlers == 0)
1199 if (isrc->isrc_filter != NULL) {
1203 mtx_lock(&isrc_table_lock);
1204 isrc_update_name(isrc, descr);
1205 mtx_unlock(&isrc_table_lock);
1209 error = intr_event_describe_handler(isrc->isrc_event, cookie, descr);
1211 mtx_lock(&isrc_table_lock);
1212 intrcnt_updatename(isrc);
1213 mtx_unlock(&isrc_table_lock);
1220 intr_bind_irq(device_t dev, struct resource *res, int cpu)
1222 struct intr_irqsrc *isrc;
1225 KASSERT(rman_get_start(res) == rman_get_end(res),
1226 ("%s: more interrupts in resource", __func__));
1228 res_id = (u_int)rman_get_start(res);
1229 isrc = intr_map_get_isrc(res_id);
1230 if (isrc == NULL || isrc->isrc_handlers == 0)
1233 if (isrc->isrc_filter != NULL)
1234 return (intr_isrc_assign_cpu(isrc, cpu));
1236 return (intr_event_bind(isrc->isrc_event, cpu));
1240 * Return the CPU that the next interrupt source should use.
1241 * For now just returns the next CPU according to round-robin.
1244 intr_irq_next_cpu(u_int last_cpu, cpuset_t *cpumask)
1248 KASSERT(!CPU_EMPTY(cpumask), ("%s: Empty CPU mask", __func__));
1249 if (!irq_assign_cpu || mp_ncpus == 1) {
1250 cpu = PCPU_GET(cpuid);
1252 if (CPU_ISSET(cpu, cpumask))
1255 return (CPU_FFS(cpumask) - 1);
1260 if (last_cpu > mp_maxid)
1262 } while (!CPU_ISSET(last_cpu, cpumask));
1266 #ifndef EARLY_AP_STARTUP
1268 * Distribute all the interrupt sources among the available
1269 * CPUs once the AP's have been launched.
1272 intr_irq_shuffle(void *arg __unused)
1274 struct intr_irqsrc *isrc;
1280 mtx_lock(&isrc_table_lock);
1281 irq_assign_cpu = true;
1282 for (i = 0; i < intr_nirq; i++) {
1283 isrc = irq_sources[i];
1284 if (isrc == NULL || isrc->isrc_handlers == 0 ||
1285 isrc->isrc_flags & (INTR_ISRCF_PPI | INTR_ISRCF_IPI))
1288 if (isrc->isrc_event != NULL &&
1289 isrc->isrc_flags & INTR_ISRCF_BOUND &&
1290 isrc->isrc_event->ie_cpu != CPU_FFS(&isrc->isrc_cpu) - 1)
1291 panic("%s: CPU inconsistency", __func__);
1293 if ((isrc->isrc_flags & INTR_ISRCF_BOUND) == 0)
1294 CPU_ZERO(&isrc->isrc_cpu); /* start again */
1297 * We are in wicked position here if the following call fails
1298 * for bound ISRC. The best thing we can do is to clear
1299 * isrc_cpu so inconsistency with ie_cpu will be detectable.
1301 if (PIC_BIND_INTR(isrc->isrc_dev, isrc) != 0)
1302 CPU_ZERO(&isrc->isrc_cpu);
1304 mtx_unlock(&isrc_table_lock);
1306 SYSINIT(intr_irq_shuffle, SI_SUB_SMP, SI_ORDER_SECOND, intr_irq_shuffle, NULL);
1307 #endif /* !EARLY_AP_STARTUP */
1311 intr_irq_next_cpu(u_int current_cpu, cpuset_t *cpumask)
1314 return (PCPU_GET(cpuid));
1319 * Allocate memory for new intr_map_data structure.
1320 * Initialize common fields.
1322 struct intr_map_data *
1323 intr_alloc_map_data(enum intr_map_data_type type, size_t len, int flags)
1325 struct intr_map_data *data;
1327 data = malloc(len, M_INTRNG, flags);
1333 void intr_free_intr_map_data(struct intr_map_data *data)
1336 free(data, M_INTRNG);
1340 * Register a MSI/MSI-X interrupt controller
1343 intr_msi_register(device_t dev, intptr_t xref)
1345 struct intr_pic *pic;
1349 pic = pic_create(dev, xref, FLAG_MSI);
1353 debugf("PIC %p registered for %s <dev %p, xref %jx>\n", pic,
1354 device_get_nameunit(dev), dev, (uintmax_t)xref);
1359 intr_alloc_msi(device_t pci, device_t child, intptr_t xref, int count,
1360 int maxcount, int *irqs)
1362 struct iommu_domain *domain;
1363 struct intr_irqsrc **isrc;
1364 struct intr_pic *pic;
1366 struct intr_map_data_msi *msi;
1369 pic = pic_lookup(NULL, xref, FLAG_MSI);
1373 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1374 ("%s: Found a non-MSI controller: %s", __func__,
1375 device_get_name(pic->pic_dev)));
1378 * If this is the first time we have used this context ask the
1379 * interrupt controller to map memory the msi source will need.
1381 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1385 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1386 err = MSI_ALLOC_MSI(pic->pic_dev, child, count, maxcount, &pdev, isrc);
1388 free(isrc, M_INTRNG);
1392 for (i = 0; i < count; i++) {
1393 isrc[i]->isrc_iommu = domain;
1394 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1395 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1396 msi-> isrc = isrc[i];
1398 irqs[i] = intr_map_irq(pic->pic_dev, xref,
1399 (struct intr_map_data *)msi);
1401 free(isrc, M_INTRNG);
1407 intr_release_msi(device_t pci, device_t child, intptr_t xref, int count,
1410 struct intr_irqsrc **isrc;
1411 struct intr_pic *pic;
1412 struct intr_map_data_msi *msi;
1415 pic = pic_lookup(NULL, xref, FLAG_MSI);
1419 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1420 ("%s: Found a non-MSI controller: %s", __func__,
1421 device_get_name(pic->pic_dev)));
1423 isrc = malloc(sizeof(*isrc) * count, M_INTRNG, M_WAITOK);
1425 for (i = 0; i < count; i++) {
1426 msi = (struct intr_map_data_msi *)
1427 intr_map_get_map_data(irqs[i]);
1428 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1429 ("%s: irq %d map data is not MSI", __func__,
1431 isrc[i] = msi->isrc;
1434 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1436 err = MSI_RELEASE_MSI(pic->pic_dev, child, count, isrc);
1438 for (i = 0; i < count; i++) {
1439 if (isrc[i] != NULL)
1440 intr_unmap_irq(irqs[i]);
1443 free(isrc, M_INTRNG);
1448 intr_alloc_msix(device_t pci, device_t child, intptr_t xref, int *irq)
1450 struct iommu_domain *domain;
1451 struct intr_irqsrc *isrc;
1452 struct intr_pic *pic;
1454 struct intr_map_data_msi *msi;
1457 pic = pic_lookup(NULL, xref, FLAG_MSI);
1461 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1462 ("%s: Found a non-MSI controller: %s", __func__,
1463 device_get_name(pic->pic_dev)));
1466 * If this is the first time we have used this context ask the
1467 * interrupt controller to map memory the msi source will need.
1469 err = MSI_IOMMU_INIT(pic->pic_dev, child, &domain);
1473 err = MSI_ALLOC_MSIX(pic->pic_dev, child, &pdev, &isrc);
1477 isrc->isrc_iommu = domain;
1478 msi = (struct intr_map_data_msi *)intr_alloc_map_data(
1479 INTR_MAP_DATA_MSI, sizeof(*msi), M_WAITOK | M_ZERO);
1481 *irq = intr_map_irq(pic->pic_dev, xref, (struct intr_map_data *)msi);
1486 intr_release_msix(device_t pci, device_t child, intptr_t xref, int irq)
1488 struct intr_irqsrc *isrc;
1489 struct intr_pic *pic;
1490 struct intr_map_data_msi *msi;
1493 pic = pic_lookup(NULL, xref, FLAG_MSI);
1497 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1498 ("%s: Found a non-MSI controller: %s", __func__,
1499 device_get_name(pic->pic_dev)));
1501 msi = (struct intr_map_data_msi *)
1502 intr_map_get_map_data(irq);
1503 KASSERT(msi->hdr.type == INTR_MAP_DATA_MSI,
1504 ("%s: irq %d map data is not MSI", __func__,
1508 intr_unmap_irq(irq);
1512 MSI_IOMMU_DEINIT(pic->pic_dev, child);
1514 err = MSI_RELEASE_MSIX(pic->pic_dev, child, isrc);
1515 intr_unmap_irq(irq);
1521 intr_map_msi(device_t pci, device_t child, intptr_t xref, int irq,
1522 uint64_t *addr, uint32_t *data)
1524 struct intr_irqsrc *isrc;
1525 struct intr_pic *pic;
1528 pic = pic_lookup(NULL, xref, FLAG_MSI);
1532 KASSERT((pic->pic_flags & FLAG_TYPE_MASK) == FLAG_MSI,
1533 ("%s: Found a non-MSI controller: %s", __func__,
1534 device_get_name(pic->pic_dev)));
1536 isrc = intr_map_get_isrc(irq);
1540 err = MSI_MAP_MSI(pic->pic_dev, child, isrc, addr, data);
1543 if (isrc->isrc_iommu != NULL)
1544 iommu_translate_msi(isrc->isrc_iommu, addr);
1550 void dosoftints(void);
1558 * Init interrupt controller on another CPU.
1561 intr_pic_init_secondary(void)
1565 * QQQ: Only root PIC is aware of other CPUs ???
1567 KASSERT(intr_irq_root_dev != NULL, ("%s: no root attached", __func__));
1569 //mtx_lock(&isrc_table_lock);
1570 PIC_INIT_SECONDARY(intr_irq_root_dev);
1571 //mtx_unlock(&isrc_table_lock);
1576 DB_SHOW_COMMAND_FLAGS(irqs, db_show_irqs, DB_CMD_MEMSAFE)
1580 struct intr_irqsrc *isrc;
1582 for (irqsum = 0, i = 0; i < intr_nirq; i++) {
1583 isrc = irq_sources[i];
1587 num = isrc->isrc_count != NULL ? isrc->isrc_count[0] : 0;
1588 db_printf("irq%-3u <%s>: cpu %02lx%s cnt %lu\n", i,
1589 isrc->isrc_name, isrc->isrc_cpu.__bits[0],
1590 isrc->isrc_flags & INTR_ISRCF_BOUND ? " (bound)" : "", num);
1593 db_printf("irq total %u\n", irqsum);
1598 * Interrupt mapping table functions.
1600 * Please, keep this part separately, it can be transformed to
1601 * extension of standard resources.
1603 struct intr_map_entry
1607 struct intr_map_data *map_data;
1608 struct intr_irqsrc *isrc;
1609 /* XXX TODO DISCONECTED PICs */
1613 /* XXX Convert irq_map[] to dynamicaly expandable one. */
1614 static struct intr_map_entry **irq_map;
1615 static u_int irq_map_count;
1616 static u_int irq_map_first_free_idx;
1617 static struct mtx irq_map_lock;
1619 static struct intr_irqsrc *
1620 intr_map_get_isrc(u_int res_id)
1622 struct intr_irqsrc *isrc;
1625 mtx_lock(&irq_map_lock);
1626 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1627 isrc = irq_map[res_id]->isrc;
1628 mtx_unlock(&irq_map_lock);
1634 intr_map_set_isrc(u_int res_id, struct intr_irqsrc *isrc)
1637 mtx_lock(&irq_map_lock);
1638 if (res_id < irq_map_count && irq_map[res_id] != NULL)
1639 irq_map[res_id]->isrc = isrc;
1640 mtx_unlock(&irq_map_lock);
1644 * Get a copy of intr_map_entry data
1646 static struct intr_map_data *
1647 intr_map_get_map_data(u_int res_id)
1649 struct intr_map_data *data;
1652 mtx_lock(&irq_map_lock);
1653 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1654 panic("Attempt to copy invalid resource id: %u\n", res_id);
1655 data = irq_map[res_id]->map_data;
1656 mtx_unlock(&irq_map_lock);
1662 * Get a copy of intr_map_entry data
1665 intr_map_copy_map_data(u_int res_id, device_t *map_dev, intptr_t *map_xref,
1666 struct intr_map_data **data)
1671 mtx_lock(&irq_map_lock);
1672 if (res_id >= irq_map_count || irq_map[res_id] == NULL)
1673 panic("Attempt to copy invalid resource id: %u\n", res_id);
1674 if (irq_map[res_id]->map_data != NULL)
1675 len = irq_map[res_id]->map_data->len;
1676 mtx_unlock(&irq_map_lock);
1681 *data = malloc(len, M_INTRNG, M_WAITOK | M_ZERO);
1682 mtx_lock(&irq_map_lock);
1683 if (irq_map[res_id] == NULL)
1684 panic("Attempt to copy invalid resource id: %u\n", res_id);
1686 if (len != irq_map[res_id]->map_data->len)
1687 panic("Resource id: %u has changed.\n", res_id);
1688 memcpy(*data, irq_map[res_id]->map_data, len);
1690 *map_dev = irq_map[res_id]->dev;
1691 *map_xref = irq_map[res_id]->xref;
1692 mtx_unlock(&irq_map_lock);
1696 * Allocate and fill new entry in irq_map table.
1699 intr_map_irq(device_t dev, intptr_t xref, struct intr_map_data *data)
1702 struct intr_map_entry *entry;
1704 /* Prepare new entry first. */
1705 entry = malloc(sizeof(*entry), M_INTRNG, M_WAITOK | M_ZERO);
1709 entry->map_data = data;
1712 mtx_lock(&irq_map_lock);
1713 for (i = irq_map_first_free_idx; i < irq_map_count; i++) {
1714 if (irq_map[i] == NULL) {
1716 irq_map_first_free_idx = i + 1;
1717 mtx_unlock(&irq_map_lock);
1721 for (i = 0; i < irq_map_first_free_idx; i++) {
1722 if (irq_map[i] == NULL) {
1724 irq_map_first_free_idx = i + 1;
1725 mtx_unlock(&irq_map_lock);
1729 mtx_unlock(&irq_map_lock);
1731 /* XXX Expand irq_map table */
1732 panic("IRQ mapping table is full.");
1736 * Remove and free mapping entry.
1739 intr_unmap_irq(u_int res_id)
1741 struct intr_map_entry *entry;
1743 mtx_lock(&irq_map_lock);
1744 if ((res_id >= irq_map_count) || (irq_map[res_id] == NULL))
1745 panic("Attempt to unmap invalid resource id: %u\n", res_id);
1746 entry = irq_map[res_id];
1747 irq_map[res_id] = NULL;
1748 irq_map_first_free_idx = res_id;
1749 mtx_unlock(&irq_map_lock);
1750 intr_free_intr_map_data(entry->map_data);
1751 free(entry, M_INTRNG);
1755 * Clone mapping entry.
1758 intr_map_clone_irq(u_int old_res_id)
1762 struct intr_map_data *data;
1764 intr_map_copy_map_data(old_res_id, &map_dev, &map_xref, &data);
1765 return (intr_map_irq(map_dev, map_xref, data));
1769 intr_map_init(void *dummy __unused)
1772 mtx_init(&irq_map_lock, "intr map table", NULL, MTX_DEF);
1774 irq_map_count = 2 * intr_nirq;
1775 irq_map = mallocarray(irq_map_count, sizeof(struct intr_map_entry*),
1776 M_INTRNG, M_WAITOK | M_ZERO);
1778 SYSINIT(intr_map_init, SI_SUB_INTR, SI_ORDER_FIRST, intr_map_init, NULL);