sys/mips/atheros/ar531x/ar5315_setup.c

   1 /*-
   2  * Copyright (c) 2016, Hiroki Mori
   3  * Copyright (c) 2010 Adrian Chadd
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  */
  27
  28 #include <sys/cdefs.h>
  29 __FBSDID("$FreeBSD$");
  30
  31 #include "opt_ddb.h"
  32 #include "opt_ar531x.h"
  33
  34 #include <sys/param.h>
  35 #include <sys/conf.h>
  36 #include <sys/kernel.h>
  37 #include <sys/systm.h>
  38 #include <sys/bus.h>
  39 #include <sys/cons.h>
  40 #include <sys/kdb.h>
  41 #include <sys/reboot.h>
  42
  43 #include <vm/vm.h>
  44 #include <vm/vm_page.h>
  45
  46 #include <net/ethernet.h>
  47
  48 #include <machine/clock.h>
  49 #include <machine/cpu.h>
  50 #include <machine/cpuregs.h>
  51 #include <machine/hwfunc.h>
  52 #include <machine/md_var.h>
  53 #include <machine/trap.h>
  54 #include <machine/vmparam.h>
  55
  56 #include <mips/atheros/ar531x/ar5315reg.h>
  57 #include <mips/atheros/ar531x/ar5312reg.h>
  58 #include <mips/atheros/ar531x/ar5315_setup.h>
  59
  60 #include <mips/atheros/ar531x/ar5315_cpudef.h>
  61
  62 #include <mips/atheros/ar531x/ar5315_chip.h>
  63 #include <mips/atheros/ar531x/ar5312_chip.h>
  64 #include <mips/atheros/ar724x_chip.h>
  65 #include <mips/atheros/ar91xx_chip.h>
  66
  67 #include <dev/ath/ath_hal/ah_soc.h>
  68
  69 #define AR5315_SYS_TYPE_LEN             128
  70
  71 static char ar5315_sys_type[AR5315_SYS_TYPE_LEN];
  72 enum ar531x_soc_type ar531x_soc;
  73 struct ar5315_cpu_def * ar5315_cpu_ops = NULL;
  74
  75 void
  76 ar5315_detect_sys_type(void)
  77 {
  78         char *chip = "????";
  79         uint32_t ver = 0;
  80         uint32_t rev = 0;
  81 #if 0
  82         const uint8_t *ptr, *end;
  83         static const struct ar531x_boarddata *board = NULL;
  84
  85         ptr = (const uint8_t *) MIPS_PHYS_TO_KSEG1(AR5315_CONFIG_END
  86                 - 0x1000);
  87
  88         end = (const uint8_t *)AR5315_CONFIG_BASE;
  89
  90         for (; ptr > end; ptr -= 0x1000) {
  91                 if (*(const uint32_t *)ptr == AR531X_BD_MAGIC) {
  92                         board = (const struct ar531x_boarddata *) ptr;
  93                         rev = board->major;
  94                         break;
  95                 }
  96         }
  97 #endif
  98         int soctype;
  99
 100 #ifdef AR531X_1ST_GENERATION
 101         soctype = AR_FIRST_GEN;
 102 #else
 103         soctype = AR_SECOND_GEN;
 104 #endif
 105
 106         if(soctype == AR_SECOND_GEN) {
 107                 ar5315_cpu_ops = &ar5315_chip_def;
 108
 109                 ver = ATH_READ_REG(AR5315_SYSREG_BASE +
 110                         AR5315_SYSREG_SREV);
 111
 112                 switch (ver) {
 113                 case 0x86:
 114                         ar531x_soc = AR531X_SOC_AR5315;
 115                         chip = "2315";
 116                         break;
 117                 case 0x87:
 118                         ar531x_soc = AR531X_SOC_AR5316;
 119                         chip = "2316";
 120                         break;
 121                 case 0x90:
 122                         ar531x_soc = AR531X_SOC_AR5317;
 123                         chip = "2317";
 124                         break;
 125                 case 0x91:
 126                         ar531x_soc = AR531X_SOC_AR5318;
 127                         chip = "2318";
 128                         break;
 129                 }
 130         } else {
 131                 ar5315_cpu_ops = &ar5312_chip_def;
 132
 133                 ver = ATH_READ_REG(AR5312_SYSREG_BASE +
 134                         AR5312_SYSREG_REVISION);
 135                 rev = AR5312_REVISION_MINOR(ver);
 136
 137                 switch (AR5312_REVISION_MAJOR(ver)) {
 138                 case AR5312_REVISION_MAJ_AR5311:
 139                         ar531x_soc = AR531X_SOC_AR5311;
 140                         chip = "5311";
 141                         break;
 142                 case AR5312_REVISION_MAJ_AR5312:
 143                         ar531x_soc = AR531X_SOC_AR5312;
 144                         chip = "5312";
 145                         break;
 146                 case AR5312_REVISION_MAJ_AR2313:
 147                         ar531x_soc = AR531X_SOC_AR5313;
 148                         chip = "2313";
 149                         break;
 150                 }
 151         }
 152
 153         sprintf(ar5315_sys_type, "Atheros AR%s rev %u", chip, rev);
 154 }
 155
 156 const char *
 157 ar5315_get_system_type(void)
 158 {
 159         return ar5315_sys_type;
 160 }
 161