2 * Copyright (c) 2016 Hiroki Mori. All rights reserved.
4 * Oleksandr Tymoshenko <gonzo@freebsd.org>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
25 * THE POSSIBILITY OF SUCH DAMAGE.
31 #include "opt_platform.h"
32 #include "opt_ar531x.h"
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
38 * AR231x Ethernet interface driver
39 * copy from mips/idt/if_kr.c and netbsd code
41 #include <sys/param.h>
42 #include <sys/endian.h>
43 #include <sys/systm.h>
44 #include <sys/sockio.h>
46 #include <sys/malloc.h>
47 #include <sys/kernel.h>
49 #include <sys/module.h>
50 #include <sys/mutex.h>
51 #include <sys/socket.h>
52 #include <sys/taskqueue.h>
56 #include <net/if_arp.h>
57 #include <net/ethernet.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
61 #include <net/if_var.h>
65 #include <machine/bus.h>
66 #include <machine/resource.h>
71 #include <machine/intr.h>
74 #include <dev/mii/mii.h>
75 #include <dev/mii/miivar.h>
78 #include <dev/mdio/mdio.h>
79 #include <dev/etherswitch/miiproxy.h>
83 MODULE_DEPEND(are, ether, 1, 1, 1);
84 MODULE_DEPEND(are, miibus, 1, 1, 1);
86 #include "miibus_if.h"
88 #include <mips/atheros/ar531x/ar5315reg.h>
89 #include <mips/atheros/ar531x/ar5312reg.h>
90 #include <mips/atheros/ar531x/ar5315_setup.h>
91 #include <mips/atheros/ar531x/if_arereg.h>
96 void dump_txdesc(struct are_softc *, int);
97 void dump_status_reg(struct are_softc *);
100 static int are_attach(device_t);
101 static int are_detach(device_t);
102 static int are_ifmedia_upd(struct ifnet *);
103 static void are_ifmedia_sts(struct ifnet *, struct ifmediareq *);
104 static int are_ioctl(struct ifnet *, u_long, caddr_t);
105 static void are_init(void *);
106 static void are_init_locked(struct are_softc *);
107 static void are_link_task(void *, int);
108 static int are_miibus_readreg(device_t, int, int);
109 static void are_miibus_statchg(device_t);
110 static int are_miibus_writereg(device_t, int, int, int);
111 static int are_probe(device_t);
112 static void are_reset(struct are_softc *);
113 static int are_resume(device_t);
114 static int are_rx_ring_init(struct are_softc *);
115 static int are_tx_ring_init(struct are_softc *);
116 static int are_shutdown(device_t);
117 static void are_start(struct ifnet *);
118 static void are_start_locked(struct ifnet *);
119 static void are_stop(struct are_softc *);
120 static int are_suspend(device_t);
122 static void are_rx(struct are_softc *);
123 static void are_tx(struct are_softc *);
124 static void are_intr(void *);
125 static void are_tick(void *);
127 static void are_dmamap_cb(void *, bus_dma_segment_t *, int, int);
128 static int are_dma_alloc(struct are_softc *);
129 static void are_dma_free(struct are_softc *);
130 static int are_newbuf(struct are_softc *, int);
131 static __inline void are_fixup_rx(struct mbuf *);
133 static void are_hinted_child(device_t bus, const char *dname, int dunit);
135 static device_method_t are_methods[] = {
136 /* Device interface */
137 DEVMETHOD(device_probe, are_probe),
138 DEVMETHOD(device_attach, are_attach),
139 DEVMETHOD(device_detach, are_detach),
140 DEVMETHOD(device_suspend, are_suspend),
141 DEVMETHOD(device_resume, are_resume),
142 DEVMETHOD(device_shutdown, are_shutdown),
145 DEVMETHOD(miibus_readreg, are_miibus_readreg),
146 DEVMETHOD(miibus_writereg, are_miibus_writereg),
147 DEVMETHOD(miibus_statchg, are_miibus_statchg),
150 DEVMETHOD(bus_add_child, device_add_child_ordered),
151 DEVMETHOD(bus_hinted_child, are_hinted_child),
156 static driver_t are_driver = {
159 sizeof(struct are_softc)
162 static devclass_t are_devclass;
164 DRIVER_MODULE(are, nexus, are_driver, are_devclass, 0, 0);
166 DRIVER_MODULE(miibus, are, miibus_driver, miibus_devclass, 0, 0);
170 static int aremdio_probe(device_t);
171 static int aremdio_attach(device_t);
172 static int aremdio_detach(device_t);
175 * Declare an additional, separate driver for accessing the MDIO bus.
177 static device_method_t aremdio_methods[] = {
178 /* Device interface */
179 DEVMETHOD(device_probe, aremdio_probe),
180 DEVMETHOD(device_attach, aremdio_attach),
181 DEVMETHOD(device_detach, aremdio_detach),
184 DEVMETHOD(bus_add_child, device_add_child_ordered),
187 DEVMETHOD(mdio_readreg, are_miibus_readreg),
188 DEVMETHOD(mdio_writereg, are_miibus_writereg),
191 DEFINE_CLASS_0(aremdio, aremdio_driver, aremdio_methods,
192 sizeof(struct are_softc));
193 static devclass_t aremdio_devclass;
195 DRIVER_MODULE(miiproxy, are, miiproxy_driver, miiproxy_devclass, 0, 0);
196 DRIVER_MODULE(aremdio, nexus, aremdio_driver, aremdio_devclass, 0, 0);
197 DRIVER_MODULE(mdio, aremdio, mdio_driver, mdio_devclass, 0, 0);
202 are_probe(device_t dev)
205 device_set_desc(dev, "AR531x Ethernet interface");
210 are_attach(device_t dev)
213 struct are_softc *sc;
225 sc = device_get_softc(dev);
226 unit = device_get_unit(dev);
229 // hardcode macaddress
230 sc->are_eaddr[0] = 0x00;
231 sc->are_eaddr[1] = 0x0C;
232 sc->are_eaddr[2] = 0x42;
233 sc->are_eaddr[3] = 0x09;
234 sc->are_eaddr[4] = 0x5E;
235 sc->are_eaddr[5] = 0x6B;
237 // try to get from hints
238 if (!resource_string_value(device_get_name(dev),
239 device_get_unit(dev), "macaddr", (const char **)&local_macstr)) {
240 uint32_t tmpmac[ETHER_ADDR_LEN];
242 /* Have a MAC address; should use it */
243 device_printf(dev, "Overriding MAC address from environment: '%s'\n",
246 /* Extract out the MAC address */
247 /* XXX this should all be a generic method */
248 count = sscanf(local_macstr, "%x%*c%x%*c%x%*c%x%*c%x%*c%x",
249 &tmpmac[0], &tmpmac[1],
250 &tmpmac[2], &tmpmac[3],
251 &tmpmac[4], &tmpmac[5]);
254 for (i = 0; i < ETHER_ADDR_LEN; i++)
255 sc->are_eaddr[i] = tmpmac[i];
259 mtx_init(&sc->are_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
261 callout_init_mtx(&sc->are_stat_callout, &sc->are_mtx, 0);
262 TASK_INIT(&sc->are_link_task, 0, are_link_task, sc);
264 /* Map control/status registers. */
266 sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->are_rid,
267 RF_ACTIVE | RF_SHAREABLE);
269 if (sc->are_res == NULL) {
270 device_printf(dev, "couldn't map memory\n");
275 sc->are_btag = rman_get_bustag(sc->are_res);
276 sc->are_bhandle = rman_get_bushandle(sc->are_res);
279 /* Allocate interrupts */
281 sc->are_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
282 RF_SHAREABLE | RF_ACTIVE);
284 if (sc->are_irq == NULL) {
285 device_printf(dev, "couldn't map interrupt\n");
291 /* Allocate ifnet structure. */
292 ifp = sc->are_ifp = if_alloc(IFT_ETHER);
295 device_printf(dev, "couldn't allocate ifnet structure\n");
300 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
301 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
302 ifp->if_ioctl = are_ioctl;
303 ifp->if_start = are_start;
304 ifp->if_init = are_init;
306 /* XXX: add real size */
307 IFQ_SET_MAXLEN(&ifp->if_snd, 9);
308 ifp->if_snd.ifq_maxlen = 9;
309 IFQ_SET_READY(&ifp->if_snd);
311 ifp->if_capenable = ifp->if_capabilities;
313 if (are_dma_alloc(sc) != 0) {
318 /* TODO: calculate prescale */
320 CSR_WRITE_4(sc, ARE_ETHMCP, (165000000 / (1250000 + 1)) & ~1);
322 CSR_WRITE_4(sc, ARE_MIIMCFG, ARE_MIIMCFG_R);
324 CSR_WRITE_4(sc, ARE_MIIMCFG, 0);
326 CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR);
330 sc->are_miiproxy = mii_attach_proxy(sc->are_dev);
335 error = mii_attach(dev, &sc->are_miibus, ifp, are_ifmedia_upd,
336 are_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
338 device_printf(dev, "attaching PHYs failed\n");
342 ifmedia_init(&sc->are_ifmedia, 0, are_ifmedia_upd, are_ifmedia_sts);
344 ifmedia_add(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL);
345 ifmedia_set(&sc->are_ifmedia, IFM_ETHER | IFM_AUTO);
348 /* Call MI attach routine. */
349 ether_ifattach(ifp, sc->are_eaddr);
353 if(ar531x_soc >= AR531X_SOC_AR5315) {
354 enetirq = AR5315_CPU_IRQ_ENET;
357 if(device_get_unit(dev) == 0) {
358 enetirq = AR5312_IRQ_ENET0;
361 enetirq = AR5312_IRQ_ENET1;
365 cpu_establish_hardintr(name, NULL, are_intr, sc, enetirq,
366 INTR_TYPE_NET, NULL);
368 /* Hook interrupt last to avoid having to lock softc */
369 error = bus_setup_intr(dev, sc->are_irq, INTR_TYPE_NET | INTR_MPSAFE,
370 NULL, are_intr, sc, &sc->are_intrhand);
373 device_printf(dev, "couldn't set up irq\n");
387 are_detach(device_t dev)
389 struct are_softc *sc = device_get_softc(dev);
390 struct ifnet *ifp = sc->are_ifp;
392 KASSERT(mtx_initialized(&sc->are_mtx), ("vr mutex not initialized"));
394 /* These should only be active if attach succeeded */
395 if (device_is_attached(dev)) {
400 taskqueue_drain(taskqueue_swi, &sc->are_link_task);
405 device_delete_child(dev, sc->are_miibus);
407 bus_generic_detach(dev);
409 if (sc->are_intrhand)
410 bus_teardown_intr(dev, sc->are_irq, sc->are_intrhand);
412 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->are_irq);
415 bus_release_resource(dev, SYS_RES_MEMORY, sc->are_rid,
423 mtx_destroy(&sc->are_mtx);
430 are_suspend(device_t dev)
433 panic("%s", __func__);
438 are_resume(device_t dev)
441 panic("%s", __func__);
446 are_shutdown(device_t dev)
448 struct are_softc *sc;
450 sc = device_get_softc(dev);
460 are_miibus_readreg(device_t dev, int phy, int reg)
462 struct are_softc * sc = device_get_softc(dev);
466 addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT);
467 CSR_WRITE_4(sc, CSR_MIIADDR, addr);
469 for (i = 0; i < 100000000; i++) {
470 if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)
474 return (CSR_READ_4(sc, CSR_MIIDATA) & 0xffff);
478 are_miibus_writereg(device_t dev, int phy, int reg, int data)
480 struct are_softc * sc = device_get_softc(dev);
484 /* write the data register */
485 CSR_WRITE_4(sc, CSR_MIIDATA, data);
487 /* write the address to latch it in */
488 addr = (phy << MIIADDR_PHY_SHIFT) | (reg << MIIADDR_REG_SHIFT) |
490 CSR_WRITE_4(sc, CSR_MIIADDR, addr);
493 for (i = 0; i < 100000000; i++) {
494 if ((CSR_READ_4(sc, CSR_MIIADDR) & MIIADDR_BUSY) == 0)
502 are_miibus_statchg(device_t dev)
504 struct are_softc *sc;
506 sc = device_get_softc(dev);
507 taskqueue_enqueue(taskqueue_swi, &sc->are_link_task);
511 are_link_task(void *arg, int pending)
514 struct are_softc *sc;
515 struct mii_data *mii;
517 /* int lfdx, mfdx; */
519 sc = (struct are_softc *)arg;
522 mii = device_get_softc(sc->are_miibus);
524 if (mii == NULL || ifp == NULL ||
525 (ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
530 if (mii->mii_media_status & IFM_ACTIVE) {
531 if (IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE)
532 sc->are_link_status = 1;
534 sc->are_link_status = 0;
541 are_reset(struct are_softc *sc)
545 CSR_WRITE_4(sc, CSR_BUSMODE, BUSMODE_SWR);
548 * The chip doesn't take itself out of reset automatically.
549 * We need to do so after 2us.
552 CSR_WRITE_4(sc, CSR_BUSMODE, 0);
554 for (i = 0; i < 1000; i++) {
556 * Wait a bit for the reset to complete before peeking
560 if ((CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR) == 0)
564 if (CSR_READ_4(sc, CSR_BUSMODE) & BUSMODE_SWR)
565 device_printf(sc->are_dev, "reset time out\n");
573 struct are_softc *sc = xsc;
581 are_init_locked(struct are_softc *sc)
583 struct ifnet *ifp = sc->are_ifp;
585 struct mii_data *mii;
591 mii = device_get_softc(sc->are_miibus);
597 /* Init circular RX list. */
598 if (are_rx_ring_init(sc) != 0) {
599 device_printf(sc->are_dev,
600 "initialization failed: no memory for rx buffers\n");
605 /* Init tx descriptors. */
606 are_tx_ring_init(sc);
609 * Initialize the BUSMODE register.
611 CSR_WRITE_4(sc, CSR_BUSMODE,
612 /* XXX: not sure if this is a good thing or not... */
613 //BUSMODE_ALIGN_16B |
614 BUSMODE_BAR | BUSMODE_BLE | BUSMODE_PBL_4LW);
617 * Initialize the interrupt mask and enable interrupts.
619 /* normal interrupts */
620 sc->sc_inten = STATUS_TI | STATUS_TU | STATUS_RI | STATUS_NIS;
622 /* abnormal interrupts */
623 sc->sc_inten |= STATUS_TPS | STATUS_TJT | STATUS_UNF |
624 STATUS_RU | STATUS_RPS | STATUS_SE | STATUS_AIS;
626 sc->sc_rxint_mask = STATUS_RI|STATUS_RU;
627 sc->sc_txint_mask = STATUS_TI|STATUS_UNF|STATUS_TJT;
629 sc->sc_rxint_mask &= sc->sc_inten;
630 sc->sc_txint_mask &= sc->sc_inten;
632 CSR_WRITE_4(sc, CSR_INTEN, sc->sc_inten);
633 CSR_WRITE_4(sc, CSR_STATUS, 0xffffffff);
636 * Give the transmit and receive rings to the chip.
638 CSR_WRITE_4(sc, CSR_TXLIST, ARE_TX_RING_ADDR(sc, 0));
639 CSR_WRITE_4(sc, CSR_RXLIST, ARE_RX_RING_ADDR(sc, 0));
642 * Set the station address.
644 CSR_WRITE_4(sc, CSR_MACHI, sc->are_eaddr[5] << 16 | sc->are_eaddr[4]);
645 CSR_WRITE_4(sc, CSR_MACLO, sc->are_eaddr[3] << 24 |
646 sc->are_eaddr[2] << 16 | sc->are_eaddr[1] << 8 | sc->are_eaddr[0]);
651 CSR_WRITE_4(sc, CSR_MACCTL, CSR_READ_4(sc, CSR_MACCTL) |
652 (MACCTL_RE | MACCTL_TE));
655 * Write out the opmode.
657 CSR_WRITE_4(sc, CSR_OPMODE, OPMODE_SR | OPMODE_ST |
658 // ae_txthresh[sc->sc_txthresh].txth_opmode);
661 * Start the receive process.
663 CSR_WRITE_4(sc, CSR_RXPOLL, RXPOLL_RPD);
665 sc->are_link_status = 1;
670 ifp->if_drv_flags |= IFF_DRV_RUNNING;
671 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
673 callout_reset(&sc->are_stat_callout, hz, are_tick, sc);
677 are_start(struct ifnet *ifp)
679 struct are_softc *sc;
684 are_start_locked(ifp);
689 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
690 * pointers to the fragment pointers.
693 are_encap(struct are_softc *sc, struct mbuf **m_head)
695 struct are_txdesc *txd;
696 struct are_desc *desc, *prev_desc;
697 bus_dma_segment_t txsegs[ARE_MAXFRAGS];
699 int error, i, nsegs, prod, si, prev_prod;
704 prod = sc->are_cdata.are_tx_prod;
705 txd = &sc->are_cdata.are_txdesc[prod];
706 error = bus_dmamap_load_mbuf_sg(sc->are_cdata.are_tx_tag, txd->tx_dmamap,
707 *m_head, txsegs, &nsegs, BUS_DMA_NOWAIT);
708 if (error == EFBIG) {
710 } else if (error != 0)
718 /* Check number of available descriptors. */
719 if (sc->are_cdata.are_tx_cnt + nsegs >= (ARE_TX_RING_CNT - 1)) {
720 bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap);
725 bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap,
726 BUS_DMASYNC_PREWRITE);
731 * Make a list of descriptors for this packet. DMA controller will
732 * walk through it while are_link is not zero. The last one should
733 * have COF flag set, to pickup next chain from NDPTR
736 desc = prev_desc = NULL;
737 for (i = 0; i < nsegs; i++) {
738 desc = &sc->are_rdata.are_tx_ring[prod];
739 desc->are_stat = ADSTAT_OWN;
740 desc->are_devcs = ARE_DMASIZE(txsegs[i].ds_len) | ADCTL_CH;
742 desc->are_devcs |= ADCTL_Tx_FS;
743 desc->are_addr = txsegs[i].ds_addr;
744 // desc->are_link = 0;
745 /* link with previous descriptor */
747 prev_desc->are_link = ARE_TX_RING_ADDR(sc, prod);
749 sc->are_cdata.are_tx_cnt++;
751 ARE_INC(prod, ARE_TX_RING_CNT);
755 * Set mark last fragment with LD flag
758 desc->are_devcs |= ADCTL_Tx_IC;
759 desc->are_devcs |= ADCTL_Tx_LS;
762 /* Update producer index. */
763 sc->are_cdata.are_tx_prod = prod;
765 /* Sync descriptors. */
766 bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
767 sc->are_cdata.are_tx_ring_map,
768 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
770 /* Start transmitting */
771 /* Check if new list is queued in NDPTR */
772 txstat = (CSR_READ_4(sc, CSR_STATUS) >> 20) & 7;
773 if (txstat == 0 || txstat == 6) {
774 /* Transmit Process Stat is stop or suspended */
775 CSR_WRITE_4(sc, CSR_TXPOLL, TXPOLL_TPD);
778 link_addr = ARE_TX_RING_ADDR(sc, si);
779 /* Get previous descriptor */
780 si = (si + ARE_TX_RING_CNT - 1) % ARE_TX_RING_CNT;
781 desc = &sc->are_rdata.are_tx_ring[si];
782 desc->are_link = link_addr;
789 are_start_locked(struct ifnet *ifp)
791 struct are_softc *sc;
799 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) !=
800 IFF_DRV_RUNNING || sc->are_link_status == 0 )
803 for (enq = 0; !IFQ_DRV_IS_EMPTY(&ifp->if_snd) &&
804 sc->are_cdata.are_tx_cnt < ARE_TX_RING_CNT - 2; ) {
805 IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
809 * Pack the data into the transmit ring. If we
810 * don't have room, set the OACTIVE flag and wait
811 * for the NIC to drain the ring.
813 if (are_encap(sc, &m_head)) {
816 IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
817 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
823 * If there's a BPF listener, bounce a copy of this frame
826 ETHER_BPF_MTAP(ifp, m_head);
831 are_stop(struct are_softc *sc)
838 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
839 callout_stop(&sc->are_stat_callout);
841 /* Disable interrupts. */
842 CSR_WRITE_4(sc, CSR_INTEN, 0);
844 /* Stop the transmit and receive processes. */
845 CSR_WRITE_4(sc, CSR_OPMODE, 0);
846 CSR_WRITE_4(sc, CSR_RXLIST, 0);
847 CSR_WRITE_4(sc, CSR_TXLIST, 0);
848 CSR_WRITE_4(sc, CSR_MACCTL,
849 CSR_READ_4(sc, CSR_MACCTL) & ~(MACCTL_TE | MACCTL_RE));
855 are_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
857 struct are_softc *sc = ifp->if_softc;
858 struct ifreq *ifr = (struct ifreq *) data;
860 struct mii_data *mii;
868 if (ifp->if_flags & IFF_UP) {
869 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
870 if ((ifp->if_flags ^ sc->are_if_flags) &
871 (IFF_PROMISC | IFF_ALLMULTI))
874 if (sc->are_detach == 0)
878 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
881 sc->are_if_flags = ifp->if_flags;
898 mii = device_get_softc(sc->are_miibus);
899 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
901 error = ifmedia_ioctl(ifp, ifr, &sc->are_ifmedia, command);
907 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
908 if ((mask & IFCAP_HWCSUM) != 0) {
909 ifp->if_capenable ^= IFCAP_HWCSUM;
910 if ((IFCAP_HWCSUM & ifp->if_capenable) &&
911 (IFCAP_HWCSUM & ifp->if_capabilities))
912 ifp->if_hwassist = ARE_CSUM_FEATURES;
914 ifp->if_hwassist = 0;
916 if ((mask & IFCAP_VLAN_HWTAGGING) != 0) {
917 ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
918 if (IFCAP_VLAN_HWTAGGING & ifp->if_capenable &&
919 IFCAP_VLAN_HWTAGGING & ifp->if_capabilities &&
920 ifp->if_drv_flags & IFF_DRV_RUNNING) {
926 VLAN_CAPABILITIES(ifp);
930 error = ether_ioctl(ifp, command, data);
941 are_ifmedia_upd(struct ifnet *ifp)
944 struct are_softc *sc;
945 struct mii_data *mii;
946 struct mii_softc *miisc;
951 mii = device_get_softc(sc->are_miibus);
952 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
954 error = mii_mediachg(mii);
964 * Report current media status.
967 are_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
970 struct are_softc *sc = ifp->if_softc;
971 struct mii_data *mii;
973 mii = device_get_softc(sc->are_miibus);
976 ifmr->ifm_active = mii->mii_media_active;
977 ifmr->ifm_status = mii->mii_media_status;
980 ifmr->ifm_status = IFM_AVALID | IFM_ACTIVE;
984 struct are_dmamap_arg {
985 bus_addr_t are_busaddr;
989 are_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
991 struct are_dmamap_arg *ctx;
996 ctx->are_busaddr = segs[0].ds_addr;
1000 are_dma_alloc(struct are_softc *sc)
1002 struct are_dmamap_arg ctx;
1003 struct are_txdesc *txd;
1004 struct are_rxdesc *rxd;
1007 /* Create parent DMA tag. */
1008 error = bus_dma_tag_create(
1009 bus_get_dma_tag(sc->are_dev), /* parent */
1010 1, 0, /* alignment, boundary */
1011 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
1012 BUS_SPACE_MAXADDR, /* highaddr */
1013 NULL, NULL, /* filter, filterarg */
1014 BUS_SPACE_MAXSIZE_32BIT, /* maxsize */
1016 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
1018 NULL, NULL, /* lockfunc, lockarg */
1019 &sc->are_cdata.are_parent_tag);
1021 device_printf(sc->are_dev, "failed to create parent DMA tag\n");
1024 /* Create tag for Tx ring. */
1025 error = bus_dma_tag_create(
1026 sc->are_cdata.are_parent_tag, /* parent */
1027 ARE_RING_ALIGN, 0, /* alignment, boundary */
1028 BUS_SPACE_MAXADDR, /* lowaddr */
1029 BUS_SPACE_MAXADDR, /* highaddr */
1030 NULL, NULL, /* filter, filterarg */
1031 ARE_TX_RING_SIZE, /* maxsize */
1033 ARE_TX_RING_SIZE, /* maxsegsize */
1035 NULL, NULL, /* lockfunc, lockarg */
1036 &sc->are_cdata.are_tx_ring_tag);
1038 device_printf(sc->are_dev, "failed to create Tx ring DMA tag\n");
1042 /* Create tag for Rx ring. */
1043 error = bus_dma_tag_create(
1044 sc->are_cdata.are_parent_tag, /* parent */
1045 ARE_RING_ALIGN, 0, /* alignment, boundary */
1046 BUS_SPACE_MAXADDR, /* lowaddr */
1047 BUS_SPACE_MAXADDR, /* highaddr */
1048 NULL, NULL, /* filter, filterarg */
1049 ARE_RX_RING_SIZE, /* maxsize */
1051 ARE_RX_RING_SIZE, /* maxsegsize */
1053 NULL, NULL, /* lockfunc, lockarg */
1054 &sc->are_cdata.are_rx_ring_tag);
1056 device_printf(sc->are_dev, "failed to create Rx ring DMA tag\n");
1060 /* Create tag for Tx buffers. */
1061 error = bus_dma_tag_create(
1062 sc->are_cdata.are_parent_tag, /* parent */
1063 sizeof(uint32_t), 0, /* alignment, boundary */
1064 BUS_SPACE_MAXADDR, /* lowaddr */
1065 BUS_SPACE_MAXADDR, /* highaddr */
1066 NULL, NULL, /* filter, filterarg */
1067 MCLBYTES * ARE_MAXFRAGS, /* maxsize */
1068 ARE_MAXFRAGS, /* nsegments */
1069 MCLBYTES, /* maxsegsize */
1071 NULL, NULL, /* lockfunc, lockarg */
1072 &sc->are_cdata.are_tx_tag);
1074 device_printf(sc->are_dev, "failed to create Tx DMA tag\n");
1078 /* Create tag for Rx buffers. */
1079 error = bus_dma_tag_create(
1080 sc->are_cdata.are_parent_tag, /* parent */
1081 ARE_RX_ALIGN, 0, /* alignment, boundary */
1082 BUS_SPACE_MAXADDR, /* lowaddr */
1083 BUS_SPACE_MAXADDR, /* highaddr */
1084 NULL, NULL, /* filter, filterarg */
1085 MCLBYTES, /* maxsize */
1087 MCLBYTES, /* maxsegsize */
1089 NULL, NULL, /* lockfunc, lockarg */
1090 &sc->are_cdata.are_rx_tag);
1092 device_printf(sc->are_dev, "failed to create Rx DMA tag\n");
1096 /* Allocate DMA'able memory and load the DMA map for Tx ring. */
1097 error = bus_dmamem_alloc(sc->are_cdata.are_tx_ring_tag,
1098 (void **)&sc->are_rdata.are_tx_ring, BUS_DMA_WAITOK |
1099 BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_tx_ring_map);
1101 device_printf(sc->are_dev,
1102 "failed to allocate DMA'able memory for Tx ring\n");
1106 ctx.are_busaddr = 0;
1107 error = bus_dmamap_load(sc->are_cdata.are_tx_ring_tag,
1108 sc->are_cdata.are_tx_ring_map, sc->are_rdata.are_tx_ring,
1109 ARE_TX_RING_SIZE, are_dmamap_cb, &ctx, 0);
1110 if (error != 0 || ctx.are_busaddr == 0) {
1111 device_printf(sc->are_dev,
1112 "failed to load DMA'able memory for Tx ring\n");
1115 sc->are_rdata.are_tx_ring_paddr = ctx.are_busaddr;
1117 /* Allocate DMA'able memory and load the DMA map for Rx ring. */
1118 error = bus_dmamem_alloc(sc->are_cdata.are_rx_ring_tag,
1119 (void **)&sc->are_rdata.are_rx_ring, BUS_DMA_WAITOK |
1120 BUS_DMA_COHERENT | BUS_DMA_ZERO, &sc->are_cdata.are_rx_ring_map);
1122 device_printf(sc->are_dev,
1123 "failed to allocate DMA'able memory for Rx ring\n");
1127 ctx.are_busaddr = 0;
1128 error = bus_dmamap_load(sc->are_cdata.are_rx_ring_tag,
1129 sc->are_cdata.are_rx_ring_map, sc->are_rdata.are_rx_ring,
1130 ARE_RX_RING_SIZE, are_dmamap_cb, &ctx, 0);
1131 if (error != 0 || ctx.are_busaddr == 0) {
1132 device_printf(sc->are_dev,
1133 "failed to load DMA'able memory for Rx ring\n");
1136 sc->are_rdata.are_rx_ring_paddr = ctx.are_busaddr;
1138 /* Create DMA maps for Tx buffers. */
1139 for (i = 0; i < ARE_TX_RING_CNT; i++) {
1140 txd = &sc->are_cdata.are_txdesc[i];
1142 txd->tx_dmamap = NULL;
1143 error = bus_dmamap_create(sc->are_cdata.are_tx_tag, 0,
1146 device_printf(sc->are_dev,
1147 "failed to create Tx dmamap\n");
1151 /* Create DMA maps for Rx buffers. */
1152 if ((error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0,
1153 &sc->are_cdata.are_rx_sparemap)) != 0) {
1154 device_printf(sc->are_dev,
1155 "failed to create spare Rx dmamap\n");
1158 for (i = 0; i < ARE_RX_RING_CNT; i++) {
1159 rxd = &sc->are_cdata.are_rxdesc[i];
1161 rxd->rx_dmamap = NULL;
1162 error = bus_dmamap_create(sc->are_cdata.are_rx_tag, 0,
1165 device_printf(sc->are_dev,
1166 "failed to create Rx dmamap\n");
1176 are_dma_free(struct are_softc *sc)
1178 struct are_txdesc *txd;
1179 struct are_rxdesc *rxd;
1183 if (sc->are_cdata.are_tx_ring_tag) {
1184 if (sc->are_rdata.are_tx_ring_paddr)
1185 bus_dmamap_unload(sc->are_cdata.are_tx_ring_tag,
1186 sc->are_cdata.are_tx_ring_map);
1187 if (sc->are_rdata.are_tx_ring)
1188 bus_dmamem_free(sc->are_cdata.are_tx_ring_tag,
1189 sc->are_rdata.are_tx_ring,
1190 sc->are_cdata.are_tx_ring_map);
1191 sc->are_rdata.are_tx_ring = NULL;
1192 sc->are_rdata.are_tx_ring_paddr = 0;
1193 bus_dma_tag_destroy(sc->are_cdata.are_tx_ring_tag);
1194 sc->are_cdata.are_tx_ring_tag = NULL;
1197 if (sc->are_cdata.are_rx_ring_tag) {
1198 if (sc->are_rdata.are_rx_ring_paddr)
1199 bus_dmamap_unload(sc->are_cdata.are_rx_ring_tag,
1200 sc->are_cdata.are_rx_ring_map);
1201 if (sc->are_rdata.are_rx_ring)
1202 bus_dmamem_free(sc->are_cdata.are_rx_ring_tag,
1203 sc->are_rdata.are_rx_ring,
1204 sc->are_cdata.are_rx_ring_map);
1205 sc->are_rdata.are_rx_ring = NULL;
1206 sc->are_rdata.are_rx_ring_paddr = 0;
1207 bus_dma_tag_destroy(sc->are_cdata.are_rx_ring_tag);
1208 sc->are_cdata.are_rx_ring_tag = NULL;
1211 if (sc->are_cdata.are_tx_tag) {
1212 for (i = 0; i < ARE_TX_RING_CNT; i++) {
1213 txd = &sc->are_cdata.are_txdesc[i];
1214 if (txd->tx_dmamap) {
1215 bus_dmamap_destroy(sc->are_cdata.are_tx_tag,
1217 txd->tx_dmamap = NULL;
1220 bus_dma_tag_destroy(sc->are_cdata.are_tx_tag);
1221 sc->are_cdata.are_tx_tag = NULL;
1224 if (sc->are_cdata.are_rx_tag) {
1225 for (i = 0; i < ARE_RX_RING_CNT; i++) {
1226 rxd = &sc->are_cdata.are_rxdesc[i];
1227 if (rxd->rx_dmamap) {
1228 bus_dmamap_destroy(sc->are_cdata.are_rx_tag,
1230 rxd->rx_dmamap = NULL;
1233 if (sc->are_cdata.are_rx_sparemap) {
1234 bus_dmamap_destroy(sc->are_cdata.are_rx_tag,
1235 sc->are_cdata.are_rx_sparemap);
1236 sc->are_cdata.are_rx_sparemap = 0;
1238 bus_dma_tag_destroy(sc->are_cdata.are_rx_tag);
1239 sc->are_cdata.are_rx_tag = NULL;
1242 if (sc->are_cdata.are_parent_tag) {
1243 bus_dma_tag_destroy(sc->are_cdata.are_parent_tag);
1244 sc->are_cdata.are_parent_tag = NULL;
1249 * Initialize the transmit descriptors.
1252 are_tx_ring_init(struct are_softc *sc)
1254 struct are_ring_data *rd;
1255 struct are_txdesc *txd;
1259 sc->are_cdata.are_tx_prod = 0;
1260 sc->are_cdata.are_tx_cons = 0;
1261 sc->are_cdata.are_tx_cnt = 0;
1262 sc->are_cdata.are_tx_pkts = 0;
1264 rd = &sc->are_rdata;
1265 bzero(rd->are_tx_ring, ARE_TX_RING_SIZE);
1266 for (i = 0; i < ARE_TX_RING_CNT; i++) {
1267 if (i == ARE_TX_RING_CNT - 1)
1268 addr = ARE_TX_RING_ADDR(sc, 0);
1270 addr = ARE_TX_RING_ADDR(sc, i + 1);
1271 rd->are_tx_ring[i].are_stat = 0;
1272 rd->are_tx_ring[i].are_devcs = 0;
1273 rd->are_tx_ring[i].are_addr = 0;
1274 rd->are_tx_ring[i].are_link = addr;
1275 txd = &sc->are_cdata.are_txdesc[i];
1279 bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
1280 sc->are_cdata.are_tx_ring_map,
1281 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1287 * Initialize the RX descriptors and allocate mbufs for them. Note that
1288 * we arrange the descriptors in a closed ring, so that the last descriptor
1289 * points back to the first.
1292 are_rx_ring_init(struct are_softc *sc)
1294 struct are_ring_data *rd;
1295 struct are_rxdesc *rxd;
1299 sc->are_cdata.are_rx_cons = 0;
1301 rd = &sc->are_rdata;
1302 bzero(rd->are_rx_ring, ARE_RX_RING_SIZE);
1303 for (i = 0; i < ARE_RX_RING_CNT; i++) {
1304 rxd = &sc->are_cdata.are_rxdesc[i];
1306 rxd->desc = &rd->are_rx_ring[i];
1307 if (i == ARE_RX_RING_CNT - 1)
1308 addr = ARE_RX_RING_ADDR(sc, 0);
1310 addr = ARE_RX_RING_ADDR(sc, i + 1);
1311 rd->are_rx_ring[i].are_stat = ADSTAT_OWN;
1312 rd->are_rx_ring[i].are_devcs = ADCTL_CH;
1313 if (i == ARE_RX_RING_CNT - 1)
1314 rd->are_rx_ring[i].are_devcs |= ADCTL_ER;
1315 rd->are_rx_ring[i].are_addr = 0;
1316 rd->are_rx_ring[i].are_link = addr;
1317 if (are_newbuf(sc, i) != 0)
1321 bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
1322 sc->are_cdata.are_rx_ring_map,
1323 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1329 * Initialize an RX descriptor and attach an MBUF cluster.
1332 are_newbuf(struct are_softc *sc, int idx)
1334 struct are_desc *desc;
1335 struct are_rxdesc *rxd;
1337 bus_dma_segment_t segs[1];
1341 m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1344 m->m_len = m->m_pkthdr.len = MCLBYTES;
1346 // tcp header boundary margin
1349 if (bus_dmamap_load_mbuf_sg(sc->are_cdata.are_rx_tag,
1350 sc->are_cdata.are_rx_sparemap, m, segs, &nsegs, 0) != 0) {
1354 KASSERT(nsegs == 1, ("%s: %d segments returned!", __func__, nsegs));
1356 rxd = &sc->are_cdata.are_rxdesc[idx];
1357 if (rxd->rx_m != NULL) {
1358 // This code make bug. Make scranble on buffer data.
1359 // bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
1360 // BUS_DMASYNC_POSTREAD);
1361 bus_dmamap_unload(sc->are_cdata.are_rx_tag, rxd->rx_dmamap);
1363 map = rxd->rx_dmamap;
1364 rxd->rx_dmamap = sc->are_cdata.are_rx_sparemap;
1365 sc->are_cdata.are_rx_sparemap = map;
1366 bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
1367 BUS_DMASYNC_PREREAD);
1370 desc->are_addr = segs[0].ds_addr;
1371 desc->are_devcs |= ARE_DMASIZE(segs[0].ds_len);
1372 rxd->saved_ca = desc->are_addr ;
1373 rxd->saved_ctl = desc->are_stat ;
1378 static __inline void
1379 are_fixup_rx(struct mbuf *m)
1382 uint16_t *src, *dst;
1384 src = mtod(m, uint16_t *);
1387 for (i = 0; i < m->m_len / sizeof(uint16_t); i++) {
1391 if (m->m_len % sizeof(uint16_t))
1392 *(uint8_t *)dst = *(uint8_t *)src;
1394 m->m_data -= ETHER_ALIGN;
1399 are_tx(struct are_softc *sc)
1401 struct are_txdesc *txd;
1402 struct are_desc *cur_tx;
1404 uint32_t ctl, devcs;
1407 ARE_LOCK_ASSERT(sc);
1409 cons = sc->are_cdata.are_tx_cons;
1410 prod = sc->are_cdata.are_tx_prod;
1414 bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
1415 sc->are_cdata.are_tx_ring_map,
1416 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1420 * Go through our tx list and free mbufs for those
1421 * frames that have been transmitted.
1423 for (; cons != prod; ARE_INC(cons, ARE_TX_RING_CNT)) {
1424 cur_tx = &sc->are_rdata.are_tx_ring[cons];
1425 ctl = cur_tx->are_stat;
1426 devcs = cur_tx->are_devcs;
1427 /* Check if descriptor has "finished" flag */
1428 if (ARE_DMASIZE(devcs) == 0)
1431 sc->are_cdata.are_tx_cnt--;
1432 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1434 txd = &sc->are_cdata.are_txdesc[cons];
1436 if ((ctl & ADSTAT_Tx_ES) == 0)
1437 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1439 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1442 bus_dmamap_sync(sc->are_cdata.are_tx_tag, txd->tx_dmamap,
1443 BUS_DMASYNC_POSTWRITE);
1444 bus_dmamap_unload(sc->are_cdata.are_tx_tag, txd->tx_dmamap);
1446 /* Free only if it's first descriptor in list */
1451 /* reset descriptor */
1452 cur_tx->are_stat = 0;
1453 cur_tx->are_devcs = 0;
1454 cur_tx->are_addr = 0;
1457 sc->are_cdata.are_tx_cons = cons;
1459 bus_dmamap_sync(sc->are_cdata.are_tx_ring_tag,
1460 sc->are_cdata.are_tx_ring_map, BUS_DMASYNC_PREWRITE);
1465 are_rx(struct are_softc *sc)
1467 struct are_rxdesc *rxd;
1468 struct ifnet *ifp = sc->are_ifp;
1469 int cons, prog, packet_len, error;
1470 struct are_desc *cur_rx;
1473 ARE_LOCK_ASSERT(sc);
1475 cons = sc->are_cdata.are_rx_cons;
1477 bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
1478 sc->are_cdata.are_rx_ring_map,
1479 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1481 for (prog = 0; prog < ARE_RX_RING_CNT; ARE_INC(cons, ARE_RX_RING_CNT)) {
1482 cur_rx = &sc->are_rdata.are_rx_ring[cons];
1483 rxd = &sc->are_cdata.are_rxdesc[cons];
1486 if ((cur_rx->are_stat & ADSTAT_OWN) == ADSTAT_OWN)
1491 packet_len = ADSTAT_Rx_LENGTH(cur_rx->are_stat);
1492 /* Assume it's error */
1495 if (packet_len < 64)
1496 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1497 else if ((cur_rx->are_stat & ADSTAT_Rx_DE) == 0) {
1499 bus_dmamap_sync(sc->are_cdata.are_rx_tag, rxd->rx_dmamap,
1500 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1502 /* Skip 4 bytes of CRC */
1503 m->m_pkthdr.len = m->m_len = packet_len - ETHER_CRC_LEN;
1505 m->m_pkthdr.rcvif = ifp;
1506 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
1509 (*ifp->if_input)(ifp, m);
1514 /* Restore CONTROL and CA values, reset DEVCS */
1515 cur_rx->are_stat = rxd->saved_ctl;
1516 cur_rx->are_addr = rxd->saved_ca;
1517 cur_rx->are_devcs = 0;
1520 /* Reinit descriptor */
1521 cur_rx->are_stat = ADSTAT_OWN;
1522 cur_rx->are_devcs = 0;
1523 if (cons == ARE_RX_RING_CNT - 1)
1524 cur_rx->are_devcs |= ADCTL_ER;
1525 cur_rx->are_addr = 0;
1526 if (are_newbuf(sc, cons) != 0) {
1527 device_printf(sc->are_dev,
1528 "Failed to allocate buffer\n");
1533 bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
1534 sc->are_cdata.are_rx_ring_map,
1535 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1540 sc->are_cdata.are_rx_cons = cons;
1542 bus_dmamap_sync(sc->are_cdata.are_rx_ring_tag,
1543 sc->are_cdata.are_rx_ring_map,
1544 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1551 struct are_softc *sc = arg;
1553 struct ifnet *ifp = sc->are_ifp;
1558 /* mask out interrupts */
1560 status = CSR_READ_4(sc, CSR_STATUS);
1562 CSR_WRITE_4(sc, CSR_STATUS, status);
1564 if (status & sc->sc_rxint_mask) {
1567 if (status & sc->sc_txint_mask) {
1571 /* Try to get more packets going. */
1581 struct are_softc *sc = xsc;
1582 struct mii_data *mii;
1584 ARE_LOCK_ASSERT(sc);
1586 mii = device_get_softc(sc->are_miibus);
1588 callout_reset(&sc->are_stat_callout, hz, are_tick, sc);
1593 are_hinted_child(device_t bus, const char *dname, int dunit)
1595 BUS_ADD_CHILD(bus, 0, dname, dunit);
1596 device_printf(bus, "hinted child %s%d\n", dname, dunit);
1601 aremdio_probe(device_t dev)
1603 device_set_desc(dev, "Atheros AR531x built-in ethernet interface, MDIO controller");
1608 aremdio_attach(device_t dev)
1610 struct are_softc *sc;
1613 sc = device_get_softc(dev);
1616 sc->are_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
1617 &sc->are_rid, RF_ACTIVE | RF_SHAREABLE);
1618 if (sc->are_res == NULL) {
1619 device_printf(dev, "couldn't map memory\n");
1624 sc->are_btag = rman_get_bustag(sc->are_res);
1625 sc->are_bhandle = rman_get_bushandle(sc->are_res);
1627 bus_generic_probe(dev);
1628 bus_enumerate_hinted_children(dev);
1629 error = bus_generic_attach(dev);
1635 aremdio_detach(device_t dev)
1643 dump_txdesc(struct are_softc *sc, int pos)
1645 struct are_desc *desc;
1647 desc = &sc->are_rdata.are_tx_ring[pos];
1648 device_printf(sc->are_dev, "CSR_TXLIST %08x\n", CSR_READ_4(sc, CSR_TXLIST));
1649 device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA));
1650 device_printf(sc->are_dev, "%d TDES0:%08x TDES1:%08x TDES2:%08x TDES3:%08x\n",
1651 pos, desc->are_stat, desc->are_devcs, desc->are_addr, desc->are_link);
1655 dump_status_reg(struct are_softc *sc)
1659 /* mask out interrupts */
1661 device_printf(sc->are_dev, "CSR_HTBA %08x\n", CSR_READ_4(sc, CSR_HTBA));
1662 status = CSR_READ_4(sc, CSR_STATUS);
1663 device_printf(sc->are_dev, "CSR5 Status Register EB:%d TS:%d RS:%d NIS:%d AIS:%d ER:%d SE:%d LNF:%d TM:%d RWT:%d RPS:%d RU:%d RI:%d UNF:%d LNP/ANC:%d TJT:%d TU:%d TPS:%d TI:%d\n",
1664 (status >> 23 ) & 7,
1665 (status >> 20 ) & 7,
1666 (status >> 17 ) & 7,
1667 (status >> 16 ) & 1,
1668 (status >> 15 ) & 1,
1669 (status >> 14 ) & 1,
1670 (status >> 13 ) & 1,
1671 (status >> 12 ) & 1,
1672 (status >> 11 ) & 1,
1682 (status >> 0 ) & 1);