2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2009, Luiz Otavio O Souza.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * GPIO driver for AR71xx
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
44 #include <sys/malloc.h>
45 #include <sys/mutex.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50 #include <mips/atheros/ar71xxreg.h>
51 #include <mips/atheros/ar71xx_setup.h>
52 #include <mips/atheros/ar71xx_gpiovar.h>
53 #include <dev/gpio/gpiobusvar.h>
54 #include <mips/atheros/ar933xreg.h>
55 #include <mips/atheros/ar934xreg.h>
56 #include <mips/atheros/qca955xreg.h>
60 #define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
65 static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc,
67 static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc,
69 static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc,
70 struct gpio_pin *pin, uint32_t flags);
75 static int ar71xx_gpio_probe(device_t dev);
76 static int ar71xx_gpio_attach(device_t dev);
77 static int ar71xx_gpio_detach(device_t dev);
78 static int ar71xx_gpio_filter(void *arg);
79 static void ar71xx_gpio_intr(void *arg);
84 static device_t ar71xx_gpio_get_bus(device_t);
85 static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
86 static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
87 static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
89 static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
90 static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
91 static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
92 static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
93 static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
96 ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
98 if (ar71xx_soc == AR71XX_SOC_AR9341 ||
99 ar71xx_soc == AR71XX_SOC_AR9342 ||
100 ar71xx_soc == AR71XX_SOC_AR9344 ||
101 ar71xx_soc == AR71XX_SOC_QCA9556 ||
102 ar71xx_soc == AR71XX_SOC_QCA9558)
103 GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
105 GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
109 ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
111 if (ar71xx_soc == AR71XX_SOC_AR9341 ||
112 ar71xx_soc == AR71XX_SOC_AR9342 ||
113 ar71xx_soc == AR71XX_SOC_AR9344 ||
114 ar71xx_soc == AR71XX_SOC_QCA9556 ||
115 ar71xx_soc == AR71XX_SOC_QCA9558)
116 GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
118 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
122 ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
127 mask = 1 << pin->gp_pin;
130 * Manage input/output
132 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
133 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
134 if (flags & GPIO_PIN_OUTPUT) {
135 pin->gp_flags |= GPIO_PIN_OUTPUT;
136 GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
139 pin->gp_flags |= GPIO_PIN_INPUT;
140 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
146 ar71xx_gpio_get_bus(device_t dev)
148 struct ar71xx_gpio_softc *sc;
150 sc = device_get_softc(dev);
156 ar71xx_gpio_pin_max(device_t dev, int *maxpin)
159 switch (ar71xx_soc) {
160 case AR71XX_SOC_AR9130:
161 case AR71XX_SOC_AR9132:
162 *maxpin = AR91XX_GPIO_PINS - 1;
164 case AR71XX_SOC_AR7240:
165 case AR71XX_SOC_AR7241:
166 case AR71XX_SOC_AR7242:
167 *maxpin = AR724X_GPIO_PINS - 1;
169 case AR71XX_SOC_AR9330:
170 case AR71XX_SOC_AR9331:
171 *maxpin = AR933X_GPIO_COUNT - 1;
173 case AR71XX_SOC_AR9341:
174 case AR71XX_SOC_AR9342:
175 case AR71XX_SOC_AR9344:
176 *maxpin = AR934X_GPIO_COUNT - 1;
177 case AR71XX_SOC_QCA9556:
178 case AR71XX_SOC_QCA9558:
179 *maxpin = QCA955X_GPIO_COUNT - 1;
182 *maxpin = AR71XX_GPIO_PINS - 1;
188 ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
190 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
193 for (i = 0; i < sc->gpio_npins; i++) {
194 if (sc->gpio_pins[i].gp_pin == pin)
198 if (i >= sc->gpio_npins)
202 *caps = sc->gpio_pins[i].gp_caps;
209 ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
211 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
214 for (i = 0; i < sc->gpio_npins; i++) {
215 if (sc->gpio_pins[i].gp_pin == pin)
219 if (i >= sc->gpio_npins)
223 *flags = sc->gpio_pins[i].gp_flags;
230 ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
232 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
235 for (i = 0; i < sc->gpio_npins; i++) {
236 if (sc->gpio_pins[i].gp_pin == pin)
240 if (i >= sc->gpio_npins)
244 memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
251 ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
254 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
256 for (i = 0; i < sc->gpio_npins; i++) {
257 if (sc->gpio_pins[i].gp_pin == pin)
261 if (i >= sc->gpio_npins)
264 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
270 ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
272 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
275 for (i = 0; i < sc->gpio_npins; i++) {
276 if (sc->gpio_pins[i].gp_pin == pin)
280 if (i >= sc->gpio_npins)
284 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
286 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
292 ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
294 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
297 for (i = 0; i < sc->gpio_npins; i++) {
298 if (sc->gpio_pins[i].gp_pin == pin)
302 if (i >= sc->gpio_npins)
305 *val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
311 ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
314 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
316 for (i = 0; i < sc->gpio_npins; i++) {
317 if (sc->gpio_pins[i].gp_pin == pin)
321 if (i >= sc->gpio_npins)
324 res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
326 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
328 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
334 ar71xx_gpio_filter(void *arg)
337 /* TODO: something useful */
338 return (FILTER_STRAY);
344 ar71xx_gpio_intr(void *arg)
346 struct ar71xx_gpio_softc *sc = arg;
348 /* TODO: something useful */
353 ar71xx_gpio_probe(device_t dev)
356 device_set_desc(dev, "Atheros AR71XX GPIO driver");
361 ar71xx_gpio_attach(device_t dev)
363 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
368 KASSERT((device_get_unit(dev) == 0),
369 ("ar71xx_gpio: Only one gpio module supported"));
371 mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
373 /* Map control/status registers. */
374 sc->gpio_mem_rid = 0;
375 sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
376 &sc->gpio_mem_rid, RF_ACTIVE);
378 if (sc->gpio_mem_res == NULL) {
379 device_printf(dev, "couldn't map memory\n");
380 ar71xx_gpio_detach(dev);
384 if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
385 &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
386 device_printf(dev, "unable to allocate IRQ resource\n");
387 ar71xx_gpio_detach(dev);
391 if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
392 ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
394 "WARNING: unable to register interrupt handler\n");
395 ar71xx_gpio_detach(dev);
401 /* Enable function bits that are required */
402 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
403 "function_set", &mask) == 0) {
404 device_printf(dev, "function_set: 0x%x\n", mask);
405 ar71xx_gpio_function_enable(sc, mask);
407 /* Disable function bits that are required */
408 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
409 "function_clear", &mask) == 0) {
410 device_printf(dev, "function_clear: 0x%x\n", mask);
411 ar71xx_gpio_function_disable(sc, mask);
414 /* Disable interrupts for all pins. */
415 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
417 /* Initialise all pins specified in the mask, up to the pin count */
418 (void) ar71xx_gpio_pin_max(dev, &maxpin);
419 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
420 "pinmask", &mask) != 0)
422 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
423 "pinon", &pinon) != 0)
425 device_printf(dev, "gpio pinmask=0x%x\n", mask);
426 for (j = 0; j <= maxpin; j++) {
427 if ((mask & (1 << j)) == 0)
431 /* Iniatilize the GPIO pins, keep the loader settings. */
432 oe = GPIO_READ(sc, AR71XX_GPIO_OE);
433 sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins,
434 M_DEVBUF, M_WAITOK | M_ZERO);
435 for (i = 0, j = 0; j <= maxpin; j++) {
436 if ((mask & (1 << j)) == 0)
438 snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
440 sc->gpio_pins[i].gp_pin = j;
441 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
443 sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
445 sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
448 /* Turn on the hinted pins. */
449 for (i = 0; i < sc->gpio_npins; i++) {
450 j = sc->gpio_pins[i].gp_pin;
451 if ((pinon & (1 << j)) != 0) {
452 ar71xx_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
453 ar71xx_gpio_pin_set(dev, j, 1);
456 sc->busdev = gpiobus_attach_bus(dev);
457 if (sc->busdev == NULL) {
458 ar71xx_gpio_detach(dev);
466 ar71xx_gpio_detach(device_t dev)
468 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
470 KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
472 gpiobus_detach_bus(dev);
474 bus_teardown_intr(dev, sc->gpio_irq_res, sc->gpio_ih);
475 if (sc->gpio_irq_res)
476 bus_release_resource(dev, SYS_RES_IRQ, sc->gpio_irq_rid,
478 if (sc->gpio_mem_res)
479 bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
482 free(sc->gpio_pins, M_DEVBUF);
483 mtx_destroy(&sc->gpio_mtx);
488 static device_method_t ar71xx_gpio_methods[] = {
489 DEVMETHOD(device_probe, ar71xx_gpio_probe),
490 DEVMETHOD(device_attach, ar71xx_gpio_attach),
491 DEVMETHOD(device_detach, ar71xx_gpio_detach),
494 DEVMETHOD(gpio_get_bus, ar71xx_gpio_get_bus),
495 DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
496 DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
497 DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
498 DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
499 DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
500 DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
501 DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
502 DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
506 static driver_t ar71xx_gpio_driver = {
509 sizeof(struct ar71xx_gpio_softc),
511 static devclass_t ar71xx_gpio_devclass;
513 DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);