2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * Copyright (c) 2009, Luiz Otavio O Souza.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * GPIO driver for AR71xx
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include <sys/param.h>
37 #include <sys/systm.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
44 #include <sys/malloc.h>
45 #include <sys/mutex.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
50 #include <mips/atheros/ar71xxreg.h>
51 #include <mips/atheros/ar71xx_setup.h>
52 #include <mips/atheros/ar71xx_gpiovar.h>
53 #include <mips/atheros/ar933xreg.h>
54 #include <mips/atheros/ar934xreg.h>
58 #define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT)
63 static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc,
65 static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc,
67 static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc,
68 struct gpio_pin *pin, uint32_t flags);
73 static int ar71xx_gpio_probe(device_t dev);
74 static int ar71xx_gpio_attach(device_t dev);
75 static int ar71xx_gpio_detach(device_t dev);
76 static int ar71xx_gpio_filter(void *arg);
77 static void ar71xx_gpio_intr(void *arg);
82 static int ar71xx_gpio_pin_max(device_t dev, int *maxpin);
83 static int ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps);
84 static int ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t
86 static int ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name);
87 static int ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags);
88 static int ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value);
89 static int ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val);
90 static int ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin);
93 ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, uint32_t mask)
95 if (ar71xx_soc == AR71XX_SOC_AR9341 ||
96 ar71xx_soc == AR71XX_SOC_AR9342 ||
97 ar71xx_soc == AR71XX_SOC_AR9344)
98 GPIO_SET_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
100 GPIO_SET_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
104 ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, uint32_t mask)
106 if (ar71xx_soc == AR71XX_SOC_AR9341 ||
107 ar71xx_soc == AR71XX_SOC_AR9342 ||
108 ar71xx_soc == AR71XX_SOC_AR9344)
109 GPIO_CLEAR_BITS(sc, AR934X_GPIO_REG_FUNC, mask);
111 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_FUNCTION, mask);
115 ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, struct gpio_pin *pin,
120 mask = 1 << pin->gp_pin;
123 * Manage input/output
125 if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) {
126 pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT);
127 if (flags & GPIO_PIN_OUTPUT) {
128 pin->gp_flags |= GPIO_PIN_OUTPUT;
129 GPIO_SET_BITS(sc, AR71XX_GPIO_OE, mask);
132 pin->gp_flags |= GPIO_PIN_INPUT;
133 GPIO_CLEAR_BITS(sc, AR71XX_GPIO_OE, mask);
139 ar71xx_gpio_pin_max(device_t dev, int *maxpin)
142 switch (ar71xx_soc) {
143 case AR71XX_SOC_AR9130:
144 case AR71XX_SOC_AR9132:
145 *maxpin = AR91XX_GPIO_PINS - 1;
147 case AR71XX_SOC_AR7240:
148 case AR71XX_SOC_AR7241:
149 case AR71XX_SOC_AR7242:
150 *maxpin = AR724X_GPIO_PINS - 1;
152 case AR71XX_SOC_AR9330:
153 case AR71XX_SOC_AR9331:
154 *maxpin = AR933X_GPIO_COUNT - 1;
156 case AR71XX_SOC_AR9341:
157 case AR71XX_SOC_AR9342:
158 case AR71XX_SOC_AR9344:
159 *maxpin = AR934X_GPIO_COUNT - 1;
162 *maxpin = AR71XX_GPIO_PINS - 1;
168 ar71xx_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
170 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
173 for (i = 0; i < sc->gpio_npins; i++) {
174 if (sc->gpio_pins[i].gp_pin == pin)
178 if (i >= sc->gpio_npins)
182 *caps = sc->gpio_pins[i].gp_caps;
189 ar71xx_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
191 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
194 for (i = 0; i < sc->gpio_npins; i++) {
195 if (sc->gpio_pins[i].gp_pin == pin)
199 if (i >= sc->gpio_npins)
203 *flags = sc->gpio_pins[i].gp_flags;
210 ar71xx_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
212 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
215 for (i = 0; i < sc->gpio_npins; i++) {
216 if (sc->gpio_pins[i].gp_pin == pin)
220 if (i >= sc->gpio_npins)
224 memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME);
231 ar71xx_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
234 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
236 for (i = 0; i < sc->gpio_npins; i++) {
237 if (sc->gpio_pins[i].gp_pin == pin)
241 if (i >= sc->gpio_npins)
244 /* Check for unwanted flags. */
245 if ((flags & sc->gpio_pins[i].gp_caps) != flags)
248 /* Can't mix input/output together */
249 if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) ==
250 (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT))
253 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], flags);
258 ar71xx_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
260 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
263 for (i = 0; i < sc->gpio_npins; i++) {
264 if (sc->gpio_pins[i].gp_pin == pin)
268 if (i >= sc->gpio_npins)
272 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
274 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
280 ar71xx_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
282 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
285 for (i = 0; i < sc->gpio_npins; i++) {
286 if (sc->gpio_pins[i].gp_pin == pin)
290 if (i >= sc->gpio_npins)
293 *val = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
299 ar71xx_gpio_pin_toggle(device_t dev, uint32_t pin)
302 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
304 for (i = 0; i < sc->gpio_npins; i++) {
305 if (sc->gpio_pins[i].gp_pin == pin)
309 if (i >= sc->gpio_npins)
312 res = (GPIO_READ(sc, AR71XX_GPIO_IN) & (1 << pin)) ? 1 : 0;
314 GPIO_WRITE(sc, AR71XX_GPIO_CLEAR, (1 << pin));
316 GPIO_WRITE(sc, AR71XX_GPIO_SET, (1 << pin));
322 ar71xx_gpio_filter(void *arg)
325 /* TODO: something useful */
326 return (FILTER_STRAY);
332 ar71xx_gpio_intr(void *arg)
334 struct ar71xx_gpio_softc *sc = arg;
336 /* TODO: something useful */
341 ar71xx_gpio_probe(device_t dev)
344 device_set_desc(dev, "Atheros AR71XX GPIO driver");
349 ar71xx_gpio_attach(device_t dev)
351 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
357 KASSERT((device_get_unit(dev) == 0),
358 ("ar71xx_gpio: Only one gpio module supported"));
360 mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
362 /* Map control/status registers. */
363 sc->gpio_mem_rid = 0;
364 sc->gpio_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
365 &sc->gpio_mem_rid, RF_ACTIVE);
367 if (sc->gpio_mem_res == NULL) {
368 device_printf(dev, "couldn't map memory\n");
370 ar71xx_gpio_detach(dev);
374 if ((sc->gpio_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
375 &sc->gpio_irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
376 device_printf(dev, "unable to allocate IRQ resource\n");
380 if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC,
381 ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) {
383 "WARNING: unable to register interrupt handler\n");
389 /* Enable function bits that are required */
390 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
391 "function_set", &mask) == 0) {
392 device_printf(dev, "function_set: 0x%x\n", mask);
393 ar71xx_gpio_function_enable(sc, mask);
395 /* Disable function bits that are required */
396 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
397 "function_clear", &mask) == 0) {
398 device_printf(dev, "function_clear: 0x%x\n", mask);
399 ar71xx_gpio_function_disable(sc, mask);
402 /* Disable interrupts for all pins. */
403 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0);
405 /* Initialise all pins specified in the mask, up to the pin count */
406 (void) ar71xx_gpio_pin_max(dev, &maxpin);
407 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
408 "pinmask", &mask) != 0)
410 if (resource_int_value(device_get_name(dev), device_get_unit(dev),
411 "pinon", &pinon) != 0)
413 device_printf(dev, "gpio pinmask=0x%x\n", mask);
414 for (j = 0; j <= maxpin; j++) {
415 if ((mask & (1 << j)) == 0)
419 /* Iniatilize the GPIO pins, keep the loader settings. */
420 oe = GPIO_READ(sc, AR71XX_GPIO_OE);
421 sc->gpio_pins = malloc(sizeof(*sc->gpio_pins) * sc->gpio_npins,
422 M_DEVBUF, M_WAITOK | M_ZERO);
423 for (i = 0, j = 0; j <= maxpin; j++) {
424 if ((mask & (1 << j)) == 0)
426 snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME,
428 sc->gpio_pins[i].gp_pin = j;
429 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS;
431 sc->gpio_pins[i].gp_flags = GPIO_PIN_OUTPUT;
433 sc->gpio_pins[i].gp_flags = GPIO_PIN_INPUT;
436 /* Turn on the hinted pins. */
437 for (i = 0; i < sc->gpio_npins; i++) {
438 j = sc->gpio_pins[i].gp_pin;
439 if ((pinon & (1 << j)) != 0) {
440 ar71xx_gpio_pin_setflags(dev, j, GPIO_PIN_OUTPUT);
441 ar71xx_gpio_pin_set(dev, j, 1);
444 device_add_child(dev, "gpioc", device_get_unit(dev));
445 device_add_child(dev, "gpiobus", device_get_unit(dev));
446 return (bus_generic_attach(dev));
450 ar71xx_gpio_detach(device_t dev)
452 struct ar71xx_gpio_softc *sc = device_get_softc(dev);
454 KASSERT(mtx_initialized(&sc->gpio_mtx), ("gpio mutex not initialized"));
456 bus_generic_detach(dev);
458 if (sc->gpio_mem_res)
459 bus_release_resource(dev, SYS_RES_MEMORY, sc->gpio_mem_rid,
462 free(sc->gpio_pins, M_DEVBUF);
463 mtx_destroy(&sc->gpio_mtx);
468 static device_method_t ar71xx_gpio_methods[] = {
469 DEVMETHOD(device_probe, ar71xx_gpio_probe),
470 DEVMETHOD(device_attach, ar71xx_gpio_attach),
471 DEVMETHOD(device_detach, ar71xx_gpio_detach),
474 DEVMETHOD(gpio_pin_max, ar71xx_gpio_pin_max),
475 DEVMETHOD(gpio_pin_getname, ar71xx_gpio_pin_getname),
476 DEVMETHOD(gpio_pin_getflags, ar71xx_gpio_pin_getflags),
477 DEVMETHOD(gpio_pin_getcaps, ar71xx_gpio_pin_getcaps),
478 DEVMETHOD(gpio_pin_setflags, ar71xx_gpio_pin_setflags),
479 DEVMETHOD(gpio_pin_get, ar71xx_gpio_pin_get),
480 DEVMETHOD(gpio_pin_set, ar71xx_gpio_pin_set),
481 DEVMETHOD(gpio_pin_toggle, ar71xx_gpio_pin_toggle),
485 static driver_t ar71xx_gpio_driver = {
488 sizeof(struct ar71xx_gpio_softc),
490 static devclass_t ar71xx_gpio_devclass;
492 DRIVER_MODULE(ar71xx_gpio, apb, ar71xx_gpio_driver, ar71xx_gpio_devclass, 0, 0);