sys/mips/atheros/ar71xx_pci_bus_space.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice unmodified, this list of conditions, and the following
  12  *    disclaimer.
  13  * 2. Redistributions in binary form must reproduce the above copyright
  14  *    notice, this list of conditions and the following disclaimer in the
  15  *    documentation and/or other materials provided with the distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  */
  29 #include <sys/cdefs.h>
  30 __FBSDID("$FreeBSD$");
  31
  32 #include <sys/param.h>
  33 #include <sys/systm.h>
  34 #include <sys/bus.h>
  35 #include <sys/endian.h>
  36
  37 #include <machine/bus.h>
  38 #include <mips/atheros/ar71xx_pci_bus_space.h>
  39
  40 static bs_r_1_s_proto(pcimem);
  41 static bs_r_2_s_proto(pcimem);
  42 static bs_r_4_s_proto(pcimem);
  43 static bs_w_1_s_proto(pcimem);
  44 static bs_w_2_s_proto(pcimem);
  45 static bs_w_4_s_proto(pcimem);
  46
  47 /*
  48  * Bus space that handles offsets in word for 1/2 bytes read/write access.
  49  * Byte order of values is handled by device drivers itself.
  50  */
  51 static struct bus_space bus_space_pcimem = {
  52         /* cookie */
  53         (void *) 0,
  54
  55         /* mapping/unmapping */
  56         generic_bs_map,
  57         generic_bs_unmap,
  58         generic_bs_subregion,
  59
  60         /* allocation/deallocation */
  61         NULL,
  62         NULL,
  63
  64         /* barrier */
  65         generic_bs_barrier,
  66
  67         /* read (single) */
  68         generic_bs_r_1,
  69         generic_bs_r_2,
  70         generic_bs_r_4,
  71         NULL,
  72
  73         /* read multiple */
  74         generic_bs_rm_1,
  75         generic_bs_rm_2,
  76         generic_bs_rm_4,
  77         NULL,
  78
  79         /* read region */
  80         generic_bs_rr_1,
  81         generic_bs_rr_2,
  82         generic_bs_rr_4,
  83         NULL,
  84
  85         /* write (single) */
  86         generic_bs_w_1,
  87         generic_bs_w_2,
  88         generic_bs_w_4,
  89         NULL,
  90
  91         /* write multiple */
  92         generic_bs_wm_1,
  93         generic_bs_wm_2,
  94         generic_bs_wm_4,
  95         NULL,
  96
  97         /* write region */
  98         NULL,
  99         generic_bs_wr_2,
 100         generic_bs_wr_4,
 101         NULL,
 102
 103         /* set multiple */
 104         NULL,
 105         NULL,
 106         NULL,
 107         NULL,
 108
 109         /* set region */
 110         NULL,
 111         generic_bs_sr_2,
 112         generic_bs_sr_4,
 113         NULL,
 114
 115         /* copy */
 116         NULL,
 117         generic_bs_c_2,
 118         NULL,
 119         NULL,
 120
 121         /* read (single) stream */
 122         pcimem_bs_r_1_s,
 123         pcimem_bs_r_2_s,
 124         pcimem_bs_r_4_s,
 125         NULL,
 126
 127         /* read multiple stream */
 128         generic_bs_rm_1,
 129         generic_bs_rm_2,
 130         generic_bs_rm_4,
 131         NULL,
 132
 133         /* read region stream */
 134         generic_bs_rr_1,
 135         generic_bs_rr_2,
 136         generic_bs_rr_4,
 137         NULL,
 138
 139         /* write (single) stream */
 140         pcimem_bs_w_1_s,
 141         pcimem_bs_w_2_s,
 142         pcimem_bs_w_4_s,
 143         NULL,
 144
 145         /* write multiple stream */
 146         generic_bs_wm_1,
 147         generic_bs_wm_2,
 148         generic_bs_wm_4,
 149         NULL,
 150
 151         /* write region stream */
 152         NULL,
 153         generic_bs_wr_2,
 154         generic_bs_wr_4,
 155         NULL,
 156 };
 157
 158 bus_space_tag_t ar71xx_bus_space_pcimem = &bus_space_pcimem;
 159
 160 static uint8_t
 161 pcimem_bs_r_1_s(void *t, bus_space_handle_t h, bus_size_t o)
 162 {
 163
 164         return readb(h + (o &~ 3) + (3 - (o & 3)));
 165 }
 166
 167 static void
 168 pcimem_bs_w_1_s(void *t, bus_space_handle_t h, bus_size_t o, u_int8_t v)
 169 {
 170
 171         writeb(h + (o &~ 3) + (3 - (o & 3)), v);
 172 }
 173
 174 static uint16_t
 175 pcimem_bs_r_2_s(void *t, bus_space_handle_t h, bus_size_t o)
 176 {
 177
 178         return readw(h + (o &~ 3) + (2 - (o & 3)));
 179 }
 180
 181 static void
 182 pcimem_bs_w_2_s(void *t, bus_space_handle_t h, bus_size_t o, uint16_t v)
 183 {
 184
 185         writew(h + (o &~ 3) + (2 - (o & 3)), v);
 186 }
 187
 188 static uint32_t
 189 pcimem_bs_r_4_s(void *t, bus_space_handle_t h, bus_size_t o)
 190 {
 191
 192         return le32toh(readl(h + o));
 193 }
 194
 195 static void
 196 pcimem_bs_w_4_s(void *t, bus_space_handle_t h, bus_size_t o, uint32_t v)
 197 {
 198
 199         writel(h + o, htole32(v));
 200 }