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41 /*------------------------------------------------------------------
42 * octeon_ipd.h Input Packet Unit
44 *------------------------------------------------------------------
48 #ifndef ___OCTEON_IPD__H___
49 #define ___OCTEON_IPD__H___
54 OCTEON_IPD_OPC_MODE_STT = 0LL, /* All blocks DRAM, not cached in L2 */
55 OCTEON_IPD_OPC_MODE_STF = 1LL, /* All blocks into L2 */
56 OCTEON_IPD_OPC_MODE_STF1_STT = 2LL, /* 1st block L2, rest DRAM */
57 OCTEON_IPD_OPC_MODE_STF2_STT = 3LL /* 1st, 2nd blocks L2, rest DRAM */
64 * IPD_CTL_STATUS = IPS'd Control Status Register
65 * The number of words in a MBUFF used for packet data store.
70 uint64_t reserved : 58; /* Reserved */
71 uint64_t pkt_lend : 1; /* Pkt Lil-Endian Writes to L2C */
72 uint64_t wqe_lend : 1; /* WQE Lik-Endian Writes to L2C */
73 uint64_t pbp_en : 1; /* Enable Back-Pressure */
74 octeon_ipd_mode_t opc_mode : 2; /* Pkt data in Mem/L2-cache ? */
75 uint64_t ipd_en : 1; /* Enable IPD */
77 } octeon_ipd_ctl_status_t;
81 * IPD_1ST_NEXT_PTR_BACK = IPD First Next Pointer Back Values
83 * Contains the Back Field for use in creating the Next Pointer Header
89 uint64_t reserved : 60; /* Must be zero */
90 uint64_t back : 4; /* Used to find head of buffer from the nxt-hdr-ptr. */
92 } octeon_ipd_first_next_ptr_back_t;
96 * IPD_INTERRUPT_ENB = IPD Interrupt Enable Register
98 * Used to enable the various interrupting conditions of IPD
103 uint64_t reserved : 59; /* Must be zero */
104 uint64_t bp_sub : 1; /* BP subtract is illegal val */
105 uint64_t prc_par3 : 1; /* PBM Bits [127:96] Parity Err */
106 uint64_t prc_par2 : 1; /* PBM Bits [ 95:64] Parity Err */
107 uint64_t prc_par1 : 1; /* PBM Bits [ 63:32] Parity Err */
108 uint64_t prc_par0 : 1; /* PBM Bits [ 31:0 ] Parity Err */
110 } octeon_ipd_int_enb_t;
114 * IPD_INTERRUPT_SUM = IPD Interrupt Summary Register
116 * Set when an interrupt condition occurs, write '1' to clear.
121 uint64_t reserved : 59; /* Must be zero */
122 uint64_t bp_sub : 1; /* BP subtract is illegal val */
123 uint64_t prc_par3 : 1; /* PBM Bits [127:96] Parity Err */
124 uint64_t prc_par2 : 1; /* PBM Bits [ 95:64] Parity Err */
125 uint64_t prc_par1 : 1; /* PBM Bits [ 63:32] Parity Err */
126 uint64_t prc_par0 : 1; /* PBM Bits [ 31:0 ] Parity Err */
128 } octeon_ipd_int_sum_t;
132 * IPD_1ST_MBUFF_SKIP = IPD First MBUFF Word Skip Size
134 * The number of words that the IPD will skip when writing the first MBUFF.
139 uint64_t reserved : 58; /* Must be zero */
140 uint64_t skip_sz : 6; /* 64bit words from the top of */
141 /* 1st MBUFF that the IPD will */
142 /* store the next-pointer. */
144 /* (skip_sz + 16) <= IPD_PACKET_MBUFF_SIZE[MB_SIZE]. */
146 } octeon_ipd_mbuff_first_skip_t;
150 * IPD_PACKET_MBUFF_SIZE = IPD's PACKET MUBUF Size In Words
152 * The number of words in a MBUFF used for packet data store.
157 uint64_t reserved : 52; /* Must be zero */
158 uint64_t mb_size : 12; /* 64bit words in a MBUF. */
159 /* Must be [32..2048] */
160 /* Is also the size of the FPA's */
161 /* Queue-0 Free-Page */
163 } octeon_ipd_mbuff_size_t;
167 * IPD_WQE_FPA_QUEUE = IPD Work-Queue-Entry FPA Page Size
169 * Which FPA Queue (0-7) to fetch page-pointers from for WQE's
174 uint64_t reserved : 61; /* Must be zero */
175 uint64_t wqe_pool : 3; /* FPA Pool to fetch WQE Page-ptrs */
177 } octeon_ipd_wqe_fpa_pool_t;
182 /* End of Control and Status Register (CSR) definitions */
184 typedef octeon_ipd_mbuff_first_skip_t octeon_ipd_mbuff_not_first_skip_t;
185 typedef octeon_ipd_first_next_ptr_back_t octeon_ipd_second_next_ptr_back_t;
191 extern void octeon_ipd_enable(void);
192 extern void octeon_ipd_disable(void);
193 extern void octeon_ipd_config(u_int mbuff_size,
194 u_int first_mbuff_skip,
195 u_int not_first_mbuff_skip,
199 octeon_ipd_mode_t cache_mode,
200 u_int back_pres_enable_flag);
204 #endif /* ___OCTEON_IPD__H___ */