sys/mips/cavium/octeon_machdep.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30 #include <sys/cdefs.h>
  31 __FBSDID("$FreeBSD$");
  32
  33 #include <sys/param.h>
  34 #include <sys/boot.h>
  35 #include <sys/conf.h>
  36 #include <sys/kernel.h>
  37 #include <sys/systm.h>
  38 #include <sys/imgact.h>
  39 #include <sys/bio.h>
  40 #include <sys/buf.h>
  41 #include <sys/bus.h>
  42 #include <sys/cpu.h>
  43 #include <sys/cons.h>
  44 #include <sys/exec.h>
  45 #include <sys/ucontext.h>
  46 #include <sys/proc.h>
  47 #include <sys/kdb.h>
  48 #include <sys/ptrace.h>
  49 #include <sys/reboot.h>
  50 #include <sys/signalvar.h>
  51 #include <sys/sysctl.h>
  52 #include <sys/sysent.h>
  53 #include <sys/sysproto.h>
  54 #include <sys/time.h>
  55 #include <sys/timetc.h>
  56 #include <sys/user.h>
  57
  58 #include <vm/vm.h>
  59 #include <vm/vm_param.h>
  60 #include <vm/vm_object.h>
  61 #include <vm/vm_page.h>
  62 #include <vm/vm_phys.h>
  63
  64 #include <machine/atomic.h>
  65 #include <machine/cache.h>
  66 #include <machine/clock.h>
  67 #include <machine/cpu.h>
  68 #include <machine/cpuregs.h>
  69 #include <machine/cpufunc.h>
  70 #include <mips/cavium/octeon_pcmap_regs.h>
  71 #include <machine/hwfunc.h>
  72 #include <machine/intr_machdep.h>
  73 #include <machine/locore.h>
  74 #include <machine/md_var.h>
  75 #include <machine/pcpu.h>
  76 #include <machine/pte.h>
  77 #include <machine/trap.h>
  78
  79 #include <contrib/octeon-sdk/cvmx.h>
  80 #include <contrib/octeon-sdk/cvmx-bootmem.h>
  81 #include <contrib/octeon-sdk/cvmx-ebt3000.h>
  82 #include <contrib/octeon-sdk/cvmx-helper-cfg.h>
  83 #include <contrib/octeon-sdk/cvmx-interrupt.h>
  84 #include <contrib/octeon-sdk/cvmx-version.h>
  85
  86 #include <mips/cavium/octeon_irq.h>
  87
  88 #if defined(__mips_n64)
  89 #define MAX_APP_DESC_ADDR     0xffffffffafffffff
  90 #else
  91 #define MAX_APP_DESC_ADDR     0xafffffff
  92 #endif
  93
  94 struct octeon_feature_description {
  95         octeon_feature_t ofd_feature;
  96         const char *ofd_string;
  97 };
  98
  99 extern int      *end;
 100 extern char cpu_model[];
 101 extern char cpu_board[];
 102 static char octeon_kenv[0x2000];
 103
 104 static const struct octeon_feature_description octeon_feature_descriptions[] = {
 105         { OCTEON_FEATURE_SAAD,                  "SAAD" },
 106         { OCTEON_FEATURE_ZIP,                   "ZIP" },
 107         { OCTEON_FEATURE_CRYPTO,                "CRYPTO" },
 108         { OCTEON_FEATURE_DORM_CRYPTO,           "DORM_CRYPTO" },
 109         { OCTEON_FEATURE_PCIE,                  "PCIE" },
 110         { OCTEON_FEATURE_SRIO,                  "SRIO" },
 111         { OCTEON_FEATURE_KEY_MEMORY,            "KEY_MEMORY" },
 112         { OCTEON_FEATURE_LED_CONTROLLER,        "LED_CONTROLLER" },
 113         { OCTEON_FEATURE_TRA,                   "TRA" },
 114         { OCTEON_FEATURE_MGMT_PORT,             "MGMT_PORT" },
 115         { OCTEON_FEATURE_RAID,                  "RAID" },
 116         { OCTEON_FEATURE_USB,                   "USB" },
 117         { OCTEON_FEATURE_NO_WPTR,               "NO_WPTR" },
 118         { OCTEON_FEATURE_DFA,                   "DFA" },
 119         { OCTEON_FEATURE_MDIO_CLAUSE_45,        "MDIO_CLAUSE_45" },
 120         { OCTEON_FEATURE_NPEI,                  "NPEI" },
 121         { OCTEON_FEATURE_ILK,                   "ILK" },
 122         { OCTEON_FEATURE_HFA,                   "HFA" },
 123         { OCTEON_FEATURE_DFM,                   "DFM" },
 124         { OCTEON_FEATURE_CIU2,                  "CIU2" },
 125         { OCTEON_FEATURE_DICI_MODE,             "DICI_MODE" },
 126         { OCTEON_FEATURE_BIT_EXTRACTOR,         "BIT_EXTRACTOR" },
 127         { OCTEON_FEATURE_NAND,                  "NAND" },
 128         { OCTEON_FEATURE_MMC,                   "MMC" },
 129         { OCTEON_FEATURE_PKND,                  "PKND" },
 130         { OCTEON_FEATURE_CN68XX_WQE,            "CN68XX_WQE" },
 131         { 0,                                    NULL }
 132 };
 133
 134 static uint64_t octeon_get_ticks(void);
 135 static unsigned octeon_get_timecount(struct timecounter *tc);
 136
 137 static void octeon_boot_params_init(register_t ptr);
 138 static void octeon_init_kenv(register_t ptr);
 139
 140 static struct timecounter octeon_timecounter = {
 141         octeon_get_timecount,   /* get_timecount */
 142         0,                      /* no poll_pps */
 143         0xffffffffu,            /* octeon_mask */
 144         0,                      /* frequency */
 145         "Octeon",               /* name */
 146         900,                    /* quality (adjusted in code) */
 147 };
 148
 149 void
 150 platform_cpu_init()
 151 {
 152         /* Nothing special yet */
 153 }
 154
 155 /*
 156  * Perform a board-level soft-reset.
 157  */
 158 void
 159 platform_reset(void)
 160 {
 161         cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
 162 }
 163
 164 /*
 165  * octeon_debug_symbol
 166  *
 167  * Does nothing.
 168  * Used to mark the point for simulator to begin tracing
 169  */
 170 void
 171 octeon_debug_symbol(void)
 172 {
 173 }
 174
 175 /*
 176  * octeon_ciu_reset
 177  *
 178  * Shutdown all CIU to IP2, IP3 mappings
 179  */
 180 void
 181 octeon_ciu_reset(void)
 182 {
 183         uint64_t cvmctl;
 184
 185         /* Disable all CIU interrupts by default */
 186         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0);
 187         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0);
 188         cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0);
 189         cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0);
 190
 191 #ifdef SMP
 192         /* Enable the MBOX interrupts.  */
 193         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
 194                        (1ull << (OCTEON_IRQ_MBOX0 - 8)) |
 195                        (1ull << (OCTEON_IRQ_MBOX1 - 8)));
 196 #endif
 197
 198         /*
 199          * Move the Performance Counter interrupt to OCTEON_PMC_IRQ
 200          */
 201         cvmctl = mips_rd_cvmctl();
 202         cvmctl &= ~(7 << 7);
 203         cvmctl |= (OCTEON_PMC_IRQ + 2) << 7;
 204         mips_wr_cvmctl(cvmctl);
 205 }
 206
 207 static void
 208 octeon_memory_init(void)
 209 {
 210         vm_paddr_t phys_end;
 211         int64_t addr;
 212         unsigned i, j;
 213
 214         phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end));
 215
 216         if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
 217                 /* Simulator we limit to 96 meg */
 218                 phys_avail[0] = phys_end;
 219                 phys_avail[1] = 96 << 20;
 220
 221                 dump_avail[0] = phys_avail[0];
 222                 dump_avail[1] = phys_avail[1];
 223
 224                 realmem = physmem = btoc(phys_avail[1] - phys_avail[0]);
 225                 return;
 226         }
 227
 228         /*
 229          * Allocate memory from bootmem 1MB at a time and merge
 230          * adjacent entries.
 231          */
 232         i = 0;
 233         while (i < PHYS_AVAIL_ENTRIES) {
 234                 /*
 235                  * If there is less than 2MB of memory available in 128-byte
 236                  * blocks, do not steal any more memory.  We need to leave some
 237                  * memory for the command queues to be allocated out of.
 238                  */
 239                 if (cvmx_bootmem_available_mem(128) < 2 << 20)
 240                         break;
 241
 242                 addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end,
 243                                               ~(vm_paddr_t)0, PAGE_SIZE, 0);
 244                 if (addr == -1)
 245                         break;
 246
 247                 /*
 248                  * The SDK needs to be able to easily map any memory that might
 249                  * come to it e.g. in the form of an mbuf.  Because on !n64 we
 250                  * can't direct-map some addresses and we don't want to manage
 251                  * temporary mappings within the SDK, don't feed memory that
 252                  * can't be direct-mapped to the kernel.
 253                  */
 254 #if !defined(__mips_n64)
 255                 if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1))
 256                         continue;
 257 #endif
 258
 259                 physmem += btoc(1 << 20);
 260
 261                 if (i > 0 && phys_avail[i - 1] == addr) {
 262                         phys_avail[i - 1] += 1 << 20;
 263                         continue;
 264                 }
 265
 266                 phys_avail[i + 0] = addr;
 267                 phys_avail[i + 1] = addr + (1 << 20);
 268
 269                 i += 2;
 270         }
 271
 272         for (j = 0; j < i; j++)
 273                 dump_avail[j] = phys_avail[j];
 274
 275         realmem = physmem;
 276 }
 277
 278 void
 279 platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
 280     __register_t a3)
 281 {
 282         const struct octeon_feature_description *ofd;
 283         uint64_t platform_counter_freq;
 284         int rv;
 285
 286         mips_postboot_fixup();
 287
 288         /*
 289          * Initialize boot parameters so that we can determine things like
 290          * which console we shoud use, etc.
 291          */
 292         octeon_boot_params_init(a3);
 293
 294         /* Initialize pcpu stuff */
 295         mips_pcpu0_init();
 296         mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz);
 297
 298         /* Initialize console.  */
 299         cninit();
 300
 301         /*
 302          * Display information about the CPU.
 303          */
 304 #if !defined(OCTEON_MODEL)
 305         printf("Using runtime CPU model checks.\n");
 306 #else
 307         printf("Compiled for CPU model: " __XSTRING(OCTEON_MODEL) "\n");
 308 #endif
 309         strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id()));
 310         printf("CPU Model: %s\n", cpu_model);
 311         printf("CPU clock: %uMHz  Core Mask: %#x\n",
 312                cvmx_sysinfo_get()->cpu_clock_hz / 1000000,
 313                cvmx_sysinfo_get()->core_mask);
 314         rv = octeon_model_version_check(cvmx_get_proc_id());
 315         if (rv == -1)
 316                 panic("%s: kernel not compatible with this processor.", __func__);
 317
 318         /*
 319          * Display information about the board.
 320          */
 321 #if defined(OCTEON_BOARD_CAPK_0100ND)
 322         strcpy(cpu_board, "CAPK-0100ND");
 323         if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) {
 324                 panic("Compiled for %s, but board type is %s.", cpu_board,
 325                        cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
 326         }
 327 #else
 328         strcpy(cpu_board,
 329                cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
 330 #endif
 331         printf("Board: %s\n", cpu_board);
 332         printf("Board Type: %u  Revision: %u/%u\n",
 333                cvmx_sysinfo_get()->board_type,
 334                cvmx_sysinfo_get()->board_rev_major,
 335                cvmx_sysinfo_get()->board_rev_minor);
 336         printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number);
 337
 338         /*
 339          * Additional on-chip hardware/settings.
 340          *
 341          * XXX Display PCI host/target?  What else?
 342          */
 343         printf("MAC address base: %6D (%u configured)\n",
 344                cvmx_sysinfo_get()->mac_addr_base, ":",
 345                cvmx_sysinfo_get()->mac_addr_count);
 346
 347
 348         octeon_ciu_reset();
 349         /*
 350          * Convert U-Boot 'bootoctlinux' loader command line arguments into
 351          * boot flags and kernel environment variables.
 352          */
 353         bootverbose = 1;
 354         octeon_init_kenv(a3);
 355
 356         /*
 357          * For some reason on the cn38xx simulator ebase register is set to
 358          * 0x80001000 at bootup time.  Move it back to the default, but
 359          * when we move to having support for multiple executives, we need
 360          * to rethink this.
 361          */
 362         mips_wr_ebase(0x80000000);
 363
 364         octeon_memory_init();
 365         init_param1();
 366         init_param2(physmem);
 367         mips_cpu_init();
 368         pmap_bootstrap();
 369         mips_proc0_init();
 370         mutex_init();
 371         kdb_init();
 372 #ifdef KDB
 373         if (boothowto & RB_KDB)
 374                 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
 375 #endif
 376         cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz;
 377         platform_counter_freq = cpu_clock;
 378         octeon_timecounter.tc_frequency = cpu_clock;
 379         platform_timecounter = &octeon_timecounter;
 380         mips_timer_init_params(platform_counter_freq, 0);
 381         set_cputicker(octeon_get_ticks, cpu_clock, 0);
 382
 383 #ifdef SMP
 384         /*
 385          * Clear any pending IPIs.
 386          */
 387         cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
 388 #endif
 389
 390         printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING);
 391         printf("Available Octeon features:");
 392         for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++)
 393                 if (octeon_has_feature(ofd->ofd_feature))
 394                         printf(" %s", ofd->ofd_string);
 395         printf("\n");
 396 }
 397
 398 static uint64_t
 399 octeon_get_ticks(void)
 400 {
 401         uint64_t cvmcount;
 402
 403         CVMX_MF_CYCLE(cvmcount);
 404         return (cvmcount);
 405 }
 406
 407 static unsigned
 408 octeon_get_timecount(struct timecounter *tc)
 409 {
 410         return ((unsigned)octeon_get_ticks());
 411 }
 412
 413 static int
 414 sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS)
 415 {
 416         size_t buflen;
 417         char buf[9];
 418         int error;
 419
 420         if (req->newptr == NULL)
 421                 return (EINVAL);
 422
 423         if (cvmx_sysinfo_get()->led_display_base_addr == 0)
 424                 return (ENODEV);
 425
 426         /*
 427          * Revision 1.x of the EBT3000 only supports 4 characters, but
 428          * other devices support 8.
 429          */
 430         if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
 431             cvmx_sysinfo_get()->board_rev_major == 1)
 432                 buflen = 4;
 433         else
 434                 buflen = 8;
 435
 436         if (req->newlen > buflen)
 437                 return (E2BIG);
 438
 439         error = SYSCTL_IN(req, buf, req->newlen);
 440         if (error != 0)
 441                 return (error);
 442
 443         buf[req->newlen] = '\0';
 444         ebt3000_str_write(buf);
 445
 446         return (0);
 447 }
 448
 449 SYSCTL_PROC(_machdep, OID_AUTO, led_display, CTLTYPE_STRING | CTLFLAG_WR,
 450     NULL, 0, sysctl_machdep_led_display, "A",
 451     "String to display on LED display");
 452
 453 void
 454 cvmx_dvprintf(const char *fmt, va_list ap)
 455 {
 456         if (!bootverbose)
 457                 return;
 458         vprintf(fmt, ap);
 459 }
 460
 461 void
 462 cvmx_dprintf(const char *fmt, ...)
 463 {
 464         va_list ap;
 465
 466         va_start(ap, fmt);
 467         cvmx_dvprintf(fmt, ap);
 468         va_end(ap);
 469 }
 470
 471 /**
 472  * version of printf that works better in exception context.
 473  *
 474  * @param format
 475  *
 476  * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
 477  */
 478 void cvmx_safe_printf(const char *format, ...)
 479 {
 480     char buffer[256];
 481     char *ptr = buffer;
 482     int count;
 483     va_list args;
 484
 485     va_start(args, format);
 486 #ifndef __U_BOOT__
 487     count = vsnprintf(buffer, sizeof(buffer), format, args);
 488 #else
 489     count = vsprintf(buffer, format, args);
 490 #endif
 491     va_end(args);
 492
 493     while (count-- > 0)
 494     {
 495         cvmx_uart_lsr_t lsrval;
 496
 497         /* Spin until there is room */
 498         do
 499         {
 500             lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
 501 #if !defined(CONFIG_OCTEON_SIM_SPEED)
 502             if (lsrval.s.temt == 0)
 503                 cvmx_wait(10000);   /* Just to reduce the load on the system */
 504 #endif
 505         }
 506         while (lsrval.s.temt == 0);
 507
 508         if (*ptr == '\n')
 509             cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
 510         cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
 511     }
 512 }
 513
 514 /* impSTART: This stuff should move back into the Cavium SDK */
 515 /*
 516  ****************************************************************************************
 517  *
 518  * APP/BOOT  DESCRIPTOR  STUFF
 519  *
 520  ****************************************************************************************
 521  */
 522
 523 /* Define the struct that is initialized by the bootloader used by the
 524  * startup code.
 525  *
 526  * Copyright (c) 2004, 2005, 2006 Cavium Networks.
 527  *
 528  * The authors hereby grant permission to use, copy, modify, distribute,
 529  * and license this software and its documentation for any purpose, provided
 530  * that existing copyright notices are retained in all copies and that this
 531  * notice is included verbatim in any distributions. No written agreement,
 532  * license, or royalty fee is required for any of the authorized uses.
 533  * Modifications to this software may be copyrighted by their authors
 534  * and need not follow the licensing terms described here, provided that
 535  * the new terms are clearly indicated on the first page of each file where
 536  * they apply.
 537  */
 538
 539 #define OCTEON_CURRENT_DESC_VERSION     6
 540 #define OCTEON_ARGV_MAX_ARGS            (64)
 541 #define OCTOEN_SERIAL_LEN 20
 542
 543 typedef struct {
 544         /* Start of block referenced by assembly code - do not change! */
 545         uint32_t desc_version;
 546         uint32_t desc_size;
 547
 548         uint64_t stack_top;
 549         uint64_t heap_base;
 550         uint64_t heap_end;
 551         uint64_t entry_point;   /* Only used by bootloader */
 552         uint64_t desc_vaddr;
 553         /* End of This block referenced by assembly code - do not change! */
 554
 555         uint32_t exception_base_addr;
 556         uint32_t stack_size;
 557         uint32_t heap_size;
 558         uint32_t argc;  /* Argc count for application */
 559         uint32_t argv[OCTEON_ARGV_MAX_ARGS];
 560         uint32_t flags;
 561         uint32_t core_mask;
 562         uint32_t dram_size;  /**< DRAM size in megabyes */
 563         uint32_t phy_mem_desc_addr;  /**< physical address of free memory descriptor block*/
 564         uint32_t debugger_flags_base_addr;  /**< used to pass flags from app to debugger */
 565         uint32_t eclock_hz;  /**< CPU clock speed, in hz */
 566         uint32_t dclock_hz;  /**< DRAM clock speed, in hz */
 567         uint32_t spi_clock_hz;  /**< SPI4 clock in hz */
 568         uint16_t board_type;
 569         uint8_t board_rev_major;
 570         uint8_t board_rev_minor;
 571         uint16_t chip_type;
 572         uint8_t chip_rev_major;
 573         uint8_t chip_rev_minor;
 574         char board_serial_number[OCTOEN_SERIAL_LEN];
 575         uint8_t mac_addr_base[6];
 576         uint8_t mac_addr_count;
 577         uint64_t cvmx_desc_vaddr;
 578 } octeon_boot_descriptor_t;
 579
 580 static cvmx_bootinfo_t *
 581 octeon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr)
 582 {
 583         cvmx_bootinfo_t *octeon_bootinfo;
 584
 585         /* XXX Why is 0x00000000ffffffffULL a bad value?  */
 586         if (app_desc_ptr->cvmx_desc_vaddr == 0 ||
 587             app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) {
 588                 cvmx_safe_printf("Bad octeon_bootinfo %#jx\n",
 589                     (uintmax_t)app_desc_ptr->cvmx_desc_vaddr);
 590                 return (NULL);
 591         }
 592
 593         octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr);
 594         if (octeon_bootinfo->major_version != 1) {
 595                 cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n",
 596                     (int) octeon_bootinfo->major_version,
 597                     (int) octeon_bootinfo->minor_version, octeon_bootinfo);
 598                 return (NULL);
 599         }
 600
 601         cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr,
 602                                         octeon_bootinfo->board_type,
 603                                         octeon_bootinfo->board_rev_major,
 604                                         octeon_bootinfo->board_rev_minor,
 605                                         octeon_bootinfo->eclock_hz);
 606         memcpy(cvmx_sysinfo_get()->mac_addr_base,
 607                octeon_bootinfo->mac_addr_base, 6);
 608         cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count;
 609         cvmx_sysinfo_get()->compact_flash_common_base_addr =
 610                 octeon_bootinfo->compact_flash_common_base_addr;
 611         cvmx_sysinfo_get()->compact_flash_attribute_base_addr =
 612                 octeon_bootinfo->compact_flash_attribute_base_addr;
 613         cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
 614         cvmx_sysinfo_get()->led_display_base_addr =
 615                 octeon_bootinfo->led_display_base_addr;
 616         memcpy(cvmx_sysinfo_get()->board_serial_number,
 617                octeon_bootinfo->board_serial_number,
 618                sizeof cvmx_sysinfo_get()->board_serial_number);
 619         return (octeon_bootinfo);
 620 }
 621
 622 static void
 623 octeon_boot_params_init(register_t ptr)
 624 {
 625         octeon_boot_descriptor_t *app_desc_ptr;
 626         cvmx_bootinfo_t *octeon_bootinfo;
 627
 628         if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) {
 629                 cvmx_safe_printf("app descriptor passed at invalid address %#jx\n",
 630                     (uintmax_t)ptr);
 631                 platform_reset();
 632         }
 633
 634         app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
 635         if (app_desc_ptr->desc_version < 6) {
 636                 cvmx_safe_printf("Your boot code is too old to be supported.\n");
 637                 platform_reset();
 638         }
 639         octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr);
 640         if (octeon_bootinfo == NULL) {
 641                 cvmx_safe_printf("Could not parse boot descriptor.\n");
 642                 platform_reset();
 643         }
 644
 645         if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
 646                 /*
 647                  * Revision 1.x of the EBT3000 only supports 4 characters, but
 648                  * other devices support 8.
 649                  */
 650                 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
 651                     cvmx_sysinfo_get()->board_rev_major == 1)
 652                         ebt3000_str_write("FBSD");
 653                 else
 654                         ebt3000_str_write("FreeBSD!");
 655         }
 656
 657         if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) {
 658                 cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n");
 659                 platform_reset();
 660         }
 661         cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
 662
 663         octeon_feature_init();
 664
 665         __cvmx_helper_cfg_init();
 666 }
 667 /* impEND: This stuff should move back into the Cavium SDK */
 668
 669 /*
 670  * The boot loader command line may specify kernel environment variables or
 671  * applicable boot flags of boot(8).
 672  */
 673 static void
 674 octeon_init_kenv(register_t ptr)
 675 {
 676         int i;
 677         char *n;
 678         char *v;
 679         octeon_boot_descriptor_t *app_desc_ptr;
 680
 681         app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
 682         memset(octeon_kenv, 0, sizeof(octeon_kenv));
 683         init_static_kenv(octeon_kenv, sizeof(octeon_kenv));
 684
 685         for (i = 0; i < app_desc_ptr->argc; i++) {
 686                 v = cvmx_phys_to_ptr(app_desc_ptr->argv[i]);
 687                 if (v == NULL)
 688                         continue;
 689                 if (*v == '-') {
 690                         boothowto |= boot_parse_arg(v);
 691                         continue;
 692                 }
 693                 n = strsep(&v, "=");
 694                 if (v == NULL)
 695                         kern_setenv(n, "1");
 696                 else
 697                         kern_setenv(n, v);
 698         }
 699 }