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1 /*-
2  * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
30
31 #include <sys/param.h>
32 #include <sys/conf.h>
33 #include <sys/kernel.h>
34 #include <sys/systm.h>
35 #include <sys/imgact.h>
36 #include <sys/bio.h>
37 #include <sys/buf.h>
38 #include <sys/bus.h>
39 #include <sys/cpu.h>
40 #include <sys/cons.h>
41 #include <sys/exec.h>
42 #include <sys/ucontext.h>
43 #include <sys/proc.h>
44 #include <sys/kdb.h>
45 #include <sys/ptrace.h>
46 #include <sys/reboot.h>
47 #include <sys/signalvar.h>
48 #include <sys/sysctl.h>
49 #include <sys/sysent.h>
50 #include <sys/sysproto.h>
51 #include <sys/time.h>
52 #include <sys/timetc.h>
53 #include <sys/user.h>
54
55 #include <vm/vm.h>
56 #include <vm/vm_object.h>
57 #include <vm/vm_page.h>
58
59 #include <machine/atomic.h>
60 #include <machine/cache.h>
61 #include <machine/clock.h>
62 #include <machine/cpu.h>
63 #include <machine/cpuregs.h>
64 #include <machine/cpufunc.h>
65 #include <mips/cavium/octeon_pcmap_regs.h>
66 #include <machine/hwfunc.h>
67 #include <machine/intr_machdep.h>
68 #include <machine/locore.h>
69 #include <machine/md_var.h>
70 #include <machine/pcpu.h>
71 #include <machine/pte.h>
72 #include <machine/trap.h>
73 #include <machine/vmparam.h>
74
75 #include <contrib/octeon-sdk/cvmx.h>
76 #include <contrib/octeon-sdk/cvmx-bootmem.h>
77 #include <contrib/octeon-sdk/cvmx-ebt3000.h>
78 #include <contrib/octeon-sdk/cvmx-helper-cfg.h>
79 #include <contrib/octeon-sdk/cvmx-interrupt.h>
80 #include <contrib/octeon-sdk/cvmx-version.h>
81
82 #include <mips/cavium/octeon_irq.h>
83
84 #if defined(__mips_n64) 
85 #define MAX_APP_DESC_ADDR     0xffffffffafffffff
86 #else
87 #define MAX_APP_DESC_ADDR     0xafffffff
88 #endif
89
90 struct octeon_feature_description {
91         octeon_feature_t ofd_feature;
92         const char *ofd_string;
93 };
94
95 extern int      *end;
96 extern char cpu_model[];
97 extern char cpu_board[];
98 static char octeon_kenv[0x2000];
99
100 static const struct octeon_feature_description octeon_feature_descriptions[] = {
101         { OCTEON_FEATURE_SAAD,                  "SAAD" },
102         { OCTEON_FEATURE_ZIP,                   "ZIP" },
103         { OCTEON_FEATURE_CRYPTO,                "CRYPTO" },
104         { OCTEON_FEATURE_DORM_CRYPTO,           "DORM_CRYPTO" },
105         { OCTEON_FEATURE_PCIE,                  "PCIE" },
106         { OCTEON_FEATURE_SRIO,                  "SRIO" },
107         { OCTEON_FEATURE_KEY_MEMORY,            "KEY_MEMORY" },
108         { OCTEON_FEATURE_LED_CONTROLLER,        "LED_CONTROLLER" },
109         { OCTEON_FEATURE_TRA,                   "TRA" },
110         { OCTEON_FEATURE_MGMT_PORT,             "MGMT_PORT" },
111         { OCTEON_FEATURE_RAID,                  "RAID" },
112         { OCTEON_FEATURE_USB,                   "USB" },
113         { OCTEON_FEATURE_NO_WPTR,               "NO_WPTR" },
114         { OCTEON_FEATURE_DFA,                   "DFA" },
115         { OCTEON_FEATURE_MDIO_CLAUSE_45,        "MDIO_CLAUSE_45" },
116         { OCTEON_FEATURE_NPEI,                  "NPEI" },
117         { OCTEON_FEATURE_ILK,                   "ILK" },
118         { OCTEON_FEATURE_HFA,                   "HFA" },
119         { OCTEON_FEATURE_DFM,                   "DFM" },
120         { OCTEON_FEATURE_CIU2,                  "CIU2" },
121         { OCTEON_FEATURE_DICI_MODE,             "DICI_MODE" },
122         { OCTEON_FEATURE_BIT_EXTRACTOR,         "BIT_EXTRACTOR" },
123         { OCTEON_FEATURE_NAND,                  "NAND" },
124         { OCTEON_FEATURE_MMC,                   "MMC" },
125         { OCTEON_FEATURE_PKND,                  "PKND" },
126         { OCTEON_FEATURE_CN68XX_WQE,            "CN68XX_WQE" },
127         { 0,                                    NULL }
128 };
129
130 static uint64_t octeon_get_ticks(void);
131 static unsigned octeon_get_timecount(struct timecounter *tc);
132
133 static void octeon_boot_params_init(register_t ptr);
134 static void octeon_init_kenv(register_t ptr);
135
136 static struct timecounter octeon_timecounter = {
137         octeon_get_timecount,   /* get_timecount */
138         0,                      /* no poll_pps */
139         0xffffffffu,            /* octeon_mask */
140         0,                      /* frequency */
141         "Octeon",               /* name */
142         900,                    /* quality (adjusted in code) */
143 };
144
145 void
146 platform_cpu_init()
147 {
148         /* Nothing special yet */
149 }
150
151 /*
152  * Perform a board-level soft-reset.
153  */
154 void
155 platform_reset(void)
156 {
157         cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
158 }
159
160 /*
161  * octeon_debug_symbol
162  *
163  * Does nothing.
164  * Used to mark the point for simulator to begin tracing
165  */
166 void
167 octeon_debug_symbol(void)
168 {
169 }
170
171 /*
172  * octeon_ciu_reset
173  *
174  * Shutdown all CIU to IP2, IP3 mappings
175  */
176 void
177 octeon_ciu_reset(void)
178 {
179         uint64_t cvmctl;
180
181         /* Disable all CIU interrupts by default */
182         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0);
183         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0);
184         cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0);
185         cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0);
186
187 #ifdef SMP
188         /* Enable the MBOX interrupts.  */
189         cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
190                        (1ull << (OCTEON_IRQ_MBOX0 - 8)) |
191                        (1ull << (OCTEON_IRQ_MBOX1 - 8)));
192 #endif
193
194         /* 
195          * Move the Performance Counter interrupt to OCTEON_PMC_IRQ
196          */
197         cvmctl = mips_rd_cvmctl();
198         cvmctl &= ~(7 << 7);
199         cvmctl |= (OCTEON_PMC_IRQ + 2) << 7;
200         mips_wr_cvmctl(cvmctl);
201 }
202
203 static void
204 octeon_memory_init(void)
205 {
206         vm_paddr_t phys_end;
207         int64_t addr;
208         unsigned i, j;
209
210         phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end));
211
212         if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
213                 /* Simulator we limit to 96 meg */
214                 phys_avail[0] = phys_end;
215                 phys_avail[1] = 96 << 20;
216
217                 dump_avail[0] = phys_avail[0];
218                 dump_avail[1] = phys_avail[1];
219
220                 realmem = physmem = btoc(phys_avail[1] - phys_avail[0]);
221                 return;
222         }
223
224         /*
225          * Allocate memory from bootmem 1MB at a time and merge
226          * adjacent entries.
227          */
228         i = 0;
229         while (i < PHYS_AVAIL_ENTRIES) {
230                 /*
231                  * If there is less than 2MB of memory available in 128-byte
232                  * blocks, do not steal any more memory.  We need to leave some
233                  * memory for the command queues to be allocated out of.
234                  */
235                 if (cvmx_bootmem_available_mem(128) < 2 << 20)
236                         break;
237
238                 addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end,
239                                               ~(vm_paddr_t)0, PAGE_SIZE, 0);
240                 if (addr == -1)
241                         break;
242
243                 /*
244                  * The SDK needs to be able to easily map any memory that might
245                  * come to it e.g. in the form of an mbuf.  Because on !n64 we
246                  * can't direct-map some addresses and we don't want to manage
247                  * temporary mappings within the SDK, don't feed memory that
248                  * can't be direct-mapped to the kernel.
249                  */
250 #if !defined(__mips_n64)
251                 if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1))
252                         continue;
253 #endif
254
255                 physmem += btoc(1 << 20);
256
257                 if (i > 0 && phys_avail[i - 1] == addr) {
258                         phys_avail[i - 1] += 1 << 20;
259                         continue;
260                 }
261
262                 phys_avail[i + 0] = addr;
263                 phys_avail[i + 1] = addr + (1 << 20);
264
265                 i += 2;
266         }
267
268         for (j = 0; j < i; j++)
269                 dump_avail[j] = phys_avail[j];
270
271         realmem = physmem;
272 }
273
274 void
275 platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
276     __register_t a3)
277 {
278         const struct octeon_feature_description *ofd;
279         uint64_t platform_counter_freq;
280         int rv;
281
282         mips_postboot_fixup();
283
284         /*
285          * Initialize boot parameters so that we can determine things like
286          * which console we shoud use, etc.
287          */
288         octeon_boot_params_init(a3);
289
290         /* Initialize pcpu stuff */
291         mips_pcpu0_init();
292         mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz);
293
294         /* Initialize console.  */
295         cninit();
296
297         /*
298          * Display information about the CPU.
299          */
300 #if !defined(OCTEON_MODEL)
301         printf("Using runtime CPU model checks.\n");
302 #else
303         printf("Compiled for CPU model: " __XSTRING(OCTEON_MODEL) "\n");
304 #endif
305         strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id()));
306         printf("CPU Model: %s\n", cpu_model);
307         printf("CPU clock: %uMHz  Core Mask: %#x\n",
308                cvmx_sysinfo_get()->cpu_clock_hz / 1000000,
309                cvmx_sysinfo_get()->core_mask);
310         rv = octeon_model_version_check(cvmx_get_proc_id());
311         if (rv == -1)
312                 panic("%s: kernel not compatible with this processor.", __func__);
313
314         /*
315          * Display information about the board.
316          */
317 #if defined(OCTEON_BOARD_CAPK_0100ND)
318         strcpy(cpu_board, "CAPK-0100ND");
319         if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) {
320                 panic("Compiled for %s, but board type is %s.", cpu_board,
321                        cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
322         }
323 #else
324         strcpy(cpu_board,
325                cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
326 #endif
327         printf("Board: %s\n", cpu_board);
328         printf("Board Type: %u  Revision: %u/%u\n",
329                cvmx_sysinfo_get()->board_type,
330                cvmx_sysinfo_get()->board_rev_major,
331                cvmx_sysinfo_get()->board_rev_minor);
332         printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number);
333
334         /*
335          * Additional on-chip hardware/settings.
336          *
337          * XXX Display PCI host/target?  What else?
338          */
339         printf("MAC address base: %6D (%u configured)\n",
340                cvmx_sysinfo_get()->mac_addr_base, ":",
341                cvmx_sysinfo_get()->mac_addr_count);
342
343
344         octeon_ciu_reset();
345         /*
346          * Convert U-Boot 'bootoctlinux' loader command line arguments into
347          * boot flags and kernel environment variables.
348          */
349         bootverbose = 1;
350         octeon_init_kenv(a3);
351
352         /*
353          * For some reason on the cn38xx simulator ebase register is set to
354          * 0x80001000 at bootup time.  Move it back to the default, but
355          * when we move to having support for multiple executives, we need
356          * to rethink this.
357          */
358         mips_wr_ebase(0x80000000);
359
360         octeon_memory_init();
361         init_param1();
362         init_param2(physmem);
363         mips_cpu_init();
364         pmap_bootstrap();
365         mips_proc0_init();
366         mutex_init();
367         kdb_init();
368 #ifdef KDB
369         if (boothowto & RB_KDB)
370                 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
371 #endif
372         cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz;
373         platform_counter_freq = cpu_clock;
374         octeon_timecounter.tc_frequency = cpu_clock;
375         platform_timecounter = &octeon_timecounter;
376         mips_timer_init_params(platform_counter_freq, 0);
377         set_cputicker(octeon_get_ticks, cpu_clock, 0);
378
379 #ifdef SMP
380         /*
381          * Clear any pending IPIs.
382          */
383         cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
384 #endif
385
386         printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING);
387         printf("Available Octeon features:");
388         for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++)
389                 if (octeon_has_feature(ofd->ofd_feature))
390                         printf(" %s", ofd->ofd_string);
391         printf("\n");
392 }
393
394 static uint64_t
395 octeon_get_ticks(void)
396 {
397         uint64_t cvmcount;
398
399         CVMX_MF_CYCLE(cvmcount);
400         return (cvmcount);
401 }
402
403 static unsigned
404 octeon_get_timecount(struct timecounter *tc)
405 {
406         return ((unsigned)octeon_get_ticks());
407 }
408
409 static int
410 sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS)
411 {
412         size_t buflen;
413         char buf[9];
414         int error;
415
416         if (req->newptr == NULL)
417                 return (EINVAL);
418
419         if (cvmx_sysinfo_get()->led_display_base_addr == 0)
420                 return (ENODEV);
421
422         /*
423          * Revision 1.x of the EBT3000 only supports 4 characters, but
424          * other devices support 8.
425          */
426         if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
427             cvmx_sysinfo_get()->board_rev_major == 1)
428                 buflen = 4;
429         else
430                 buflen = 8;
431
432         if (req->newlen > buflen)
433                 return (E2BIG);
434
435         error = SYSCTL_IN(req, buf, req->newlen);
436         if (error != 0)
437                 return (error);
438
439         buf[req->newlen] = '\0';
440         ebt3000_str_write(buf);
441
442         return (0);
443 }
444
445 SYSCTL_PROC(_machdep, OID_AUTO, led_display, CTLTYPE_STRING | CTLFLAG_WR,
446     NULL, 0, sysctl_machdep_led_display, "A",
447     "String to display on LED display");
448
449 void
450 cvmx_dvprintf(const char *fmt, va_list ap)
451 {
452         if (!bootverbose)
453                 return;
454         vprintf(fmt, ap);
455 }
456
457 void
458 cvmx_dprintf(const char *fmt, ...)
459 {
460         va_list ap;
461
462         va_start(ap, fmt);
463         cvmx_dvprintf(fmt, ap);
464         va_end(ap);
465 }
466
467 /**
468  * version of printf that works better in exception context.
469  *
470  * @param format
471  *
472  * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
473  */
474 void cvmx_safe_printf(const char *format, ...)
475 {
476     char buffer[256];
477     char *ptr = buffer;
478     int count;
479     va_list args;
480
481     va_start(args, format);
482 #ifndef __U_BOOT__
483     count = vsnprintf(buffer, sizeof(buffer), format, args);
484 #else
485     count = vsprintf(buffer, format, args);
486 #endif
487     va_end(args);
488
489     while (count-- > 0)
490     {
491         cvmx_uart_lsr_t lsrval;
492
493         /* Spin until there is room */
494         do
495         {
496             lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
497 #if !defined(CONFIG_OCTEON_SIM_SPEED)
498             if (lsrval.s.temt == 0)
499                 cvmx_wait(10000);   /* Just to reduce the load on the system */
500 #endif
501         }
502         while (lsrval.s.temt == 0);
503
504         if (*ptr == '\n')
505             cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
506         cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
507     }
508 }
509
510 /* impSTART: This stuff should move back into the Cavium SDK */
511 /*
512  ****************************************************************************************
513  *
514  * APP/BOOT  DESCRIPTOR  STUFF
515  *
516  ****************************************************************************************
517  */
518
519 /* Define the struct that is initialized by the bootloader used by the 
520  * startup code.
521  *
522  * Copyright (c) 2004, 2005, 2006 Cavium Networks.
523  *
524  * The authors hereby grant permission to use, copy, modify, distribute,
525  * and license this software and its documentation for any purpose, provided
526  * that existing copyright notices are retained in all copies and that this
527  * notice is included verbatim in any distributions. No written agreement,
528  * license, or royalty fee is required for any of the authorized uses.
529  * Modifications to this software may be copyrighted by their authors
530  * and need not follow the licensing terms described here, provided that
531  * the new terms are clearly indicated on the first page of each file where
532  * they apply.
533  */
534
535 #define OCTEON_CURRENT_DESC_VERSION     6
536 #define OCTEON_ARGV_MAX_ARGS            (64)
537 #define OCTOEN_SERIAL_LEN 20
538
539 typedef struct {
540         /* Start of block referenced by assembly code - do not change! */
541         uint32_t desc_version;
542         uint32_t desc_size;
543
544         uint64_t stack_top;
545         uint64_t heap_base;
546         uint64_t heap_end;
547         uint64_t entry_point;   /* Only used by bootloader */
548         uint64_t desc_vaddr;
549         /* End of This block referenced by assembly code - do not change! */
550
551         uint32_t exception_base_addr;
552         uint32_t stack_size;
553         uint32_t heap_size;
554         uint32_t argc;  /* Argc count for application */
555         uint32_t argv[OCTEON_ARGV_MAX_ARGS];
556         uint32_t flags;
557         uint32_t core_mask;
558         uint32_t dram_size;  /**< DRAM size in megabyes */
559         uint32_t phy_mem_desc_addr;  /**< physical address of free memory descriptor block*/
560         uint32_t debugger_flags_base_addr;  /**< used to pass flags from app to debugger */
561         uint32_t eclock_hz;  /**< CPU clock speed, in hz */
562         uint32_t dclock_hz;  /**< DRAM clock speed, in hz */
563         uint32_t spi_clock_hz;  /**< SPI4 clock in hz */
564         uint16_t board_type;
565         uint8_t board_rev_major;
566         uint8_t board_rev_minor;
567         uint16_t chip_type;
568         uint8_t chip_rev_major;
569         uint8_t chip_rev_minor;
570         char board_serial_number[OCTOEN_SERIAL_LEN];
571         uint8_t mac_addr_base[6];
572         uint8_t mac_addr_count;
573         uint64_t cvmx_desc_vaddr;
574 } octeon_boot_descriptor_t;
575
576 static cvmx_bootinfo_t *
577 octeon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr)
578 {
579         cvmx_bootinfo_t *octeon_bootinfo;
580
581         /* XXX Why is 0x00000000ffffffffULL a bad value?  */
582         if (app_desc_ptr->cvmx_desc_vaddr == 0 ||
583             app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) {
584                 cvmx_safe_printf("Bad octeon_bootinfo %#jx\n",
585                     (uintmax_t)app_desc_ptr->cvmx_desc_vaddr);
586                 return (NULL);
587         }
588
589         octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr);
590         if (octeon_bootinfo->major_version != 1) {
591                 cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n",
592                     (int) octeon_bootinfo->major_version,
593                     (int) octeon_bootinfo->minor_version, octeon_bootinfo);
594                 return (NULL);
595         }
596
597         cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr,
598                                         octeon_bootinfo->board_type,
599                                         octeon_bootinfo->board_rev_major,
600                                         octeon_bootinfo->board_rev_minor,
601                                         octeon_bootinfo->eclock_hz);
602         memcpy(cvmx_sysinfo_get()->mac_addr_base,
603                octeon_bootinfo->mac_addr_base, 6);
604         cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count;
605         cvmx_sysinfo_get()->compact_flash_common_base_addr = 
606                 octeon_bootinfo->compact_flash_common_base_addr;
607         cvmx_sysinfo_get()->compact_flash_attribute_base_addr = 
608                 octeon_bootinfo->compact_flash_attribute_base_addr;
609         cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
610         cvmx_sysinfo_get()->led_display_base_addr =
611                 octeon_bootinfo->led_display_base_addr;
612         memcpy(cvmx_sysinfo_get()->board_serial_number,
613                octeon_bootinfo->board_serial_number,
614                sizeof cvmx_sysinfo_get()->board_serial_number);
615         return (octeon_bootinfo);
616 }
617
618 static void
619 octeon_boot_params_init(register_t ptr)
620 {
621         octeon_boot_descriptor_t *app_desc_ptr;
622         cvmx_bootinfo_t *octeon_bootinfo;
623
624         if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) {
625                 cvmx_safe_printf("app descriptor passed at invalid address %#jx\n",
626                     (uintmax_t)ptr);
627                 platform_reset();
628         }
629
630         app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
631         if (app_desc_ptr->desc_version < 6) {
632                 cvmx_safe_printf("Your boot code is too old to be supported.\n");
633                 platform_reset();
634         }
635         octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr);
636         if (octeon_bootinfo == NULL) {
637                 cvmx_safe_printf("Could not parse boot descriptor.\n");
638                 platform_reset();
639         }
640
641         if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
642                 /*
643                  * Revision 1.x of the EBT3000 only supports 4 characters, but
644                  * other devices support 8.
645                  */
646                 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
647                     cvmx_sysinfo_get()->board_rev_major == 1)
648                         ebt3000_str_write("FBSD");
649                 else
650                         ebt3000_str_write("FreeBSD!");
651         }
652
653         if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) {
654                 cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n");
655                 platform_reset();
656         }
657         cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
658
659         octeon_feature_init();
660
661         __cvmx_helper_cfg_init();
662 }
663 /* impEND: This stuff should move back into the Cavium SDK */
664
665 static void
666 boothowto_parse(const char *v)
667 {
668         if ((v == NULL) || (*v != '-'))
669                 return;
670
671         while (*v != '\0') {
672                 v++;
673                 switch (*v) {
674                 case 'a': boothowto |= RB_ASKNAME; break;
675                 case 'C': boothowto |= RB_CDROM; break;
676                 case 'd': boothowto |= RB_KDB; break;
677                 case 'D': boothowto |= RB_MULTIPLE; break;
678                 case 'm': boothowto |= RB_MUTE; break;
679                 case 'g': boothowto |= RB_GDB; break;
680                 case 'h': boothowto |= RB_SERIAL; break;
681                 case 'p': boothowto |= RB_PAUSE; break;
682                 case 'r': boothowto |= RB_DFLTROOT; break;
683                 case 's': boothowto |= RB_SINGLE; break;
684                 case 'v': boothowto |= RB_VERBOSE; break;
685                 }
686         }
687 }
688
689 /*
690  * The boot loader command line may specify kernel environment variables or
691  * applicable boot flags of boot(8).
692  */
693 static void
694 octeon_init_kenv(register_t ptr)
695 {
696         int i;
697         char *n;
698         char *v;
699         octeon_boot_descriptor_t *app_desc_ptr;
700
701         app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
702         memset(octeon_kenv, 0, sizeof(octeon_kenv));
703         init_static_kenv(octeon_kenv, sizeof(octeon_kenv));
704
705         for (i = 0; i < app_desc_ptr->argc; i++) {
706                 v = cvmx_phys_to_ptr(app_desc_ptr->argv[i]);
707                 if (v == NULL)
708                         continue;
709                 if (*v == '-') {
710                         boothowto_parse(v);
711                         continue;
712                 }
713                 n = strsep(&v, "=");
714                 if (v == NULL)
715                         kern_setenv(n, "1");
716                 else
717                         kern_setenv(n, v);
718         }
719 }