2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2006 Wojciech A. Koszek <wkoszek@FreeBSD.org>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
33 #include <sys/param.h>
36 #include <sys/kernel.h>
37 #include <sys/systm.h>
38 #include <sys/imgact.h>
45 #include <sys/ucontext.h>
48 #include <sys/ptrace.h>
49 #include <sys/reboot.h>
50 #include <sys/signalvar.h>
51 #include <sys/sysctl.h>
52 #include <sys/sysent.h>
53 #include <sys/sysproto.h>
55 #include <sys/timetc.h>
59 #include <vm/vm_param.h>
60 #include <vm/vm_object.h>
61 #include <vm/vm_page.h>
62 #include <vm/vm_phys.h>
64 #include <machine/atomic.h>
65 #include <machine/cache.h>
66 #include <machine/clock.h>
67 #include <machine/cpu.h>
68 #include <machine/cpuregs.h>
69 #include <machine/cpufunc.h>
70 #include <mips/cavium/octeon_pcmap_regs.h>
71 #include <machine/hwfunc.h>
72 #include <machine/intr_machdep.h>
73 #include <machine/locore.h>
74 #include <machine/md_var.h>
75 #include <machine/pcpu.h>
76 #include <machine/pte.h>
77 #include <machine/trap.h>
79 #include <contrib/octeon-sdk/cvmx.h>
80 #include <contrib/octeon-sdk/cvmx-bootmem.h>
81 #include <contrib/octeon-sdk/cvmx-ebt3000.h>
82 #include <contrib/octeon-sdk/cvmx-helper-cfg.h>
83 #include <contrib/octeon-sdk/cvmx-interrupt.h>
84 #include <contrib/octeon-sdk/cvmx-version.h>
86 #include <mips/cavium/octeon_irq.h>
88 #if defined(__mips_n64)
89 #define MAX_APP_DESC_ADDR 0xffffffffafffffff
91 #define MAX_APP_DESC_ADDR 0xafffffff
94 struct octeon_feature_description {
95 octeon_feature_t ofd_feature;
96 const char *ofd_string;
100 static char octeon_kenv[0x2000];
102 static const struct octeon_feature_description octeon_feature_descriptions[] = {
103 { OCTEON_FEATURE_SAAD, "SAAD" },
104 { OCTEON_FEATURE_ZIP, "ZIP" },
105 { OCTEON_FEATURE_CRYPTO, "CRYPTO" },
106 { OCTEON_FEATURE_DORM_CRYPTO, "DORM_CRYPTO" },
107 { OCTEON_FEATURE_PCIE, "PCIE" },
108 { OCTEON_FEATURE_SRIO, "SRIO" },
109 { OCTEON_FEATURE_KEY_MEMORY, "KEY_MEMORY" },
110 { OCTEON_FEATURE_LED_CONTROLLER, "LED_CONTROLLER" },
111 { OCTEON_FEATURE_TRA, "TRA" },
112 { OCTEON_FEATURE_MGMT_PORT, "MGMT_PORT" },
113 { OCTEON_FEATURE_RAID, "RAID" },
114 { OCTEON_FEATURE_USB, "USB" },
115 { OCTEON_FEATURE_NO_WPTR, "NO_WPTR" },
116 { OCTEON_FEATURE_DFA, "DFA" },
117 { OCTEON_FEATURE_MDIO_CLAUSE_45, "MDIO_CLAUSE_45" },
118 { OCTEON_FEATURE_NPEI, "NPEI" },
119 { OCTEON_FEATURE_ILK, "ILK" },
120 { OCTEON_FEATURE_HFA, "HFA" },
121 { OCTEON_FEATURE_DFM, "DFM" },
122 { OCTEON_FEATURE_CIU2, "CIU2" },
123 { OCTEON_FEATURE_DICI_MODE, "DICI_MODE" },
124 { OCTEON_FEATURE_BIT_EXTRACTOR, "BIT_EXTRACTOR" },
125 { OCTEON_FEATURE_NAND, "NAND" },
126 { OCTEON_FEATURE_MMC, "MMC" },
127 { OCTEON_FEATURE_PKND, "PKND" },
128 { OCTEON_FEATURE_CN68XX_WQE, "CN68XX_WQE" },
132 static uint64_t octeon_get_ticks(void);
133 static unsigned octeon_get_timecount(struct timecounter *tc);
135 static void octeon_boot_params_init(register_t ptr);
136 static void octeon_init_kenv(register_t ptr);
138 static struct timecounter octeon_timecounter = {
139 octeon_get_timecount, /* get_timecount */
141 0xffffffffu, /* octeon_mask */
144 900, /* quality (adjusted in code) */
150 /* Nothing special yet */
154 * Perform a board-level soft-reset.
159 cvmx_write_csr(CVMX_CIU_SOFT_RST, 1);
163 * octeon_debug_symbol
166 * Used to mark the point for simulator to begin tracing
169 octeon_debug_symbol(void)
176 * Shutdown all CIU to IP2, IP3 mappings
179 octeon_ciu_reset(void)
183 /* Disable all CIU interrupts by default */
184 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), 0);
185 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1), 0);
186 cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), 0);
187 cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2+1), 0);
190 /* Enable the MBOX interrupts. */
191 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2+1),
192 (1ull << (OCTEON_IRQ_MBOX0 - 8)) |
193 (1ull << (OCTEON_IRQ_MBOX1 - 8)));
197 * Move the Performance Counter interrupt to OCTEON_PMC_IRQ
199 cvmctl = mips_rd_cvmctl();
201 cvmctl |= (OCTEON_PMC_IRQ + 2) << 7;
202 mips_wr_cvmctl(cvmctl);
206 octeon_memory_init(void)
212 phys_end = round_page(MIPS_KSEG0_TO_PHYS((vm_offset_t)&end));
214 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {
215 /* Simulator we limit to 96 meg */
216 phys_avail[0] = phys_end;
217 phys_avail[1] = 96 << 20;
219 dump_avail[0] = phys_avail[0];
220 dump_avail[1] = phys_avail[1];
222 realmem = physmem = btoc(phys_avail[1] - phys_avail[0]);
227 * Allocate memory from bootmem 1MB at a time and merge
231 while (i < PHYS_AVAIL_ENTRIES) {
233 * If there is less than 2MB of memory available in 128-byte
234 * blocks, do not steal any more memory. We need to leave some
235 * memory for the command queues to be allocated out of.
237 if (cvmx_bootmem_available_mem(128) < 2 << 20)
240 addr = cvmx_bootmem_phy_alloc(1 << 20, phys_end,
241 ~(vm_paddr_t)0, PAGE_SIZE, 0);
246 * The SDK needs to be able to easily map any memory that might
247 * come to it e.g. in the form of an mbuf. Because on !n64 we
248 * can't direct-map some addresses and we don't want to manage
249 * temporary mappings within the SDK, don't feed memory that
250 * can't be direct-mapped to the kernel.
252 #if !defined(__mips_n64)
253 if (!MIPS_DIRECT_MAPPABLE(addr + (1 << 20) - 1))
257 physmem += btoc(1 << 20);
259 if (i > 0 && phys_avail[i - 1] == addr) {
260 phys_avail[i - 1] += 1 << 20;
264 phys_avail[i + 0] = addr;
265 phys_avail[i + 1] = addr + (1 << 20);
270 for (j = 0; j < i; j++)
271 dump_avail[j] = phys_avail[j];
277 platform_start(__register_t a0, __register_t a1, __register_t a2 __unused,
280 const struct octeon_feature_description *ofd;
281 uint64_t platform_counter_freq;
284 mips_postboot_fixup();
287 * Initialize boot parameters so that we can determine things like
288 * which console we shoud use, etc.
290 octeon_boot_params_init(a3);
292 /* Initialize pcpu stuff */
294 mips_timer_early_init(cvmx_sysinfo_get()->cpu_clock_hz);
296 /* Initialize console. */
300 * Display information about the CPU.
302 #if !defined(OCTEON_MODEL)
303 printf("Using runtime CPU model checks.\n");
305 printf("Compiled for CPU model: " __XSTRING(OCTEON_MODEL) "\n");
307 strcpy(cpu_model, octeon_model_get_string(cvmx_get_proc_id()));
308 printf("CPU Model: %s\n", cpu_model);
309 printf("CPU clock: %uMHz Core Mask: %#x\n",
310 cvmx_sysinfo_get()->cpu_clock_hz / 1000000,
311 cvmx_sysinfo_get()->core_mask);
312 rv = octeon_model_version_check(cvmx_get_proc_id());
314 panic("%s: kernel not compatible with this processor.", __func__);
317 * Display information about the board.
319 #if defined(OCTEON_BOARD_CAPK_0100ND)
320 strcpy(cpu_board, "CAPK-0100ND");
321 if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_CN3010_EVB_HS5) {
322 panic("Compiled for %s, but board type is %s.", cpu_board,
323 cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
327 cvmx_board_type_to_string(cvmx_sysinfo_get()->board_type));
329 printf("Board: %s\n", cpu_board);
330 printf("Board Type: %u Revision: %u/%u\n",
331 cvmx_sysinfo_get()->board_type,
332 cvmx_sysinfo_get()->board_rev_major,
333 cvmx_sysinfo_get()->board_rev_minor);
334 printf("Serial number: %s\n", cvmx_sysinfo_get()->board_serial_number);
337 * Additional on-chip hardware/settings.
339 * XXX Display PCI host/target? What else?
341 printf("MAC address base: %6D (%u configured)\n",
342 cvmx_sysinfo_get()->mac_addr_base, ":",
343 cvmx_sysinfo_get()->mac_addr_count);
348 * Convert U-Boot 'bootoctlinux' loader command line arguments into
349 * boot flags and kernel environment variables.
352 octeon_init_kenv(a3);
355 * For some reason on the cn38xx simulator ebase register is set to
356 * 0x80001000 at bootup time. Move it back to the default, but
357 * when we move to having support for multiple executives, we need
360 mips_wr_ebase(0x80000000);
362 octeon_memory_init();
364 init_param2(physmem);
371 if (boothowto & RB_KDB)
372 kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
374 cpu_clock = cvmx_sysinfo_get()->cpu_clock_hz;
375 platform_counter_freq = cpu_clock;
376 octeon_timecounter.tc_frequency = cpu_clock;
377 platform_timecounter = &octeon_timecounter;
378 mips_timer_init_params(platform_counter_freq, 0);
379 set_cputicker(octeon_get_ticks, cpu_clock, 0);
383 * Clear any pending IPIs.
385 cvmx_write_csr(CVMX_CIU_MBOX_CLRX(0), 0xffffffff);
388 printf("Octeon SDK: %s\n", OCTEON_SDK_VERSION_STRING);
389 printf("Available Octeon features:");
390 for (ofd = octeon_feature_descriptions; ofd->ofd_string != NULL; ofd++)
391 if (octeon_has_feature(ofd->ofd_feature))
392 printf(" %s", ofd->ofd_string);
397 octeon_get_ticks(void)
401 CVMX_MF_CYCLE(cvmcount);
406 octeon_get_timecount(struct timecounter *tc)
408 return ((unsigned)octeon_get_ticks());
412 sysctl_machdep_led_display(SYSCTL_HANDLER_ARGS)
418 if (req->newptr == NULL)
421 if (cvmx_sysinfo_get()->led_display_base_addr == 0)
425 * Revision 1.x of the EBT3000 only supports 4 characters, but
426 * other devices support 8.
428 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
429 cvmx_sysinfo_get()->board_rev_major == 1)
434 if (req->newlen > buflen)
437 error = SYSCTL_IN(req, buf, req->newlen);
441 buf[req->newlen] = '\0';
442 ebt3000_str_write(buf);
447 SYSCTL_PROC(_machdep, OID_AUTO, led_display,
448 CTLTYPE_STRING | CTLFLAG_WR | CTLFLAG_NEEDGIANT, NULL, 0,
449 sysctl_machdep_led_display, "A",
450 "String to display on LED display");
453 cvmx_dvprintf(const char *fmt, va_list ap)
461 cvmx_dprintf(const char *fmt, ...)
466 cvmx_dvprintf(fmt, ap);
471 * version of printf that works better in exception context.
475 * XXX If this function weren't in cvmx-interrupt.c, we'd use the SDK version.
477 void cvmx_safe_printf(const char *format, ...)
484 va_start(args, format);
486 count = vsnprintf(buffer, sizeof(buffer), format, args);
488 count = vsprintf(buffer, format, args);
494 cvmx_uart_lsr_t lsrval;
496 /* Spin until there is room */
499 lsrval.u64 = cvmx_read_csr(CVMX_MIO_UARTX_LSR(0));
500 #if !defined(CONFIG_OCTEON_SIM_SPEED)
501 if (lsrval.s.temt == 0)
502 cvmx_wait(10000); /* Just to reduce the load on the system */
505 while (lsrval.s.temt == 0);
508 cvmx_write_csr(CVMX_MIO_UARTX_THR(0), '\r');
509 cvmx_write_csr(CVMX_MIO_UARTX_THR(0), *ptr++);
513 /* impSTART: This stuff should move back into the Cavium SDK */
515 ****************************************************************************************
517 * APP/BOOT DESCRIPTOR STUFF
519 ****************************************************************************************
522 /* Define the struct that is initialized by the bootloader used by the
525 * Copyright (c) 2004, 2005, 2006 Cavium Networks.
527 * The authors hereby grant permission to use, copy, modify, distribute,
528 * and license this software and its documentation for any purpose, provided
529 * that existing copyright notices are retained in all copies and that this
530 * notice is included verbatim in any distributions. No written agreement,
531 * license, or royalty fee is required for any of the authorized uses.
532 * Modifications to this software may be copyrighted by their authors
533 * and need not follow the licensing terms described here, provided that
534 * the new terms are clearly indicated on the first page of each file where
538 #define OCTEON_CURRENT_DESC_VERSION 6
539 #define OCTEON_ARGV_MAX_ARGS (64)
540 #define OCTOEN_SERIAL_LEN 20
543 /* Start of block referenced by assembly code - do not change! */
544 uint32_t desc_version;
550 uint64_t entry_point; /* Only used by bootloader */
552 /* End of This block referenced by assembly code - do not change! */
554 uint32_t exception_base_addr;
557 uint32_t argc; /* Argc count for application */
558 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
561 uint32_t dram_size; /**< DRAM size in megabyes */
562 uint32_t phy_mem_desc_addr; /**< physical address of free memory descriptor block*/
563 uint32_t debugger_flags_base_addr; /**< used to pass flags from app to debugger */
564 uint32_t eclock_hz; /**< CPU clock speed, in hz */
565 uint32_t dclock_hz; /**< DRAM clock speed, in hz */
566 uint32_t spi_clock_hz; /**< SPI4 clock in hz */
568 uint8_t board_rev_major;
569 uint8_t board_rev_minor;
571 uint8_t chip_rev_major;
572 uint8_t chip_rev_minor;
573 char board_serial_number[OCTOEN_SERIAL_LEN];
574 uint8_t mac_addr_base[6];
575 uint8_t mac_addr_count;
576 uint64_t cvmx_desc_vaddr;
577 } octeon_boot_descriptor_t;
579 static cvmx_bootinfo_t *
580 octeon_process_app_desc_ver_6(octeon_boot_descriptor_t *app_desc_ptr)
582 cvmx_bootinfo_t *octeon_bootinfo;
584 /* XXX Why is 0x00000000ffffffffULL a bad value? */
585 if (app_desc_ptr->cvmx_desc_vaddr == 0 ||
586 app_desc_ptr->cvmx_desc_vaddr == 0xfffffffful) {
587 cvmx_safe_printf("Bad octeon_bootinfo %#jx\n",
588 (uintmax_t)app_desc_ptr->cvmx_desc_vaddr);
592 octeon_bootinfo = cvmx_phys_to_ptr(app_desc_ptr->cvmx_desc_vaddr);
593 if (octeon_bootinfo->major_version != 1) {
594 cvmx_safe_printf("Incompatible CVMX descriptor from bootloader: %d.%d %p\n",
595 (int) octeon_bootinfo->major_version,
596 (int) octeon_bootinfo->minor_version, octeon_bootinfo);
600 cvmx_sysinfo_minimal_initialize(octeon_bootinfo->phy_mem_desc_addr,
601 octeon_bootinfo->board_type,
602 octeon_bootinfo->board_rev_major,
603 octeon_bootinfo->board_rev_minor,
604 octeon_bootinfo->eclock_hz);
605 memcpy(cvmx_sysinfo_get()->mac_addr_base,
606 octeon_bootinfo->mac_addr_base, 6);
607 cvmx_sysinfo_get()->mac_addr_count = octeon_bootinfo->mac_addr_count;
608 cvmx_sysinfo_get()->compact_flash_common_base_addr =
609 octeon_bootinfo->compact_flash_common_base_addr;
610 cvmx_sysinfo_get()->compact_flash_attribute_base_addr =
611 octeon_bootinfo->compact_flash_attribute_base_addr;
612 cvmx_sysinfo_get()->core_mask = octeon_bootinfo->core_mask;
613 cvmx_sysinfo_get()->led_display_base_addr =
614 octeon_bootinfo->led_display_base_addr;
615 memcpy(cvmx_sysinfo_get()->board_serial_number,
616 octeon_bootinfo->board_serial_number,
617 sizeof cvmx_sysinfo_get()->board_serial_number);
618 return (octeon_bootinfo);
622 octeon_boot_params_init(register_t ptr)
624 octeon_boot_descriptor_t *app_desc_ptr;
625 cvmx_bootinfo_t *octeon_bootinfo;
627 if (ptr == 0 || ptr >= MAX_APP_DESC_ADDR) {
628 cvmx_safe_printf("app descriptor passed at invalid address %#jx\n",
633 app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
634 if (app_desc_ptr->desc_version < 6) {
635 cvmx_safe_printf("Your boot code is too old to be supported.\n");
638 octeon_bootinfo = octeon_process_app_desc_ver_6(app_desc_ptr);
639 if (octeon_bootinfo == NULL) {
640 cvmx_safe_printf("Could not parse boot descriptor.\n");
644 if (cvmx_sysinfo_get()->led_display_base_addr != 0) {
646 * Revision 1.x of the EBT3000 only supports 4 characters, but
647 * other devices support 8.
649 if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBT3000 &&
650 cvmx_sysinfo_get()->board_rev_major == 1)
651 ebt3000_str_write("FBSD");
653 ebt3000_str_write("FreeBSD!");
656 if (cvmx_sysinfo_get()->phy_mem_desc_addr == (uint64_t)0) {
657 cvmx_safe_printf("Your boot loader did not supply a memory descriptor.\n");
660 cvmx_bootmem_init(cvmx_sysinfo_get()->phy_mem_desc_addr);
662 octeon_feature_init();
664 __cvmx_helper_cfg_init();
666 /* impEND: This stuff should move back into the Cavium SDK */
669 * The boot loader command line may specify kernel environment variables or
670 * applicable boot flags of boot(8).
673 octeon_init_kenv(register_t ptr)
678 octeon_boot_descriptor_t *app_desc_ptr;
680 app_desc_ptr = (octeon_boot_descriptor_t *)(intptr_t)ptr;
681 memset(octeon_kenv, 0, sizeof(octeon_kenv));
682 init_static_kenv(octeon_kenv, sizeof(octeon_kenv));
684 for (i = 0; i < app_desc_ptr->argc; i++) {
685 v = cvmx_phys_to_ptr(app_desc_ptr->argv[i]);
689 boothowto |= boot_parse_arg(v);