1 /***********************license start************************************
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2005-2007 Cavium Networks (support@cavium.com). All rights
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9 * modification, are permitted provided that the following conditions are
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16 * copyright notice, this list of conditions and the following
17 * disclaimer in the documentation and/or other materials provided
18 * with the distribution.
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21 * its contributors may be used to endorse or promote products
22 * derived from this software without specific prior written
25 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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39 ***********************license end**************************************/
42 #ifndef _CAVIUM_OCTOPCIREG_H_
43 #define _CAVIUM_OCTOPCIREG_H_
46 * This is the bit decoding used for the Octeon PCI controller addresses for config space
58 uint64_t reserved : 13;
62 uint64_t reserved2 : 4;
63 uint64_t endian_swap : 2;
64 uint64_t reserved3 : 10;
70 } octeon_pci_config_space_address_t;
81 uint64_t reserved : 13;
85 uint64_t reserved2 : 4;
86 uint64_t endian_swap : 2;
91 } octeon_pci_io_space_address_t;
94 #define CVMX_OCT_SUBDID_PCI_CFG 1
95 #define CVMX_OCT_SUBDID_PCI_IO 2
96 #define CVMX_OCT_SUBDID_PCI_MEM1 3
97 #define CVMX_OCT_SUBDID_PCI_MEM2 4
98 #define CVMX_OCT_SUBDID_PCI_MEM3 5
99 #define CVMX_OCT_SUBDID_PCI_MEM4 6
101 #define CVMX_OCT_PCI_IO_BASE 0x00004000
102 #define CVMX_OCT_PCI_IO_SIZE 0x08000000
104 #define CVMX_OCT_PCI_MEM1_BASE 0xf0000000
105 #define CVMX_OCT_PCI_MEM1_SIZE 0x0f000000
107 #endif /* !_CAVIUM_OCTOPCIREG_H_ */