2 # BERI_SIM -- Kernel for the SRI/Cambridge "BERI" (Bluespec Extensible RISC
3 # Implementation) FPGA soft core, as configured for simulation.
8 include "BERI_TEMPLATE"
12 hints "BERI_SIM.hints" #Default places to look for devices.
15 # This kernel configuration uses an embedded 8MB memory root file system.
16 # Adjust the following path based on local requirements.
18 options MD_ROOT # MD is a potential root device
19 options MD_ROOT_SIZE=8192
20 options ROOTDEVNAME=\"ufs:md0\"
23 device altera_jtag_uart