1 /* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
7 * This code is derived from software contributed to Berkeley by
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22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
35 * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
42 * Macros used when writing assembler programs.
44 * Copyright (C) 1989 Digital Equipment Corporation.
45 * Permission to use, copy, modify, and distribute this software and
46 * its documentation for any purpose and without fee is hereby granted,
47 * provided that the above copyright notice appears in all copies.
48 * Digital Equipment Corporation makes no representations about the
49 * suitability of this software for any purpose. It is provided "as is"
50 * without express or implied warranty.
52 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
53 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
56 #ifndef _MACHINE_ASM_H_
57 #define _MACHINE_ASM_H_
60 #include <machine/regdef.h>
62 #include <machine/endian.h>
65 #if !defined(lint) && !defined(STRIP_FBSDID)
66 #define __FBSDID(s) .ident s
68 #define __FBSDID(s) /* nothing */
72 * Define -pg profile entry code.
73 * Must always be noreorder, must never use a macro instruction
74 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
76 #define _KERN_MCOUNT \
83 lui t9,%hi(_mcount); \
84 addiu t9,t9,%lo(_mcount); \
93 #define MCOUNT _KERN_MCOUNT
101 * Endian-independent assembly-code aliases for unaligned memory accesses.
103 #if BYTE_ORDER == LITTLE_ENDIAN
110 #if BYTE_ORDER == BIG_ENDIAN
125 * WARN_REFERENCES: create a warning if the specified symbol is referenced
127 #define WARN_REFERENCES(_sym,_msg) \
128 .section .gnu.warning. ## _sym ; .ascii _msg ; .text
131 * These are temp registers whose names can be used in either the old
132 * or new ABI, although they map to different physical registers. In
133 * the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7.
135 * Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3
136 * should be used only when we need more than t0-t3.
138 #if defined(__mips_n32) || defined(__mips_n64)
148 #endif /* __mips_n32 || __mips_n64 */
151 # define _C_LABEL(x) x
153 # define _C_LABEL(x) _ ## x
157 * WEAK_ALIAS: create a weak alias.
159 #define WEAK_ALIAS(alias,sym) \
164 * STRONG_ALIAS: create a strong alias.
166 #define STRONG_ALIAS(alias,sym) \
170 #define GLOBAL(sym) \
174 .text; .globl sym; .ent sym; sym:
176 #define ASM_ENTRY(sym) \
177 .text; .globl sym; .type sym,@function; sym:
181 * A leaf routine does
182 * - call no other function,
183 * - never use any register that callee-saved (S0-S8), and
184 * - not use any local stack storage.
187 .globl _C_LABEL(x); \
188 .ent _C_LABEL(x), 0; \
195 * No profilable leaf routine.
197 #define LEAF_NOPROFILE(x) \
198 .globl _C_LABEL(x); \
199 .ent _C_LABEL(x), 0; \
205 * declare alternate entry to leaf routine
208 .globl _C_LABEL(x); \
209 AENT (_C_LABEL(x)); \
214 * A function calls other functions and needs
215 * therefore stack space to save/restore registers.
217 #define NESTED(x, fsize, retpc) \
218 .globl _C_LABEL(x); \
219 .ent _C_LABEL(x), 0; \
221 .frame sp, fsize, retpc; \
225 * NESTED_NOPROFILE(x)
226 * No profilable nested routine.
228 #define NESTED_NOPROFILE(x, fsize, retpc) \
229 .globl _C_LABEL(x); \
230 .ent _C_LABEL(x), 0; \
232 .frame sp, fsize, retpc
236 * declare alternate entry point to nested routine.
239 .globl _C_LABEL(x); \
240 AENT (_C_LABEL(x)); \
245 * Mark end of a procedure.
251 * IMPORT -- import external symbol
253 #define IMPORT(sym, size) \
254 .extern _C_LABEL(sym),size
257 * EXPORT -- export definition of symbol
260 .globl _C_LABEL(x); \
265 * exception vector entrypoint
266 * XXX: regmask should be used to generate .mask
268 #define VECTOR(x, regmask) \
269 .ent _C_LABEL(x),0; \
272 #define VECTOR_END(x) \
276 #define KSEG0TEXT_START
277 #define KSEG0TEXT_END
278 #define KSEG0TEXT .text
281 * Macros to panic and printf from assembly language.
285 jal _C_LABEL(panic); \
289 #define PANIC_KSEG0(msg, reg) PANIC(msg)
291 #define PRINTF(msg) \
293 jal _C_LABEL(printf); \
302 #define ASMSTR(str) \
307 * Call ast if required
311 la s0, _C_LABEL(disableintr) ;\
315 lw s3, PC_CURPCB(s1) ;\
316 lw s1, PC_CURTHREAD(s1) ;\
317 lw s2, TD_FLAGS(s1) ;\
318 li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
320 la s0, _C_LABEL(enableintr) ;\
325 la s0, _C_LABEL(ast) ;\
327 addu a0, s3, U_PCB_REGS ;\
334 * XXX retain dialects XXX
336 #define ALEAF(x) XLEAF(x)
337 #define NLEAF(x) LEAF_NOPROFILE(x)
338 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc)
339 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc)
342 * standard callframe {
343 * register_t cf_args[4]; arg0 - arg3
344 * register_t cf_sp; frame pointer
345 * register_t cf_ra; return address
348 #define CALLFRAME_SIZ (4 * (4 + 2))
349 #define CALLFRAME_SP (4 * 4)
350 #define CALLFRAME_RA (4 * 5)
351 #define START_FRAME CALLFRAME_SIZ
354 * While it would be nice to be compatible with the SGI
355 * REG_L and REG_S macros, because they do not take parameters, it
356 * is impossible to use them with the _MIPS_SIM_ABIX32 model.
358 * These macros hide the use of mips3 instructions from the
359 * assembler to prevent the assembler from generating 64-bit style
363 #if !defined(_MIPS_BSD_API) || _MIPS_BSD_API == _MIPS_BSD_API_LP32
367 #define REG_PROLOGUE .set push
368 #define REG_EPILOGUE .set pop
374 #define REG_PROLOGUE .set push ; .set mips3
375 #define REG_EPILOGUE .set pop
377 #endif /* _MIPS_BSD_API */
379 #define mfc0_macro(data, spr) \
380 __asm __volatile ("mfc0 %0, $%1" \
381 : "=r" (data) /* outputs */ \
382 : "i" (spr)); /* inputs */
384 #define mtc0_macro(data, spr) \
385 __asm __volatile ("mtc0 %0, $%1" \
387 : "r" (data), "i" (spr)); /* inputs */
389 #define cfc0_macro(data, spr) \
390 __asm __volatile ("cfc0 %0, $%1" \
391 : "=r" (data) /* outputs */ \
392 : "i" (spr)); /* inputs */
394 #define ctc0_macro(data, spr) \
395 __asm __volatile ("ctc0 %0, $%1" \
397 : "r" (data), "i" (spr)); /* inputs */
400 #define lbu_macro(data, addr) \
401 __asm __volatile ("lbu %0, 0x0(%1)" \
402 : "=r" (data) /* outputs */ \
403 : "r" (addr)); /* inputs */
405 #define lb_macro(data, addr) \
406 __asm __volatile ("lb %0, 0x0(%1)" \
407 : "=r" (data) /* outputs */ \
408 : "r" (addr)); /* inputs */
410 #define lwl_macro(data, addr) \
411 __asm __volatile ("lwl %0, 0x0(%1)" \
412 : "=r" (data) /* outputs */ \
413 : "r" (addr)); /* inputs */
415 #define lwr_macro(data, addr) \
416 __asm __volatile ("lwr %0, 0x0(%1)" \
417 : "=r" (data) /* outputs */ \
418 : "r" (addr)); /* inputs */
420 #define ldl_macro(data, addr) \
421 __asm __volatile ("ldl %0, 0x0(%1)" \
422 : "=r" (data) /* outputs */ \
423 : "r" (addr)); /* inputs */
425 #define ldr_macro(data, addr) \
426 __asm __volatile ("ldr %0, 0x0(%1)" \
427 : "=r" (data) /* outputs */ \
428 : "r" (addr)); /* inputs */
430 #define sb_macro(data, addr) \
431 __asm __volatile ("sb %0, 0x0(%1)" \
433 : "r" (data), "r" (addr)); /* inputs */
435 #define swl_macro(data, addr) \
436 __asm __volatile ("swl %0, 0x0(%1)" \
438 : "r" (data), "r" (addr)); /* inputs */
440 #define swr_macro(data, addr) \
441 __asm __volatile ("swr %0, 0x0(%1)" \
443 : "r" (data), "r" (addr)); /* inputs */
445 #define sdl_macro(data, addr) \
446 __asm __volatile ("sdl %0, 0x0(%1)" \
448 : "r" (data), "r" (addr)); /* inputs */
450 #define sdr_macro(data, addr) \
451 __asm __volatile ("sdr %0, 0x0(%1)" \
453 : "r" (data), "r" (addr)); /* inputs */
455 #define mfgr_macro(data, gr) \
456 __asm __volatile ("move %0, $%1" \
457 : "=r" (data) /* outputs */ \
458 : "i" (gr)); /* inputs */
460 #define dmfc0_macro(data, spr) \
461 __asm __volatile ("dmfc0 %0, $%1" \
462 : "=r" (data) /* outputs */ \
463 : "i" (spr)); /* inputs */
465 #define dmtc0_macro(data, spr, sel) \
466 __asm __volatile ("dmtc0 %0, $%1, %2" \
468 : "r" (data), "i" (spr), "i" (sel)); /* inputs */
471 * The DYNAMIC_STATUS_MASK option adds an additional masking operation
472 * when updating the hardware interrupt mask in the status register.
474 * This is useful for platforms that need to at run-time mask
475 * interrupts based on motherboard configuration or to handle
476 * slowly clearing interrupts.
478 * XXX this is only currently implemented for mips3.
480 #ifdef MIPS_DYNAMIC_STATUS_MASK
481 #define DYNAMIC_STATUS_MASK(sr,scratch) \
482 lw scratch, mips_dynamic_status_mask; \
485 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1) \
486 ori sr, (MIPS_INT_MASK | MIPS_SR_INT_IE); \
487 DYNAMIC_STATUS_MASK(sr,scratch1)
489 #define DYNAMIC_STATUS_MASK(sr,scratch)
490 #define DYNAMIC_STATUS_MASK_TOUSER(sr,scratch1)
495 * FREEBSD_DEVELOPERS_FIXME
496 * In multiprocessor case, store/retrieve the pcpu structure
497 * address for current CPU in scratch register for fast access.
499 #error "Write GET_CPU_PCPU for SMP"
501 #define GET_CPU_PCPU(reg) \
502 lw reg, _C_LABEL(pcpup);
506 * Description of the setjmp buffer
508 * word 0 magic number (dependant on creator)
520 * 12 signal mask (dependant on magic)
525 * The magic number number identifies the jmp_buf and
526 * how the buffer was created as well as providing
531 #define _JB_MAGIC__SETJMP 0xBADFACED
532 #define _JB_MAGIC_SETJMP 0xFACEDBAD
534 /* Valid for all jmp_buf's */
546 #define _JB_REG_SP 10
547 #define _JB_REG_S8 11
549 /* Only valid with the _JB_MAGIC_SETJMP magic */
551 #define _JB_SIGMASK 12
553 #endif /* !_MACHINE_ASM_H_ */