1 /* $NetBSD: asm.h,v 1.29 2000/12/14 21:29:51 jeffs Exp $ */
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
7 * This code is derived from software contributed to Berkeley by
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34 * @(#)machAsmDefs.h 8.1 (Berkeley) 6/10/93
35 * JNPR: asm.h,v 1.10 2007/08/09 11:23:32 katta
42 * Macros used when writing assembler programs.
44 * Copyright (C) 1989 Digital Equipment Corporation.
45 * Permission to use, copy, modify, and distribute this software and
46 * its documentation for any purpose and without fee is hereby granted,
47 * provided that the above copyright notice appears in all copies.
48 * Digital Equipment Corporation makes no representations about the
49 * suitability of this software for any purpose. It is provided "as is"
50 * without express or implied warranty.
52 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsmDefs.h,
53 * v 1.2 89/08/15 18:28:24 rab Exp SPRITE (DECWRL)
56 #ifndef _MACHINE_ASM_H_
57 #define _MACHINE_ASM_H_
59 #include <machine/regdef.h>
60 #include <machine/endian.h>
61 #include <machine/cdefs.h>
64 #if !defined(lint) && !defined(STRIP_FBSDID)
65 #define __FBSDID(s) .ident s
67 #define __FBSDID(s) /* nothing */
71 * Define -pg profile entry code.
72 * Must always be noreorder, must never use a macro instruction
73 * Final addiu to t9 must always equal the size of this _KERN_MCOUNT
75 #define _KERN_MCOUNT \
82 lui t9,%hi(_mcount); \
83 addiu t9,t9,%lo(_mcount); \
92 #define MCOUNT _KERN_MCOUNT
107 * WARN_REFERENCES: create a warning if the specified symbol is referenced
109 #define WARN_REFERENCES(_sym,_msg) \
110 .section .gnu.warning. ## _sym ; .ascii _msg ; .text
113 # define _C_LABEL(x) x
115 # define _C_LABEL(x) _ ## x
119 * WEAK_ALIAS: create a weak alias.
121 #define WEAK_ALIAS(alias,sym) \
126 * STRONG_ALIAS: create a strong alias.
128 #define STRONG_ALIAS(alias,sym) \
132 #define GLOBAL(sym) \
136 .text; .globl sym; .ent sym; sym:
138 #define ASM_ENTRY(sym) \
139 .text; .globl sym; .type sym,@function; sym:
143 * A leaf routine does
144 * - call no other function,
145 * - never use any register that callee-saved (S0-S8), and
146 * - not use any local stack storage.
149 .globl _C_LABEL(x); \
150 .ent _C_LABEL(x), 0; \
157 * No profilable leaf routine.
159 #define LEAF_NOPROFILE(x) \
160 .globl _C_LABEL(x); \
161 .ent _C_LABEL(x), 0; \
167 * declare alternate entry to leaf routine
170 .globl _C_LABEL(x); \
171 AENT (_C_LABEL(x)); \
176 * A function calls other functions and needs
177 * therefore stack space to save/restore registers.
179 #define NESTED(x, fsize, retpc) \
180 .globl _C_LABEL(x); \
181 .ent _C_LABEL(x), 0; \
183 .frame sp, fsize, retpc; \
187 * NESTED_NOPROFILE(x)
188 * No profilable nested routine.
190 #define NESTED_NOPROFILE(x, fsize, retpc) \
191 .globl _C_LABEL(x); \
192 .ent _C_LABEL(x), 0; \
194 .frame sp, fsize, retpc
198 * declare alternate entry point to nested routine.
201 .globl _C_LABEL(x); \
202 AENT (_C_LABEL(x)); \
207 * Mark end of a procedure.
213 * IMPORT -- import external symbol
215 #define IMPORT(sym, size) \
216 .extern _C_LABEL(sym),size
219 * EXPORT -- export definition of symbol
222 .globl _C_LABEL(x); \
227 * exception vector entrypoint
228 * XXX: regmask should be used to generate .mask
230 #define VECTOR(x, regmask) \
231 .ent _C_LABEL(x),0; \
234 #define VECTOR_END(x) \
239 * Macros to panic and printf from assembly language.
243 jal _C_LABEL(panic); \
247 #define PANIC_KSEG0(msg, reg) PANIC(msg)
249 #define PRINTF(msg) \
251 jal _C_LABEL(printf); \
260 #define ASMSTR(str) \
265 * Call ast if required
267 * XXX Do we really need to disable interrupts?
271 mfc0 t0, MIPS_COP_0_STATUS ;\
272 and a0, t0, MIPS_SR_INT_IE ;\
274 mtc0 t0, MIPS_COP_0_STATUS ;\
277 PTR_L s3, PC_CURPCB(s1) ;\
278 PTR_L s1, PC_CURTHREAD(s1) ;\
279 lw s2, TD_FLAGS(s1) ;\
280 li s0, TDF_ASTPENDING | TDF_NEEDRESCHED;\
282 mfc0 t0, MIPS_COP_0_STATUS ;\
284 mtc0 t0, MIPS_COP_0_STATUS ;\
288 PTR_LA s0, _C_LABEL(ast) ;\
290 PTR_ADDU a0, s3, U_PCB_REGS ;\
297 * XXX retain dialects XXX
299 #define ALEAF(x) XLEAF(x)
300 #define NLEAF(x) LEAF_NOPROFILE(x)
301 #define NON_LEAF(x, fsize, retpc) NESTED(x, fsize, retpc)
302 #define NNON_LEAF(x, fsize, retpc) NESTED_NOPROFILE(x, fsize, retpc)
304 #if defined(__mips_o32)
310 #if defined(__mips_o32) || defined(__mips_o64)
311 #define ALSK 7 /* stack alignment */
312 #define ALMASK -7 /* stack alignment */
317 #define ALSK 15 /* stack alignment */
318 #define ALMASK -15 /* stack alignment */
325 * standard callframe {
326 * register_t cf_pad[N]; o32/64 (N=0), n32 (N=1) n64 (N=1)
327 * register_t cf_args[4]; arg0 - arg3 (only on o32 and o64)
328 * register_t cf_gp; global pointer (only on n32 and n64)
329 * register_t cf_sp; frame pointer
330 * register_t cf_ra; return address
333 #if defined(__mips_o32) || defined(__mips_o64)
334 #define CALLFRAME_SIZ (SZREG * (4 + 2))
335 #define CALLFRAME_S0 0
336 #elif defined(__mips_n32) || defined(__mips_n64)
337 #define CALLFRAME_SIZ (SZREG * 4)
338 #define CALLFRAME_S0 (CALLFRAME_SIZ - 4 * SZREG)
341 #define CALLFRAME_GP (CALLFRAME_SIZ - 3 * SZREG)
343 #define CALLFRAME_SP (CALLFRAME_SIZ - 2 * SZREG)
344 #define CALLFRAME_RA (CALLFRAME_SIZ - 1 * SZREG)
347 * Endian-independent assembly-code aliases for unaligned memory accesses.
349 #if _BYTE_ORDER == _LITTLE_ENDIAN
367 #if _BYTE_ORDER == _BIG_ENDIAN
386 * While it would be nice to be compatible with the SGI
387 * REG_L and REG_S macros, because they do not take parameters, it
388 * is impossible to use them with the _MIPS_SIM_ABIX32 model.
390 * These macros hide the use of mips3 instructions from the
391 * assembler to prevent the assembler from generating 64-bit style
394 #if _MIPS_SZPTR == 32
396 #define PTR_ADDI addi
397 #define PTR_ADDU addu
398 #define PTR_ADDIU addiu
400 #define PTR_SUBI subi
401 #define PTR_SUBU subu
402 #define PTR_SUBIU subu
408 #define PTR_SLLV sllv
410 #define PTR_SRLV srlv
412 #define PTR_SRAV srav
415 #define PTR_WORD .word
416 #define PTR_SCALESHIFT 2
417 #else /* _MIPS_SZPTR == 64 */
419 #define PTR_ADDI daddi
420 #define PTR_ADDU daddu
421 #define PTR_ADDIU daddiu
423 #define PTR_SUBI dsubi
424 #define PTR_SUBU dsubu
425 #define PTR_SUBIU dsubu
431 #define PTR_SLLV dsllv
433 #define PTR_SRLV dsrlv
435 #define PTR_SRAV dsrav
438 #define PTR_WORD .dword
439 #define PTR_SCALESHIFT 3
440 #endif /* _MIPS_SZPTR == 64 */
442 #if _MIPS_SZINT == 32
444 #define INT_ADDI addi
445 #define INT_ADDU addu
446 #define INT_ADDIU addiu
448 #define INT_SUBI subi
449 #define INT_SUBU subu
450 #define INT_SUBIU subu
455 #define INT_SLLV sllv
457 #define INT_SRLV srlv
459 #define INT_SRAV srav
462 #define INT_WORD .word
463 #define INT_SCALESHIFT 2
466 #define INT_ADDI daddi
467 #define INT_ADDU daddu
468 #define INT_ADDIU daddiu
470 #define INT_SUBI dsubi
471 #define INT_SUBU dsubu
472 #define INT_SUBIU dsubu
477 #define INT_SLLV dsllv
479 #define INT_SRLV dsrlv
481 #define INT_SRAV dsrav
484 #define INT_WORD .dword
485 #define INT_SCALESHIFT 3
488 #if _MIPS_SZLONG == 32
490 #define LONG_ADDI addi
491 #define LONG_ADDU addu
492 #define LONG_ADDIU addiu
494 #define LONG_SUBI subi
495 #define LONG_SUBU subu
496 #define LONG_SUBIU subu
501 #define LONG_SLLV sllv
503 #define LONG_SRLV srlv
505 #define LONG_SRAV srav
508 #define LONG_WORD .word
509 #define LONG_SCALESHIFT 2
511 #define LONG_ADD dadd
512 #define LONG_ADDI daddi
513 #define LONG_ADDU daddu
514 #define LONG_ADDIU daddiu
515 #define LONG_SUB dadd
516 #define LONG_SUBI dsubi
517 #define LONG_SUBU dsubu
518 #define LONG_SUBIU dsubu
522 #define LONG_SLL dsll
523 #define LONG_SLLV dsllv
524 #define LONG_SRL dsrl
525 #define LONG_SRLV dsrlv
526 #define LONG_SRA dsra
527 #define LONG_SRAV dsrav
530 #define LONG_WORD .dword
531 #define LONG_SCALESHIFT 3
538 #define REG_ADDU addu
540 #define REG_SLLV sllv
542 #define REG_SRLV srlv
544 #define REG_SRAV srav
547 #define REG_SCALESHIFT 2
552 #define REG_ADDU daddu
554 #define REG_SLLV dsllv
556 #define REG_SRLV dsrlv
558 #define REG_SRAV dsrav
561 #define REG_SCALESHIFT 3
564 #if _MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || \
565 _MIPS_ISA == _MIPS_ISA_MIPS32
569 #if _MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || \
570 _MIPS_ISA == _MIPS_ISA_MIPS64
575 #if defined(__mips_o32) || defined(__mips_o64)
578 #define CPRESTORE(r) .cprestore r
579 #define CPLOAD(r) .cpload r
581 #define CPRESTORE(r) /* not needed */
582 #define CPLOAD(r) /* not needed */
590 #define SETUP_GPX(r) \
593 move r,ra; /* save old ra */ \
599 #define SETUP_GPX_L(r,lbl) \
602 move r,ra; /* save old ra */ \
608 #define SAVE_GP(x) .cprestore x
610 #define SETUP_GP64(a,b) /* n32/n64 specific */
611 #define SETUP_GP64_R(a,b) /* n32/n64 specific */
612 #define SETUP_GPX64(a,b) /* n32/n64 specific */
613 #define SETUP_GPX64_L(a,b,c) /* n32/n64 specific */
614 #define RESTORE_GP64 /* n32/n64 specific */
615 #define USE_ALT_CP(a) /* n32/n64 specific */
616 #endif /* __mips_o32 || __mips_o64 */
618 #if defined(__mips_o32) || defined(__mips_o64)
619 #define REG_PROLOGUE .set push
620 #define REG_EPILOGUE .set pop
622 #if defined(__mips_n32) || defined(__mips_n64)
623 #define REG_PROLOGUE .set push ; .set mips3
624 #define REG_EPILOGUE .set pop
627 #if defined(__mips_n32) || defined(__mips_n64)
628 #define SETUP_GP /* o32 specific */
629 #define SETUP_GPX(r) /* o32 specific */
630 #define SETUP_GPX_L(r,lbl) /* o32 specific */
631 #define SAVE_GP(x) /* o32 specific */
632 #define SETUP_GP64(a,b) .cpsetup $25, a, b
633 #define SETUP_GPX64(a,b) \
640 .cpsetup ra, a, 7b; \
642 #define SETUP_GPX64_L(a,b,c) \
651 #define RESTORE_GP64 .cpreturn
652 #define USE_ALT_CP(a) .cplocal a
653 #endif /* __mips_n32 || __mips_n64 */
655 #define GET_CPU_PCPU(reg) \
656 PTR_L reg, _C_LABEL(pcpup);
659 * Description of the setjmp buffer
661 * word 0 magic number (dependant on creator)
673 * 12 GP (dependent on ABI)
674 * 13 signal mask (dependant on magic)
679 * The magic number number identifies the jmp_buf and
680 * how the buffer was created as well as providing
685 #define _JB_MAGIC__SETJMP 0xBADFACED
686 #define _JB_MAGIC_SETJMP 0xFACEDBAD
688 /* Valid for all jmp_buf's */
700 #define _JB_REG_SP 10
701 #define _JB_REG_S8 11
702 #if defined(__mips_n32) || defined(__mips_n64)
703 #define _JB_REG_GP 12
706 /* Only valid with the _JB_MAGIC_SETJMP magic */
708 #define _JB_SIGMASK 13
709 #define __JB_SIGMASK_REMAINDER 14 /* sigmask_t is 128-bits */
711 #define _JB_FPREG_F20 15
712 #define _JB_FPREG_F21 16
713 #define _JB_FPREG_F22 17
714 #define _JB_FPREG_F23 18
715 #define _JB_FPREG_F24 19
716 #define _JB_FPREG_F25 20
717 #define _JB_FPREG_F26 21
718 #define _JB_FPREG_F27 22
719 #define _JB_FPREG_F28 23
720 #define _JB_FPREG_F29 24
721 #define _JB_FPREG_F30 25
722 #define _JB_FPREG_F31 26
723 #define _JB_FPREG_FCSR 27
726 * Various macros for dealing with TLB hazards
729 * (c) why not used everywhere?
732 * Assume that w alaways need nops to escape CP0 hazard
733 * TODO: Make hazard delays configurable. Stuck with 5 cycles on the moment
734 * For more info on CP0 hazards see Chapter 7 (p.99) of "MIPS32 Architecture
735 * For Programmers Volume III: The MIPS32 Privileged Resource Architecture"
738 #define HAZARD_DELAY sll $0,3
739 #define ITLBNOPFIX sll $0,3
740 #elif defined(CPU_RMI)
743 #elif defined(CPU_MIPS74KC)
744 #define HAZARD_DELAY sll $0,$0,3
745 #define ITLBNOPFIX sll $0,$0,3
747 #define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;sll $0,$0,3;
748 #define HAZARD_DELAY nop;nop;nop;nop;sll $0,$0,3;
751 #endif /* !_MACHINE_ASM_H_ */