2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1998 Doug Rabson
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * from: src/sys/alpha/include/atomic.h,v 1.21.2.3 2005/10/06 18:12:05 jhb
32 #ifndef _MACHINE_ATOMIC_H_
33 #define _MACHINE_ATOMIC_H_
36 #error this file needs sys/cdefs.h as a prerequisite
39 #include <sys/atomic_common.h>
42 * Note: All the 64-bit atomic operations are only atomic when running
43 * in 64-bit mode. It is assumed that code compiled for n32 and n64
44 * fits into this definition and no further safeties are needed.
46 * It is also assumed that the add, subtract and other arithmetic is
47 * done on numbers not pointers. The special rules for n32 pointers
48 * do not have atomic operations defined for them, but generally shouldn't
49 * need atomic operations.
51 #ifndef __MIPS_PLATFORM_SYNC_NOPS
52 #define __MIPS_PLATFORM_SYNC_NOPS ""
58 __asm __volatile (".set noreorder\n"
60 __MIPS_PLATFORM_SYNC_NOPS
65 #define mb() mips_sync()
66 #define wmb() mips_sync()
67 #define rmb() mips_sync()
70 * Various simple arithmetic on memory which is atomic in the presence
71 * of interrupts and SMP safe.
74 void atomic_set_8(__volatile uint8_t *, uint8_t);
75 void atomic_clear_8(__volatile uint8_t *, uint8_t);
76 void atomic_add_8(__volatile uint8_t *, uint8_t);
77 void atomic_subtract_8(__volatile uint8_t *, uint8_t);
79 void atomic_set_16(__volatile uint16_t *, uint16_t);
80 void atomic_clear_16(__volatile uint16_t *, uint16_t);
81 void atomic_add_16(__volatile uint16_t *, uint16_t);
82 void atomic_subtract_16(__volatile uint16_t *, uint16_t);
85 atomic_set_32(__volatile uint32_t *p, uint32_t v)
90 "1:\tll %0, %3\n\t" /* load old value */
91 "or %0, %2, %0\n\t" /* calculate new value */
92 "sc %0, %1\n\t" /* attempt to store */
93 "beqz %0, 1b\n\t" /* spin if failed */
94 : "=&r" (temp), "=m" (*p)
101 atomic_clear_32(__volatile uint32_t *p, uint32_t v)
107 "1:\tll %0, %3\n\t" /* load old value */
108 "and %0, %2, %0\n\t" /* calculate new value */
109 "sc %0, %1\n\t" /* attempt to store */
110 "beqz %0, 1b\n\t" /* spin if failed */
111 : "=&r" (temp), "=m" (*p)
117 atomic_add_32(__volatile uint32_t *p, uint32_t v)
122 "1:\tll %0, %3\n\t" /* load old value */
123 "addu %0, %2, %0\n\t" /* calculate new value */
124 "sc %0, %1\n\t" /* attempt to store */
125 "beqz %0, 1b\n\t" /* spin if failed */
126 : "=&r" (temp), "=m" (*p)
132 atomic_subtract_32(__volatile uint32_t *p, uint32_t v)
137 "1:\tll %0, %3\n\t" /* load old value */
138 "subu %0, %2\n\t" /* calculate new value */
139 "sc %0, %1\n\t" /* attempt to store */
140 "beqz %0, 1b\n\t" /* spin if failed */
141 : "=&r" (temp), "=m" (*p)
146 static __inline uint32_t
147 atomic_readandclear_32(__volatile uint32_t *addr)
149 uint32_t result,temp;
152 "1:\tll %0,%3\n\t" /* load current value, asserting lock */
153 "li %1,0\n\t" /* value to store */
154 "sc %1,%2\n\t" /* attempt to store */
155 "beqz %1, 1b\n\t" /* if the store failed, spin */
156 : "=&r"(result), "=&r"(temp), "=m" (*addr)
163 static __inline uint32_t
164 atomic_readandset_32(__volatile uint32_t *addr, uint32_t value)
166 uint32_t result,temp;
169 "1:\tll %0,%3\n\t" /* load current value, asserting lock */
171 "sc %1,%2\n\t" /* attempt to store */
172 "beqz %1, 1b\n\t" /* if the store failed, spin */
173 : "=&r"(result), "=&r"(temp), "=m" (*addr)
174 : "m" (*addr), "r" (value)
180 #if defined(__mips_n64) || defined(__mips_n32)
182 atomic_set_64(__volatile uint64_t *p, uint64_t v)
188 "lld %0, %3\n\t" /* load old value */
189 "or %0, %2, %0\n\t" /* calculate new value */
190 "scd %0, %1\n\t" /* attempt to store */
191 "beqz %0, 1b\n\t" /* spin if failed */
192 : "=&r" (temp), "=m" (*p)
199 atomic_clear_64(__volatile uint64_t *p, uint64_t v)
206 "lld %0, %3\n\t" /* load old value */
207 "and %0, %2, %0\n\t" /* calculate new value */
208 "scd %0, %1\n\t" /* attempt to store */
209 "beqz %0, 1b\n\t" /* spin if failed */
210 : "=&r" (temp), "=m" (*p)
216 atomic_add_64(__volatile uint64_t *p, uint64_t v)
222 "lld %0, %3\n\t" /* load old value */
223 "daddu %0, %2, %0\n\t" /* calculate new value */
224 "scd %0, %1\n\t" /* attempt to store */
225 "beqz %0, 1b\n\t" /* spin if failed */
226 : "=&r" (temp), "=m" (*p)
232 atomic_subtract_64(__volatile uint64_t *p, uint64_t v)
238 "lld %0, %3\n\t" /* load old value */
239 "dsubu %0, %2\n\t" /* calculate new value */
240 "scd %0, %1\n\t" /* attempt to store */
241 "beqz %0, 1b\n\t" /* spin if failed */
242 : "=&r" (temp), "=m" (*p)
247 static __inline uint64_t
248 atomic_readandclear_64(__volatile uint64_t *addr)
250 uint64_t result,temp;
254 "lld %0, %3\n\t" /* load old value */
255 "li %1, 0\n\t" /* value to store */
256 "scd %1, %2\n\t" /* attempt to store */
257 "beqz %1, 1b\n\t" /* if the store failed, spin */
258 : "=&r"(result), "=&r"(temp), "=m" (*addr)
265 static __inline uint64_t
266 atomic_readandset_64(__volatile uint64_t *addr, uint64_t value)
268 uint64_t result,temp;
272 "lld %0,%3\n\t" /* Load old value*/
274 "scd %1,%2\n\t" /* attempt to store */
275 "beqz %1, 1b\n\t" /* if the store failed, spin */
276 : "=&r"(result), "=&r"(temp), "=m" (*addr)
277 : "m" (*addr), "r" (value)
284 #define ATOMIC_ACQ_REL(NAME, WIDTH) \
285 static __inline void \
286 atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
288 atomic_##NAME##_##WIDTH(p, v); \
292 static __inline void \
293 atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
296 atomic_##NAME##_##WIDTH(p, v); \
299 /* Variants of simple arithmetic with memory barriers. */
300 ATOMIC_ACQ_REL(set, 8)
301 ATOMIC_ACQ_REL(clear, 8)
302 ATOMIC_ACQ_REL(add, 8)
303 ATOMIC_ACQ_REL(subtract, 8)
304 ATOMIC_ACQ_REL(set, 16)
305 ATOMIC_ACQ_REL(clear, 16)
306 ATOMIC_ACQ_REL(add, 16)
307 ATOMIC_ACQ_REL(subtract, 16)
308 ATOMIC_ACQ_REL(set, 32)
309 ATOMIC_ACQ_REL(clear, 32)
310 ATOMIC_ACQ_REL(add, 32)
311 ATOMIC_ACQ_REL(subtract, 32)
312 #if defined(__mips_n64) || defined(__mips_n32)
313 ATOMIC_ACQ_REL(set, 64)
314 ATOMIC_ACQ_REL(clear, 64)
315 ATOMIC_ACQ_REL(add, 64)
316 ATOMIC_ACQ_REL(subtract, 64)
319 #undef ATOMIC_ACQ_REL
322 * We assume that a = b will do atomic loads and stores.
324 #define ATOMIC_STORE_LOAD(WIDTH) \
325 static __inline uint##WIDTH##_t \
326 atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p) \
335 static __inline void \
336 atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
342 ATOMIC_STORE_LOAD(32)
343 ATOMIC_STORE_LOAD(64)
344 #undef ATOMIC_STORE_LOAD
347 * Atomically compare the value stored at *p with cmpval and if the
348 * two values are equal, update the value of *p with newval. Returns
349 * zero if the compare failed, nonzero otherwise.
352 atomic_cmpset_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
357 "1:\tll %0, %4\n\t" /* load old value */
358 "bne %0, %2, 2f\n\t" /* compare */
359 "move %0, %3\n\t" /* value to store */
360 "sc %0, %1\n\t" /* attempt to store */
361 "beqz %0, 1b\n\t" /* if it failed, spin */
366 : "=&r" (ret), "=m" (*p)
367 : "r" (cmpval), "r" (newval), "m" (*p)
374 * Atomically compare the value stored at *p with cmpval and if the
375 * two values are equal, update the value of *p with newval. Returns
376 * zero if the compare failed, nonzero otherwise.
379 atomic_cmpset_acq_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
383 retval = atomic_cmpset_32(p, cmpval, newval);
389 atomic_cmpset_rel_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
392 return (atomic_cmpset_32(p, cmpval, newval));
396 atomic_fcmpset_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
401 * The following sequence (similar to that in atomic_fcmpset_64) will
402 * attempt to update the value of *p with newval if the comparison
403 * succeeds. Note that they'll exit regardless of whether the store
404 * actually succeeded, leaving *cmpval untouched. This is in line with
405 * the documentation of atomic_fcmpset_<type>() in atomic(9) for ll/sc
409 "ll %0, %1\n\t" /* load old value */
410 "bne %0, %4, 1f\n\t" /* compare */
411 "move %0, %3\n\t" /* value to store */
412 "sc %0, %1\n\t" /* attempt to store */
413 "j 2f\n\t" /* exit regardless of success */
414 "nop\n\t" /* avoid delay slot accident */
416 "sw %0, %2\n\t" /* save old value */
419 : "=&r" (ret), "+m" (*p), "=m" (*cmpval)
420 : "r" (newval), "r" (*cmpval)
426 atomic_fcmpset_acq_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
430 retval = atomic_fcmpset_32(p, cmpval, newval);
436 atomic_fcmpset_rel_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
439 return (atomic_fcmpset_32(p, cmpval, newval));
443 * Atomically add the value of v to the integer pointed to by p and return
444 * the previous value of *p.
446 static __inline uint32_t
447 atomic_fetchadd_32(__volatile uint32_t *p, uint32_t v)
449 uint32_t value, temp;
452 "1:\tll %0, %1\n\t" /* load old value */
453 "addu %2, %3, %0\n\t" /* calculate new value */
454 "sc %2, %1\n\t" /* attempt to store */
455 "beqz %2, 1b\n\t" /* spin if failed */
456 : "=&r" (value), "=m" (*p), "=&r" (temp)
457 : "r" (v), "m" (*p));
461 #if defined(__mips_n64) || defined(__mips_n32)
463 * Atomically compare the value stored at *p with cmpval and if the
464 * two values are equal, update the value of *p with newval. Returns
465 * zero if the compare failed, nonzero otherwise.
468 atomic_cmpset_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
474 "lld %0, %4\n\t" /* load old value */
475 "bne %0, %2, 2f\n\t" /* compare */
476 "move %0, %3\n\t" /* value to store */
477 "scd %0, %1\n\t" /* attempt to store */
478 "beqz %0, 1b\n\t" /* if it failed, spin */
483 : "=&r" (ret), "=m" (*p)
484 : "r" (cmpval), "r" (newval), "m" (*p)
491 * Atomically compare the value stored at *p with cmpval and if the
492 * two values are equal, update the value of *p with newval. Returns
493 * zero if the compare failed, nonzero otherwise.
496 atomic_cmpset_acq_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
500 retval = atomic_cmpset_64(p, cmpval, newval);
506 atomic_cmpset_rel_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
509 return (atomic_cmpset_64(p, cmpval, newval));
513 atomic_fcmpset_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
518 "lld %0, %1\n\t" /* load old value */
519 "bne %0, %4, 1f\n\t" /* compare */
520 "move %0, %3\n\t" /* value to store */
521 "scd %0, %1\n\t" /* attempt to store */
522 "j 2f\n\t" /* exit regardless of success */
523 "nop\n\t" /* avoid delay slot accident */
525 "sd %0, %2\n\t" /* save old value */
528 : "=&r" (ret), "+m" (*p), "=m" (*cmpval)
529 : "r" (newval), "r" (*cmpval)
536 atomic_fcmpset_acq_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
540 retval = atomic_fcmpset_64(p, cmpval, newval);
546 atomic_fcmpset_rel_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
549 return (atomic_fcmpset_64(p, cmpval, newval));
553 * Atomically add the value of v to the integer pointed to by p and return
554 * the previous value of *p.
556 static __inline uint64_t
557 atomic_fetchadd_64(__volatile uint64_t *p, uint64_t v)
559 uint64_t value, temp;
563 "lld %0, %1\n\t" /* load old value */
564 "daddu %2, %3, %0\n\t" /* calculate new value */
565 "scd %2, %1\n\t" /* attempt to store */
566 "beqz %2, 1b\n\t" /* spin if failed */
567 : "=&r" (value), "=m" (*p), "=&r" (temp)
568 : "r" (v), "m" (*p));
574 atomic_thread_fence_acq(void)
581 atomic_thread_fence_rel(void)
588 atomic_thread_fence_acq_rel(void)
595 atomic_thread_fence_seq_cst(void)
601 /* Operations on chars. */
602 #define atomic_set_char atomic_set_8
603 #define atomic_set_acq_char atomic_set_acq_8
604 #define atomic_set_rel_char atomic_set_rel_8
605 #define atomic_clear_char atomic_clear_8
606 #define atomic_clear_acq_char atomic_clear_acq_8
607 #define atomic_clear_rel_char atomic_clear_rel_8
608 #define atomic_add_char atomic_add_8
609 #define atomic_add_acq_char atomic_add_acq_8
610 #define atomic_add_rel_char atomic_add_rel_8
611 #define atomic_subtract_char atomic_subtract_8
612 #define atomic_subtract_acq_char atomic_subtract_acq_8
613 #define atomic_subtract_rel_char atomic_subtract_rel_8
615 /* Operations on shorts. */
616 #define atomic_set_short atomic_set_16
617 #define atomic_set_acq_short atomic_set_acq_16
618 #define atomic_set_rel_short atomic_set_rel_16
619 #define atomic_clear_short atomic_clear_16
620 #define atomic_clear_acq_short atomic_clear_acq_16
621 #define atomic_clear_rel_short atomic_clear_rel_16
622 #define atomic_add_short atomic_add_16
623 #define atomic_add_acq_short atomic_add_acq_16
624 #define atomic_add_rel_short atomic_add_rel_16
625 #define atomic_subtract_short atomic_subtract_16
626 #define atomic_subtract_acq_short atomic_subtract_acq_16
627 #define atomic_subtract_rel_short atomic_subtract_rel_16
629 /* Operations on ints. */
630 #define atomic_set_int atomic_set_32
631 #define atomic_set_acq_int atomic_set_acq_32
632 #define atomic_set_rel_int atomic_set_rel_32
633 #define atomic_clear_int atomic_clear_32
634 #define atomic_clear_acq_int atomic_clear_acq_32
635 #define atomic_clear_rel_int atomic_clear_rel_32
636 #define atomic_add_int atomic_add_32
637 #define atomic_add_acq_int atomic_add_acq_32
638 #define atomic_add_rel_int atomic_add_rel_32
639 #define atomic_subtract_int atomic_subtract_32
640 #define atomic_subtract_acq_int atomic_subtract_acq_32
641 #define atomic_subtract_rel_int atomic_subtract_rel_32
642 #define atomic_cmpset_int atomic_cmpset_32
643 #define atomic_cmpset_acq_int atomic_cmpset_acq_32
644 #define atomic_cmpset_rel_int atomic_cmpset_rel_32
645 #define atomic_fcmpset_int atomic_fcmpset_32
646 #define atomic_fcmpset_acq_int atomic_fcmpset_acq_32
647 #define atomic_fcmpset_rel_int atomic_fcmpset_rel_32
648 #define atomic_load_acq_int atomic_load_acq_32
649 #define atomic_store_rel_int atomic_store_rel_32
650 #define atomic_readandclear_int atomic_readandclear_32
651 #define atomic_readandset_int atomic_readandset_32
652 #define atomic_fetchadd_int atomic_fetchadd_32
655 * I think the following is right, even for n32. For n32 the pointers
656 * are still 32-bits, so we need to operate on them as 32-bit quantities,
657 * even though they are sign extended in operation. For longs, there's
658 * no question because they are always 32-bits.
661 /* Operations on longs. */
662 #define atomic_set_long atomic_set_64
663 #define atomic_set_acq_long atomic_set_acq_64
664 #define atomic_set_rel_long atomic_set_rel_64
665 #define atomic_clear_long atomic_clear_64
666 #define atomic_clear_acq_long atomic_clear_acq_64
667 #define atomic_clear_rel_long atomic_clear_rel_64
668 #define atomic_add_long atomic_add_64
669 #define atomic_add_acq_long atomic_add_acq_64
670 #define atomic_add_rel_long atomic_add_rel_64
671 #define atomic_subtract_long atomic_subtract_64
672 #define atomic_subtract_acq_long atomic_subtract_acq_64
673 #define atomic_subtract_rel_long atomic_subtract_rel_64
674 #define atomic_cmpset_long atomic_cmpset_64
675 #define atomic_cmpset_acq_long atomic_cmpset_acq_64
676 #define atomic_cmpset_rel_long atomic_cmpset_rel_64
677 #define atomic_fcmpset_long atomic_fcmpset_64
678 #define atomic_fcmpset_acq_long atomic_fcmpset_acq_64
679 #define atomic_fcmpset_rel_long atomic_fcmpset_rel_64
680 #define atomic_load_acq_long atomic_load_acq_64
681 #define atomic_store_rel_long atomic_store_rel_64
682 #define atomic_fetchadd_long atomic_fetchadd_64
683 #define atomic_readandclear_long atomic_readandclear_64
685 #else /* !__mips_n64 */
687 /* Operations on longs. */
688 #define atomic_set_long(p, v) \
689 atomic_set_32((volatile u_int *)(p), (u_int)(v))
690 #define atomic_set_acq_long(p, v) \
691 atomic_set_acq_32((volatile u_int *)(p), (u_int)(v))
692 #define atomic_set_rel_long(p, v) \
693 atomic_set_rel_32((volatile u_int *)(p), (u_int)(v))
694 #define atomic_clear_long(p, v) \
695 atomic_clear_32((volatile u_int *)(p), (u_int)(v))
696 #define atomic_clear_acq_long(p, v) \
697 atomic_clear_acq_32((volatile u_int *)(p), (u_int)(v))
698 #define atomic_clear_rel_long(p, v) \
699 atomic_clear_rel_32((volatile u_int *)(p), (u_int)(v))
700 #define atomic_add_long(p, v) \
701 atomic_add_32((volatile u_int *)(p), (u_int)(v))
702 #define atomic_add_acq_long(p, v) \
703 atomic_add_32((volatile u_int *)(p), (u_int)(v))
704 #define atomic_add_rel_long(p, v) \
705 atomic_add_32((volatile u_int *)(p), (u_int)(v))
706 #define atomic_subtract_long(p, v) \
707 atomic_subtract_32((volatile u_int *)(p), (u_int)(v))
708 #define atomic_subtract_acq_long(p, v) \
709 atomic_subtract_acq_32((volatile u_int *)(p), (u_int)(v))
710 #define atomic_subtract_rel_long(p, v) \
711 atomic_subtract_rel_32((volatile u_int *)(p), (u_int)(v))
712 #define atomic_cmpset_long(p, cmpval, newval) \
713 atomic_cmpset_32((volatile u_int *)(p), (u_int)(cmpval), \
715 #define atomic_cmpset_acq_long(p, cmpval, newval) \
716 atomic_cmpset_acq_32((volatile u_int *)(p), (u_int)(cmpval), \
718 #define atomic_cmpset_rel_long(p, cmpval, newval) \
719 atomic_cmpset_rel_32((volatile u_int *)(p), (u_int)(cmpval), \
721 #define atomic_fcmpset_long(p, cmpval, newval) \
722 atomic_fcmpset_32((volatile u_int *)(p), (u_int *)(cmpval), \
724 #define atomic_fcmpset_acq_long(p, cmpval, newval) \
725 atomic_fcmpset_acq_32((volatile u_int *)(p), (u_int *)(cmpval), \
727 #define atomic_fcmpset_rel_long(p, cmpval, newval) \
728 atomic_fcmpset_rel_32((volatile u_int *)(p), (u_int *)(cmpval), \
730 #define atomic_load_acq_long(p) \
731 (u_long)atomic_load_acq_32((volatile u_int *)(p))
732 #define atomic_store_rel_long(p, v) \
733 atomic_store_rel_32((volatile u_int *)(p), (u_int)(v))
734 #define atomic_fetchadd_long(p, v) \
735 atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v))
736 #define atomic_readandclear_long(p) \
737 atomic_readandclear_32((volatile u_int *)(p))
739 #endif /* __mips_n64 */
741 /* Operations on pointers. */
742 #define atomic_set_ptr atomic_set_long
743 #define atomic_set_acq_ptr atomic_set_acq_long
744 #define atomic_set_rel_ptr atomic_set_rel_long
745 #define atomic_clear_ptr atomic_clear_long
746 #define atomic_clear_acq_ptr atomic_clear_acq_long
747 #define atomic_clear_rel_ptr atomic_clear_rel_long
748 #define atomic_add_ptr atomic_add_long
749 #define atomic_add_acq_ptr atomic_add_acq_long
750 #define atomic_add_rel_ptr atomic_add_rel_long
751 #define atomic_subtract_ptr atomic_subtract_long
752 #define atomic_subtract_acq_ptr atomic_subtract_acq_long
753 #define atomic_subtract_rel_ptr atomic_subtract_rel_long
754 #define atomic_cmpset_ptr atomic_cmpset_long
755 #define atomic_cmpset_acq_ptr atomic_cmpset_acq_long
756 #define atomic_cmpset_rel_ptr atomic_cmpset_rel_long
757 #define atomic_fcmpset_ptr atomic_fcmpset_long
758 #define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_long
759 #define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_long
760 #define atomic_load_acq_ptr atomic_load_acq_long
761 #define atomic_store_rel_ptr atomic_store_rel_long
762 #define atomic_readandclear_ptr atomic_readandclear_long
764 static __inline unsigned int
765 atomic_swap_int(volatile unsigned int *ptr, const unsigned int value)
771 while (!atomic_fcmpset_int(ptr, &retval, value))
776 static __inline uint32_t
777 atomic_swap_32(volatile uint32_t *ptr, const uint32_t value)
783 while (!atomic_fcmpset_32(ptr, &retval, value))
788 #if defined(__mips_n64) || defined(__mips_n32)
789 static __inline uint64_t
790 atomic_swap_64(volatile uint64_t *ptr, const uint64_t value)
796 while (!atomic_fcmpset_64(ptr, &retval, value))
803 static __inline unsigned long
804 atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
806 unsigned long retval;
810 while (!atomic_fcmpset_64((volatile uint64_t *)ptr,
811 (uint64_t *)&retval, value))
816 static __inline unsigned long
817 atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
819 unsigned long retval;
823 while (!atomic_fcmpset_32((volatile uint32_t *)ptr,
824 (uint32_t *)&retval, value))
829 #define atomic_swap_ptr(ptr, value) atomic_swap_long((unsigned long *)(ptr), value)
831 #endif /* ! _MACHINE_ATOMIC_H_ */