2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 1998 Doug Rabson
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * from: src/sys/alpha/include/atomic.h,v 1.21.2.3 2005/10/06 18:12:05 jhb
32 #ifndef _MACHINE_ATOMIC_H_
33 #define _MACHINE_ATOMIC_H_
36 #error this file needs sys/cdefs.h as a prerequisite
39 #include <sys/atomic_common.h>
41 #if !defined(__mips_n64) && !defined(__mips_n32)
42 #include <sys/_atomic64e.h>
46 * Note: All the 64-bit atomic operations are only atomic when running
47 * in 64-bit mode. It is assumed that code compiled for n32 and n64
48 * fits into this definition and no further safeties are needed.
50 * It is also assumed that the add, subtract and other arithmetic is
51 * done on numbers not pointers. The special rules for n32 pointers
52 * do not have atomic operations defined for them, but generally shouldn't
53 * need atomic operations.
55 #ifndef __MIPS_PLATFORM_SYNC_NOPS
56 #define __MIPS_PLATFORM_SYNC_NOPS ""
62 __asm __volatile (".set noreorder\n"
64 __MIPS_PLATFORM_SYNC_NOPS
69 #define mb() mips_sync()
70 #define wmb() mips_sync()
71 #define rmb() mips_sync()
74 * Various simple arithmetic on memory which is atomic in the presence
75 * of interrupts and SMP safe.
78 void atomic_set_8(__volatile uint8_t *, uint8_t);
79 void atomic_clear_8(__volatile uint8_t *, uint8_t);
80 void atomic_add_8(__volatile uint8_t *, uint8_t);
81 void atomic_subtract_8(__volatile uint8_t *, uint8_t);
83 void atomic_set_16(__volatile uint16_t *, uint16_t);
84 void atomic_clear_16(__volatile uint16_t *, uint16_t);
85 void atomic_add_16(__volatile uint16_t *, uint16_t);
86 void atomic_subtract_16(__volatile uint16_t *, uint16_t);
88 static __inline int atomic_cmpset_8(__volatile uint8_t *, uint8_t, uint8_t);
89 static __inline int atomic_fcmpset_8(__volatile uint8_t *, uint8_t *, uint8_t);
90 static __inline int atomic_cmpset_16(__volatile uint16_t *, uint16_t, uint16_t);
91 static __inline int atomic_fcmpset_16(__volatile uint16_t *, uint16_t *, uint16_t);
94 atomic_set_32(__volatile uint32_t *p, uint32_t v)
99 "1:\tll %0, %3\n\t" /* load old value */
100 "or %0, %2, %0\n\t" /* calculate new value */
101 "sc %0, %1\n\t" /* attempt to store */
102 "beqz %0, 1b\n\t" /* spin if failed */
103 : "=&r" (temp), "=m" (*p)
110 atomic_clear_32(__volatile uint32_t *p, uint32_t v)
116 "1:\tll %0, %3\n\t" /* load old value */
117 "and %0, %2, %0\n\t" /* calculate new value */
118 "sc %0, %1\n\t" /* attempt to store */
119 "beqz %0, 1b\n\t" /* spin if failed */
120 : "=&r" (temp), "=m" (*p)
126 atomic_add_32(__volatile uint32_t *p, uint32_t v)
131 "1:\tll %0, %3\n\t" /* load old value */
132 "addu %0, %2, %0\n\t" /* calculate new value */
133 "sc %0, %1\n\t" /* attempt to store */
134 "beqz %0, 1b\n\t" /* spin if failed */
135 : "=&r" (temp), "=m" (*p)
141 atomic_subtract_32(__volatile uint32_t *p, uint32_t v)
146 "1:\tll %0, %3\n\t" /* load old value */
147 "subu %0, %2\n\t" /* calculate new value */
148 "sc %0, %1\n\t" /* attempt to store */
149 "beqz %0, 1b\n\t" /* spin if failed */
150 : "=&r" (temp), "=m" (*p)
155 static __inline uint32_t
156 atomic_readandclear_32(__volatile uint32_t *addr)
158 uint32_t result,temp;
161 "1:\tll %0,%3\n\t" /* load current value, asserting lock */
162 "li %1,0\n\t" /* value to store */
163 "sc %1,%2\n\t" /* attempt to store */
164 "beqz %1, 1b\n\t" /* if the store failed, spin */
165 : "=&r"(result), "=&r"(temp), "=m" (*addr)
172 static __inline uint32_t
173 atomic_readandset_32(__volatile uint32_t *addr, uint32_t value)
175 uint32_t result,temp;
178 "1:\tll %0,%3\n\t" /* load current value, asserting lock */
180 "sc %1,%2\n\t" /* attempt to store */
181 "beqz %1, 1b\n\t" /* if the store failed, spin */
182 : "=&r"(result), "=&r"(temp), "=m" (*addr)
183 : "m" (*addr), "r" (value)
189 #if defined(__mips_n64) || defined(__mips_n32)
191 atomic_set_64(__volatile uint64_t *p, uint64_t v)
197 "lld %0, %3\n\t" /* load old value */
198 "or %0, %2, %0\n\t" /* calculate new value */
199 "scd %0, %1\n\t" /* attempt to store */
200 "beqz %0, 1b\n\t" /* spin if failed */
201 : "=&r" (temp), "=m" (*p)
208 atomic_clear_64(__volatile uint64_t *p, uint64_t v)
215 "lld %0, %3\n\t" /* load old value */
216 "and %0, %2, %0\n\t" /* calculate new value */
217 "scd %0, %1\n\t" /* attempt to store */
218 "beqz %0, 1b\n\t" /* spin if failed */
219 : "=&r" (temp), "=m" (*p)
225 atomic_add_64(__volatile uint64_t *p, uint64_t v)
231 "lld %0, %3\n\t" /* load old value */
232 "daddu %0, %2, %0\n\t" /* calculate new value */
233 "scd %0, %1\n\t" /* attempt to store */
234 "beqz %0, 1b\n\t" /* spin if failed */
235 : "=&r" (temp), "=m" (*p)
241 atomic_subtract_64(__volatile uint64_t *p, uint64_t v)
247 "lld %0, %3\n\t" /* load old value */
248 "dsubu %0, %2\n\t" /* calculate new value */
249 "scd %0, %1\n\t" /* attempt to store */
250 "beqz %0, 1b\n\t" /* spin if failed */
251 : "=&r" (temp), "=m" (*p)
256 static __inline uint64_t
257 atomic_readandclear_64(__volatile uint64_t *addr)
259 uint64_t result,temp;
263 "lld %0, %3\n\t" /* load old value */
264 "li %1, 0\n\t" /* value to store */
265 "scd %1, %2\n\t" /* attempt to store */
266 "beqz %1, 1b\n\t" /* if the store failed, spin */
267 : "=&r"(result), "=&r"(temp), "=m" (*addr)
274 static __inline uint64_t
275 atomic_readandset_64(__volatile uint64_t *addr, uint64_t value)
277 uint64_t result,temp;
281 "lld %0,%3\n\t" /* Load old value*/
283 "scd %1,%2\n\t" /* attempt to store */
284 "beqz %1, 1b\n\t" /* if the store failed, spin */
285 : "=&r"(result), "=&r"(temp), "=m" (*addr)
286 : "m" (*addr), "r" (value)
293 #define ATOMIC_ACQ_REL(NAME, WIDTH) \
294 static __inline void \
295 atomic_##NAME##_acq_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
297 atomic_##NAME##_##WIDTH(p, v); \
301 static __inline void \
302 atomic_##NAME##_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
305 atomic_##NAME##_##WIDTH(p, v); \
308 /* Variants of simple arithmetic with memory barriers. */
309 ATOMIC_ACQ_REL(set, 8)
310 ATOMIC_ACQ_REL(clear, 8)
311 ATOMIC_ACQ_REL(add, 8)
312 ATOMIC_ACQ_REL(subtract, 8)
313 ATOMIC_ACQ_REL(set, 16)
314 ATOMIC_ACQ_REL(clear, 16)
315 ATOMIC_ACQ_REL(add, 16)
316 ATOMIC_ACQ_REL(subtract, 16)
317 ATOMIC_ACQ_REL(set, 32)
318 ATOMIC_ACQ_REL(clear, 32)
319 ATOMIC_ACQ_REL(add, 32)
320 ATOMIC_ACQ_REL(subtract, 32)
321 #if defined(__mips_n64) || defined(__mips_n32)
322 ATOMIC_ACQ_REL(set, 64)
323 ATOMIC_ACQ_REL(clear, 64)
324 ATOMIC_ACQ_REL(add, 64)
325 ATOMIC_ACQ_REL(subtract, 64)
328 #undef ATOMIC_ACQ_REL
331 * We assume that a = b will do atomic loads and stores.
333 #define ATOMIC_STORE_LOAD(WIDTH) \
334 static __inline uint##WIDTH##_t \
335 atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p) \
344 static __inline void \
345 atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
351 ATOMIC_STORE_LOAD(32)
352 #if defined(__mips_n64) || defined(__mips_n32)
353 ATOMIC_STORE_LOAD(64)
355 #undef ATOMIC_STORE_LOAD
358 * MIPS n32 is not a LP64 API, so atomic_load_64 isn't defined there. Define it
359 * here since n32 is an oddball !LP64 but that can do 64-bit atomics.
361 #if defined(__mips_n32)
362 #define atomic_load_64 atomic_load_acq_64
366 * Atomically compare the value stored at *p with cmpval and if the
367 * two values are equal, update the value of *p with newval. Returns
368 * zero if the compare failed, nonzero otherwise.
371 atomic_cmpset_32(__volatile uint32_t *p, uint32_t cmpval, uint32_t newval)
376 "1:\tll %0, %4\n\t" /* load old value */
377 "bne %0, %2, 2f\n\t" /* compare */
378 "move %0, %3\n\t" /* value to store */
379 "sc %0, %1\n\t" /* attempt to store */
380 "beqz %0, 1b\n\t" /* if it failed, spin */
385 : "=&r" (ret), "=m" (*p)
386 : "r" (cmpval), "r" (newval), "m" (*p)
393 * Atomically compare the value stored at *p with cmpval and if the
394 * two values are equal, update the value of *p with newval. Returns
395 * zero if the compare failed, nonzero otherwise.
398 atomic_fcmpset_32(__volatile uint32_t *p, uint32_t *cmpval, uint32_t newval)
403 * The following sequence (similar to that in atomic_fcmpset_64) will
404 * attempt to update the value of *p with newval if the comparison
405 * succeeds. Note that they'll exit regardless of whether the store
406 * actually succeeded, leaving *cmpval untouched. This is in line with
407 * the documentation of atomic_fcmpset_<type>() in atomic(9) for ll/sc
411 "ll %0, %1\n\t" /* load old value */
412 "bne %0, %4, 1f\n\t" /* compare */
413 "move %0, %3\n\t" /* value to store */
414 "sc %0, %1\n\t" /* attempt to store */
415 "j 2f\n\t" /* exit regardless of success */
416 "nop\n\t" /* avoid delay slot accident */
418 "sw %0, %2\n\t" /* save old value */
421 : "=&r" (ret), "+m" (*p), "=m" (*cmpval)
422 : "r" (newval), "r" (*cmpval)
427 #define ATOMIC_CMPSET_ACQ_REL(WIDTH) \
428 static __inline int \
429 atomic_cmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p, \
430 uint##WIDTH##_t cmpval, uint##WIDTH##_t newval) \
434 retval = atomic_cmpset_##WIDTH(p, cmpval, newval); \
439 static __inline int \
440 atomic_cmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p, \
441 uint##WIDTH##_t cmpval, uint##WIDTH##_t newval) \
444 return (atomic_cmpset_##WIDTH(p, cmpval, newval)); \
447 #define ATOMIC_FCMPSET_ACQ_REL(WIDTH) \
448 static __inline int \
449 atomic_fcmpset_acq_##WIDTH(__volatile uint##WIDTH##_t *p, \
450 uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval) \
454 retval = atomic_fcmpset_##WIDTH(p, cmpval, newval); \
459 static __inline int \
460 atomic_fcmpset_rel_##WIDTH(__volatile uint##WIDTH##_t *p, \
461 uint##WIDTH##_t *cmpval, uint##WIDTH##_t newval) \
464 return (atomic_fcmpset_##WIDTH(p, cmpval, newval)); \
468 * Atomically compare the value stored at *p with cmpval and if the
469 * two values are equal, update the value of *p with newval. Returns
470 * zero if the compare failed, nonzero otherwise.
472 ATOMIC_CMPSET_ACQ_REL(8);
473 ATOMIC_CMPSET_ACQ_REL(16);
474 ATOMIC_CMPSET_ACQ_REL(32);
475 ATOMIC_FCMPSET_ACQ_REL(8);
476 ATOMIC_FCMPSET_ACQ_REL(16);
477 ATOMIC_FCMPSET_ACQ_REL(32);
480 * Atomically add the value of v to the integer pointed to by p and return
481 * the previous value of *p.
483 static __inline uint32_t
484 atomic_fetchadd_32(__volatile uint32_t *p, uint32_t v)
486 uint32_t value, temp;
489 "1:\tll %0, %1\n\t" /* load old value */
490 "addu %2, %3, %0\n\t" /* calculate new value */
491 "sc %2, %1\n\t" /* attempt to store */
492 "beqz %2, 1b\n\t" /* spin if failed */
493 : "=&r" (value), "=m" (*p), "=&r" (temp)
494 : "r" (v), "m" (*p));
498 #if defined(__mips_n64) || defined(__mips_n32)
500 * Atomically compare the value stored at *p with cmpval and if the
501 * two values are equal, update the value of *p with newval. Returns
502 * zero if the compare failed, nonzero otherwise.
505 atomic_cmpset_64(__volatile uint64_t *p, uint64_t cmpval, uint64_t newval)
511 "lld %0, %4\n\t" /* load old value */
512 "bne %0, %2, 2f\n\t" /* compare */
513 "move %0, %3\n\t" /* value to store */
514 "scd %0, %1\n\t" /* attempt to store */
515 "beqz %0, 1b\n\t" /* if it failed, spin */
520 : "=&r" (ret), "=m" (*p)
521 : "r" (cmpval), "r" (newval), "m" (*p)
528 atomic_fcmpset_64(__volatile uint64_t *p, uint64_t *cmpval, uint64_t newval)
533 "lld %0, %1\n\t" /* load old value */
534 "bne %0, %4, 1f\n\t" /* compare */
535 "move %0, %3\n\t" /* value to store */
536 "scd %0, %1\n\t" /* attempt to store */
537 "j 2f\n\t" /* exit regardless of success */
538 "nop\n\t" /* avoid delay slot accident */
540 "sd %0, %2\n\t" /* save old value */
543 : "=&r" (ret), "+m" (*p), "=m" (*cmpval)
544 : "r" (newval), "r" (*cmpval)
551 * Atomically compare the value stored at *p with cmpval and if the
552 * two values are equal, update the value of *p with newval. Returns
553 * zero if the compare failed, nonzero otherwise.
555 ATOMIC_CMPSET_ACQ_REL(64);
556 ATOMIC_FCMPSET_ACQ_REL(64);
559 * Atomically add the value of v to the integer pointed to by p and return
560 * the previous value of *p.
562 static __inline uint64_t
563 atomic_fetchadd_64(__volatile uint64_t *p, uint64_t v)
565 uint64_t value, temp;
569 "lld %0, %1\n\t" /* load old value */
570 "daddu %2, %3, %0\n\t" /* calculate new value */
571 "scd %2, %1\n\t" /* attempt to store */
572 "beqz %2, 1b\n\t" /* spin if failed */
573 : "=&r" (value), "=m" (*p), "=&r" (temp)
574 : "r" (v), "m" (*p));
580 atomic_thread_fence_acq(void)
587 atomic_thread_fence_rel(void)
594 atomic_thread_fence_acq_rel(void)
601 atomic_thread_fence_seq_cst(void)
607 /* Operations on chars. */
608 #define atomic_set_char atomic_set_8
609 #define atomic_set_acq_char atomic_set_acq_8
610 #define atomic_set_rel_char atomic_set_rel_8
611 #define atomic_clear_char atomic_clear_8
612 #define atomic_clear_acq_char atomic_clear_acq_8
613 #define atomic_clear_rel_char atomic_clear_rel_8
614 #define atomic_add_char atomic_add_8
615 #define atomic_add_acq_char atomic_add_acq_8
616 #define atomic_add_rel_char atomic_add_rel_8
617 #define atomic_subtract_char atomic_subtract_8
618 #define atomic_subtract_acq_char atomic_subtract_acq_8
619 #define atomic_subtract_rel_char atomic_subtract_rel_8
620 #define atomic_cmpset_char atomic_cmpset_8
621 #define atomic_cmpset_acq_char atomic_cmpset_acq_8
622 #define atomic_cmpset_rel_char atomic_cmpset_rel_8
623 #define atomic_fcmpset_char atomic_fcmpset_8
624 #define atomic_fcmpset_acq_char atomic_fcmpset_acq_8
625 #define atomic_fcmpset_rel_char atomic_fcmpset_rel_8
627 /* Operations on shorts. */
628 #define atomic_set_short atomic_set_16
629 #define atomic_set_acq_short atomic_set_acq_16
630 #define atomic_set_rel_short atomic_set_rel_16
631 #define atomic_clear_short atomic_clear_16
632 #define atomic_clear_acq_short atomic_clear_acq_16
633 #define atomic_clear_rel_short atomic_clear_rel_16
634 #define atomic_add_short atomic_add_16
635 #define atomic_add_acq_short atomic_add_acq_16
636 #define atomic_add_rel_short atomic_add_rel_16
637 #define atomic_subtract_short atomic_subtract_16
638 #define atomic_subtract_acq_short atomic_subtract_acq_16
639 #define atomic_subtract_rel_short atomic_subtract_rel_16
640 #define atomic_cmpset_short atomic_cmpset_16
641 #define atomic_cmpset_acq_short atomic_cmpset_acq_16
642 #define atomic_cmpset_rel_short atomic_cmpset_rel_16
643 #define atomic_fcmpset_short atomic_fcmpset_16
644 #define atomic_fcmpset_acq_short atomic_fcmpset_acq_16
645 #define atomic_fcmpset_rel_short atomic_fcmpset_rel_16
647 /* Operations on ints. */
648 #define atomic_set_int atomic_set_32
649 #define atomic_set_acq_int atomic_set_acq_32
650 #define atomic_set_rel_int atomic_set_rel_32
651 #define atomic_clear_int atomic_clear_32
652 #define atomic_clear_acq_int atomic_clear_acq_32
653 #define atomic_clear_rel_int atomic_clear_rel_32
654 #define atomic_add_int atomic_add_32
655 #define atomic_add_acq_int atomic_add_acq_32
656 #define atomic_add_rel_int atomic_add_rel_32
657 #define atomic_subtract_int atomic_subtract_32
658 #define atomic_subtract_acq_int atomic_subtract_acq_32
659 #define atomic_subtract_rel_int atomic_subtract_rel_32
660 #define atomic_cmpset_int atomic_cmpset_32
661 #define atomic_cmpset_acq_int atomic_cmpset_acq_32
662 #define atomic_cmpset_rel_int atomic_cmpset_rel_32
663 #define atomic_fcmpset_int atomic_fcmpset_32
664 #define atomic_fcmpset_acq_int atomic_fcmpset_acq_32
665 #define atomic_fcmpset_rel_int atomic_fcmpset_rel_32
666 #define atomic_load_acq_int atomic_load_acq_32
667 #define atomic_store_rel_int atomic_store_rel_32
668 #define atomic_readandclear_int atomic_readandclear_32
669 #define atomic_readandset_int atomic_readandset_32
670 #define atomic_fetchadd_int atomic_fetchadd_32
673 * I think the following is right, even for n32. For n32 the pointers
674 * are still 32-bits, so we need to operate on them as 32-bit quantities,
675 * even though they are sign extended in operation. For longs, there's
676 * no question because they are always 32-bits.
679 /* Operations on longs. */
680 #define atomic_set_long atomic_set_64
681 #define atomic_set_acq_long atomic_set_acq_64
682 #define atomic_set_rel_long atomic_set_rel_64
683 #define atomic_clear_long atomic_clear_64
684 #define atomic_clear_acq_long atomic_clear_acq_64
685 #define atomic_clear_rel_long atomic_clear_rel_64
686 #define atomic_add_long atomic_add_64
687 #define atomic_add_acq_long atomic_add_acq_64
688 #define atomic_add_rel_long atomic_add_rel_64
689 #define atomic_subtract_long atomic_subtract_64
690 #define atomic_subtract_acq_long atomic_subtract_acq_64
691 #define atomic_subtract_rel_long atomic_subtract_rel_64
692 #define atomic_cmpset_long atomic_cmpset_64
693 #define atomic_cmpset_acq_long atomic_cmpset_acq_64
694 #define atomic_cmpset_rel_long atomic_cmpset_rel_64
695 #define atomic_fcmpset_long atomic_fcmpset_64
696 #define atomic_fcmpset_acq_long atomic_fcmpset_acq_64
697 #define atomic_fcmpset_rel_long atomic_fcmpset_rel_64
698 #define atomic_load_acq_long atomic_load_acq_64
699 #define atomic_store_rel_long atomic_store_rel_64
700 #define atomic_fetchadd_long atomic_fetchadd_64
701 #define atomic_readandclear_long atomic_readandclear_64
703 #else /* !__mips_n64 */
705 /* Operations on longs. */
706 #define atomic_set_long(p, v) \
707 atomic_set_32((volatile u_int *)(p), (u_int)(v))
708 #define atomic_set_acq_long(p, v) \
709 atomic_set_acq_32((volatile u_int *)(p), (u_int)(v))
710 #define atomic_set_rel_long(p, v) \
711 atomic_set_rel_32((volatile u_int *)(p), (u_int)(v))
712 #define atomic_clear_long(p, v) \
713 atomic_clear_32((volatile u_int *)(p), (u_int)(v))
714 #define atomic_clear_acq_long(p, v) \
715 atomic_clear_acq_32((volatile u_int *)(p), (u_int)(v))
716 #define atomic_clear_rel_long(p, v) \
717 atomic_clear_rel_32((volatile u_int *)(p), (u_int)(v))
718 #define atomic_add_long(p, v) \
719 atomic_add_32((volatile u_int *)(p), (u_int)(v))
720 #define atomic_add_acq_long(p, v) \
721 atomic_add_32((volatile u_int *)(p), (u_int)(v))
722 #define atomic_add_rel_long(p, v) \
723 atomic_add_32((volatile u_int *)(p), (u_int)(v))
724 #define atomic_subtract_long(p, v) \
725 atomic_subtract_32((volatile u_int *)(p), (u_int)(v))
726 #define atomic_subtract_acq_long(p, v) \
727 atomic_subtract_acq_32((volatile u_int *)(p), (u_int)(v))
728 #define atomic_subtract_rel_long(p, v) \
729 atomic_subtract_rel_32((volatile u_int *)(p), (u_int)(v))
730 #define atomic_cmpset_long(p, cmpval, newval) \
731 atomic_cmpset_32((volatile u_int *)(p), (u_int)(cmpval), \
733 #define atomic_cmpset_acq_long(p, cmpval, newval) \
734 atomic_cmpset_acq_32((volatile u_int *)(p), (u_int)(cmpval), \
736 #define atomic_cmpset_rel_long(p, cmpval, newval) \
737 atomic_cmpset_rel_32((volatile u_int *)(p), (u_int)(cmpval), \
739 #define atomic_fcmpset_long(p, cmpval, newval) \
740 atomic_fcmpset_32((volatile u_int *)(p), (u_int *)(cmpval), \
742 #define atomic_fcmpset_acq_long(p, cmpval, newval) \
743 atomic_fcmpset_acq_32((volatile u_int *)(p), (u_int *)(cmpval), \
745 #define atomic_fcmpset_rel_long(p, cmpval, newval) \
746 atomic_fcmpset_rel_32((volatile u_int *)(p), (u_int *)(cmpval), \
748 #define atomic_load_acq_long(p) \
749 (u_long)atomic_load_acq_32((volatile u_int *)(p))
750 #define atomic_store_rel_long(p, v) \
751 atomic_store_rel_32((volatile u_int *)(p), (u_int)(v))
752 #define atomic_fetchadd_long(p, v) \
753 atomic_fetchadd_32((volatile u_int *)(p), (u_int)(v))
754 #define atomic_readandclear_long(p) \
755 atomic_readandclear_32((volatile u_int *)(p))
757 #endif /* __mips_n64 */
759 /* Operations on pointers. */
760 #define atomic_set_ptr atomic_set_long
761 #define atomic_set_acq_ptr atomic_set_acq_long
762 #define atomic_set_rel_ptr atomic_set_rel_long
763 #define atomic_clear_ptr atomic_clear_long
764 #define atomic_clear_acq_ptr atomic_clear_acq_long
765 #define atomic_clear_rel_ptr atomic_clear_rel_long
766 #define atomic_add_ptr atomic_add_long
767 #define atomic_add_acq_ptr atomic_add_acq_long
768 #define atomic_add_rel_ptr atomic_add_rel_long
769 #define atomic_subtract_ptr atomic_subtract_long
770 #define atomic_subtract_acq_ptr atomic_subtract_acq_long
771 #define atomic_subtract_rel_ptr atomic_subtract_rel_long
772 #define atomic_cmpset_ptr atomic_cmpset_long
773 #define atomic_cmpset_acq_ptr atomic_cmpset_acq_long
774 #define atomic_cmpset_rel_ptr atomic_cmpset_rel_long
775 #define atomic_fcmpset_ptr atomic_fcmpset_long
776 #define atomic_fcmpset_acq_ptr atomic_fcmpset_acq_long
777 #define atomic_fcmpset_rel_ptr atomic_fcmpset_rel_long
778 #define atomic_load_acq_ptr atomic_load_acq_long
779 #define atomic_store_rel_ptr atomic_store_rel_long
780 #define atomic_readandclear_ptr atomic_readandclear_long
782 static __inline unsigned int
783 atomic_swap_int(volatile unsigned int *ptr, const unsigned int value)
789 while (!atomic_fcmpset_int(ptr, &retval, value))
794 static __inline uint32_t
795 atomic_swap_32(volatile uint32_t *ptr, const uint32_t value)
801 while (!atomic_fcmpset_32(ptr, &retval, value))
806 #if defined(__mips_n64) || defined(__mips_n32)
807 static __inline uint64_t
808 atomic_swap_64(volatile uint64_t *ptr, const uint64_t value)
814 while (!atomic_fcmpset_64(ptr, &retval, value))
821 static __inline unsigned long
822 atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
824 unsigned long retval;
828 while (!atomic_fcmpset_64((volatile uint64_t *)ptr,
829 (uint64_t *)&retval, value))
834 static __inline unsigned long
835 atomic_swap_long(volatile unsigned long *ptr, const unsigned long value)
837 unsigned long retval;
841 while (!atomic_fcmpset_32((volatile uint32_t *)ptr,
842 (uint32_t *)&retval, value))
847 #define atomic_swap_ptr(ptr, value) atomic_swap_long((unsigned long *)(ptr), value)
849 #include <sys/_atomic_subword.h>
851 #endif /* ! _MACHINE_ATOMIC_H_ */