2 * Copyright (c) 2015 Alexander Kabaev
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
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9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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29 #include <machine/asm.h>
30 #include <machine/cpu.h>
31 #include <machine/cpuregs.h>
32 #include <machine/cache_r4k.h>
36 #define CACHE_SIZE (32 * 1024)
37 #define CACHE_LINESIZE 32
42 .section .text.mpentry_jz4780
45 GLOBAL(jz4780_mpentry)
47 /* Initialize caches */
48 li t0, MIPS_KSEG0_START
49 ori t1, t0, CACHE_SIZE
50 mtc0 zero, MIPS_COP_0_TAG_LO
52 1: cache CACHEOP_R4K_INDEX_STORE_TAG | CACHE_R4K_I, 0(t0)
53 cache CACHEOP_R4K_INDEX_STORE_TAG | CACHE_R4K_D, 0(t0)
55 addiu t0, t0, CACHE_LINESIZE
57 /* Set TLB page mask */
58 mtc0 zero, MIPS_COP_0_TLB_PG_MASK