1 /* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
3 * $Id: bus.h,v 1.6 2007/08/09 11:23:32 katta Exp $
5 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
10 * NASA Ames Research Center.
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
42 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
43 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions and the following disclaimer.
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
53 * 3. All advertising materials mentioning features or use of this software
54 * must display the following acknowledgement:
55 * This product includes software developed by Christopher G. Demetriou
56 * for the NetBSD Project.
57 * 4. The name of the author may not be used to endorse or promote products
58 * derived from this software without specific prior written permission
60 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
61 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
62 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
63 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
64 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
65 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
66 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
67 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
68 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
69 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
71 * from: src/sys/alpha/include/bus.h,v 1.5 1999/08/28 00:38:40 peter
74 #include <sys/cdefs.h>
75 __FBSDID("$FreeBSD$");
77 #include <sys/param.h>
78 #include <sys/systm.h>
80 #include <sys/endian.h>
81 #include <sys/kernel.h>
82 #include <sys/malloc.h>
87 #include <vm/vm_kern.h>
88 #include <vm/vm_extern.h>
90 #include <machine/bus.h>
91 #include <machine/cache.h>
92 #include <mips/malta/gt_pci_bus_space.h>
94 static bs_r_2_proto(gt_pci);
95 static bs_r_4_proto(gt_pci);
96 static bs_w_2_proto(gt_pci);
97 static bs_w_4_proto(gt_pci);
98 static bs_rm_2_proto(gt_pci);
99 static bs_rm_4_proto(gt_pci);
100 static bs_wm_2_proto(gt_pci);
101 static bs_wm_4_proto(gt_pci);
102 static bs_rr_2_proto(gt_pci);
103 static bs_rr_4_proto(gt_pci);
104 static bs_wr_2_proto(gt_pci);
105 static bs_wr_4_proto(gt_pci);
106 static bs_sm_2_proto(gt_pci);
107 static bs_sm_4_proto(gt_pci);
108 static bs_sr_2_proto(gt_pci);
109 static bs_sr_4_proto(gt_pci);
111 static struct bus_space gt_pci_space = {
113 .bs_cookie = (void *) 0,
115 /* mapping/unmapping */
116 .bs_map = generic_bs_map,
117 .bs_unmap = generic_bs_unmap,
118 .bs_subregion = generic_bs_subregion,
120 /* allocation/deallocation */
121 .bs_alloc = generic_bs_alloc,
122 .bs_free = generic_bs_free,
125 .bs_barrier = generic_bs_barrier,
128 .bs_r_1 = generic_bs_r_1,
129 .bs_r_2 = gt_pci_bs_r_2,
130 .bs_r_4 = gt_pci_bs_r_4,
134 .bs_rm_1 = generic_bs_rm_1,
135 .bs_rm_2 = gt_pci_bs_rm_2,
136 .bs_rm_4 = gt_pci_bs_rm_4,
140 .bs_rr_1 = generic_bs_rr_1,
141 .bs_rr_2 = gt_pci_bs_rr_2,
142 .bs_rr_4 = gt_pci_bs_rr_4,
146 .bs_w_1 = generic_bs_w_1,
147 .bs_w_2 = gt_pci_bs_w_2,
148 .bs_w_4 = gt_pci_bs_w_4,
152 .bs_wm_1 = generic_bs_wm_1,
153 .bs_wm_2 = gt_pci_bs_wm_2,
154 .bs_wm_4 = gt_pci_bs_wm_4,
158 .bs_wr_1 = generic_bs_wr_1,
159 .bs_wr_2 = gt_pci_bs_wr_2,
160 .bs_wr_4 = gt_pci_bs_wr_4,
164 .bs_sm_1 = generic_bs_sm_1,
165 .bs_sm_2 = gt_pci_bs_sm_2,
166 .bs_sm_4 = gt_pci_bs_sm_4,
170 .bs_sr_1 = generic_bs_sr_1,
171 .bs_sr_2 = gt_pci_bs_sr_2,
172 .bs_sr_4 = gt_pci_bs_sr_4,
176 .bs_c_1 = generic_bs_c_1,
177 .bs_c_2 = generic_bs_c_2,
178 .bs_c_4 = generic_bs_c_4,
181 /* read (single) stream */
182 .bs_r_1_s = generic_bs_r_1,
183 .bs_r_2_s = generic_bs_r_2,
184 .bs_r_4_s = generic_bs_r_4,
187 /* read multiple stream */
188 .bs_rm_1_s = generic_bs_rm_1,
189 .bs_rm_2_s = generic_bs_rm_2,
190 .bs_rm_4_s = generic_bs_rm_4,
193 /* read region stream */
194 .bs_rr_1_s = generic_bs_rr_1,
195 .bs_rr_2_s = generic_bs_rr_2,
196 .bs_rr_4_s = generic_bs_rr_4,
199 /* write (single) stream */
200 .bs_w_1_s = generic_bs_w_1,
201 .bs_w_2_s = generic_bs_w_2,
202 .bs_w_4_s = generic_bs_w_4,
205 /* write multiple stream */
206 .bs_wm_1_s = generic_bs_wm_1,
207 .bs_wm_2_s = generic_bs_wm_2,
208 .bs_wm_4_s = generic_bs_wm_4,
211 /* write region stream */
212 .bs_wr_1_s = generic_bs_wr_1,
213 .bs_wr_2_s = generic_bs_wr_2,
214 .bs_wr_4_s = generic_bs_wr_4,
218 #define rd16(a) le16toh(readw(a))
219 #define rd32(a) le32toh(readl(a))
220 #define wr16(a, v) writew(a, htole16(v))
221 #define wr32(a, v) writel(a, htole32(v))
223 /* generic bus_space tag */
224 bus_space_tag_t gt_pci_bus_space = >_pci_space;
227 gt_pci_bs_r_2(void *t, bus_space_handle_t handle,
231 return (rd16(handle + offset));
235 gt_pci_bs_r_4(void *t, bus_space_handle_t handle,
239 return (rd32(handle + offset));
243 gt_pci_bs_rm_2(void *t, bus_space_handle_t bsh,
244 bus_size_t offset, uint16_t *addr, size_t count)
246 bus_addr_t baddr = bsh + offset;
249 *addr++ = rd16(baddr);
253 gt_pci_bs_rm_4(void *t, bus_space_handle_t bsh,
254 bus_size_t offset, uint32_t *addr, size_t count)
256 bus_addr_t baddr = bsh + offset;
259 *addr++ = rd32(baddr);
263 * Read `count' 2 or 4 byte quantities from bus space
264 * described by tag/handle and starting at `offset' and copy into
268 gt_pci_bs_rr_2(void *t, bus_space_handle_t bsh,
269 bus_size_t offset, uint16_t *addr, size_t count)
271 bus_addr_t baddr = bsh + offset;
274 *addr++ = rd16(baddr);
280 gt_pci_bs_rr_4(void *t, bus_space_handle_t bsh,
281 bus_size_t offset, uint32_t *addr, size_t count)
283 bus_addr_t baddr = bsh + offset;
286 *addr++ = rd32(baddr);
292 * Write the 2 or 4 byte value `value' to bus space
293 * described by tag/handle/offset.
296 gt_pci_bs_w_2(void *t, bus_space_handle_t bsh,
297 bus_size_t offset, uint16_t value)
300 wr16(bsh + offset, value);
304 gt_pci_bs_w_4(void *t, bus_space_handle_t bsh,
305 bus_size_t offset, uint32_t value)
308 wr32(bsh + offset, value);
312 * Write `count' 2 or 4 byte quantities from the buffer
313 * provided to bus space described by tag/handle/offset.
316 gt_pci_bs_wm_2(void *t, bus_space_handle_t bsh,
317 bus_size_t offset, const uint16_t *addr, size_t count)
319 bus_addr_t baddr = bsh + offset;
322 wr16(baddr, *addr++);
326 gt_pci_bs_wm_4(void *t, bus_space_handle_t bsh,
327 bus_size_t offset, const uint32_t *addr, size_t count)
329 bus_addr_t baddr = bsh + offset;
332 wr32(baddr, *addr++);
336 * Write `count' 2 or 4 byte quantities from the buffer provided
337 * to bus space described by tag/handle starting at `offset'.
340 gt_pci_bs_wr_2(void *t, bus_space_handle_t bsh,
341 bus_size_t offset, const uint16_t *addr, size_t count)
343 bus_addr_t baddr = bsh + offset;
346 wr16(baddr, *addr++);
352 gt_pci_bs_wr_4(void *t, bus_space_handle_t bsh,
353 bus_size_t offset, const uint32_t *addr, size_t count)
355 bus_addr_t baddr = bsh + offset;
358 wr32(baddr, *addr++);
364 * Write the 2 or 4 byte value `val' to bus space described
365 * by tag/handle/offset `count' times.
368 gt_pci_bs_sm_2(void *t, bus_space_handle_t bsh,
369 bus_size_t offset, uint16_t value, size_t count)
371 bus_addr_t addr = bsh + offset;
378 gt_pci_bs_sm_4(void *t, bus_space_handle_t bsh,
379 bus_size_t offset, uint32_t value, size_t count)
381 bus_addr_t addr = bsh + offset;
388 * Write `count' 2 or 4 byte value `val' to bus space described
389 * by tag/handle starting at `offset'.
392 gt_pci_bs_sr_2(void *t, bus_space_handle_t bsh,
393 bus_size_t offset, uint16_t value, size_t count)
395 bus_addr_t addr = bsh + offset;
397 for (; count != 0; count--, addr += 2)
402 gt_pci_bs_sr_4(void *t, bus_space_handle_t bsh,
403 bus_size_t offset, uint32_t value, size_t count)
405 bus_addr_t addr = bsh + offset;
407 for (; count != 0; count--, addr += 4)