2 * Copyright 2016 Stanislav Galabov
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_platform.h"
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
39 #include <sys/mutex.h>
41 #include <sys/resource.h>
44 #include <machine/bus.h>
45 #include <machine/intr.h>
47 #include <mips/mediatek/mtk_soc.h>
49 #include <dev/gpio/gpiobusvar.h>
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
55 #include <gnu/dts/include/dt-bindings/interrupt-controller/irq.h>
60 #define MTK_GPIO_PINS 32
76 struct mtk_gpio_pin_irqsrc {
77 struct intr_irqsrc isrc;
84 enum intr_trigger intr_trigger;
85 enum intr_polarity intr_polarity;
86 char pin_name[GPIOMAXNAME];
87 struct mtk_gpio_pin_irqsrc pin_irqsrc;
90 struct mtk_gpio_softc {
93 struct resource *res[2];
95 struct mtk_gpio_pin pins[MTK_GPIO_PINS];
98 uint8_t regs[GPIO_PIOMAX];
103 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc)
105 static struct resource_spec mtk_gpio_spec[] = {
106 { SYS_RES_MEMORY, 0, RF_ACTIVE },
107 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
111 static int mtk_gpio_probe(device_t dev);
112 static int mtk_gpio_attach(device_t dev);
113 static int mtk_gpio_detach(device_t dev);
114 static int mtk_gpio_intr(void *arg);
116 #define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
117 #define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
118 #define MTK_GPIO_LOCK_INIT(sc) \
119 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
120 "mtk_gpio", MTX_SPIN)
121 #define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
123 #define MTK_WRITE_4(sc, reg, val) \
124 bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val))
125 #define MTK_READ_4(sc, reg) \
126 bus_read_4((sc)->res[0], (sc)->regs[(reg)])
128 static struct ofw_compat_data compat_data[] = {
129 { "ralink,rt2880-gpio", 1 },
130 { "ralink,rt3050-gpio", 1 },
131 { "ralink,rt3352-gpio", 1 },
132 { "ralink,rt3883-gpio", 1 },
133 { "ralink,rt5350-gpio", 1 },
134 { "ralink,mt7620a-gpio", 1 },
139 mtk_gpio_probe(device_t dev)
143 if (!ofw_bus_status_okay(dev))
146 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
149 node = ofw_bus_get_node(dev);
150 if (!OF_hasprop(node, "gpio-controller"))
153 device_set_desc(dev, "MTK GPIO Controller (v1)");
155 return (BUS_PROBE_DEFAULT);
159 mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
163 struct intr_irqsrc *isrc;
166 name = device_get_nameunit(sc->dev);
167 for (irq = 0; irq < sc->num_pins; irq++) {
168 sc->pins[irq].pin_irqsrc.irq = irq;
169 isrc = PIC_INTR_ISRC(sc, irq);
170 error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
172 /* XXX call intr_isrc_deregister */
173 device_printf(sc->dev, "%s failed", __func__);
182 mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
185 uint32_t regval, mask = (1u << pin);
187 if (!(sc->pins[pin].pin_caps & dir))
190 regval = MTK_READ_4(sc, GPIO_PIODIR);
191 if (dir == GPIO_PIN_INPUT)
195 MTK_WRITE_4(sc, GPIO_PIODIR, regval);
197 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
198 sc->pins[pin].pin_flags |= dir;
204 mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
206 uint32_t regval, mask = (1u << pin);
208 regval = MTK_READ_4(sc, GPIO_PIOPOL);
213 MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
214 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
215 sc->pins[pin].pin_flags |= val;
221 mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
223 uint32_t mask = (1u << pin);
226 /* Clear cached gpio config */
227 sc->pins[pin].pin_flags = 0;
229 val = MTK_READ_4(sc, GPIO_PIORENA) |
230 MTK_READ_4(sc, GPIO_PIOFENA);
232 /* Pin is in interrupt mode */
233 sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
234 val = MTK_READ_4(sc, GPIO_PIORENA);
236 sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
238 sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
241 val = MTK_READ_4(sc, GPIO_PIODIR);
243 sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
245 sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
247 val = MTK_READ_4(sc, GPIO_PIOPOL);
249 if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
250 sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
252 sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
258 mtk_gpio_attach(device_t dev)
260 struct mtk_gpio_softc *sc;
262 uint32_t i, num_pins;
264 sc = device_get_softc(dev);
267 if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
268 device_printf(dev, "could not allocate resources for device\n");
272 MTK_GPIO_LOCK_INIT(sc);
274 node = ofw_bus_get_node(dev);
276 if (OF_hasprop(node, "clocks"))
277 mtk_soc_start_clock(dev);
278 if (OF_hasprop(node, "resets"))
279 mtk_soc_reset_device(dev);
281 if (OF_getprop(node, "ralink,register-map", sc->regs,
283 device_printf(dev, "Failed to read register map\n");
287 if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
288 "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
289 sc->num_pins = num_pins;
291 sc->num_pins = MTK_GPIO_PINS;
293 for (i = 0; i < sc->num_pins; i++) {
294 sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
295 GPIO_PIN_INVIN | GPIO_PIN_INVOUT |
296 GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING;
297 sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
298 sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
300 snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
301 device_get_unit(dev) + 'a', i);
302 sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
304 mtk_gpio_pin_probe(sc, i);
307 if (mtk_pic_register_isrcs(sc) != 0) {
308 device_printf(dev, "could not register PIC ISRCs\n");
312 if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
313 device_printf(dev, "could not register PIC\n");
317 if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
318 mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
321 sc->busdev = gpiobus_attach_bus(dev);
322 if (sc->busdev == NULL)
327 intr_pic_deregister(dev, OF_xref_from_node(node));
329 if(sc->intrhand != NULL)
330 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
331 bus_release_resources(dev, mtk_gpio_spec, sc->res);
332 MTK_GPIO_LOCK_DESTROY(sc);
337 mtk_gpio_detach(device_t dev)
339 struct mtk_gpio_softc *sc = device_get_softc(dev);
342 node = ofw_bus_get_node(dev);
343 intr_pic_deregister(dev, OF_xref_from_node(node));
344 if (sc->intrhand != NULL)
345 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
346 bus_release_resources(dev, mtk_gpio_spec, sc->res);
347 MTK_GPIO_LOCK_DESTROY(sc);
352 mtk_gpio_get_bus(device_t dev)
354 struct mtk_gpio_softc *sc = device_get_softc(dev);
360 mtk_gpio_pin_max(device_t dev, int *maxpin)
362 struct mtk_gpio_softc *sc = device_get_softc(dev);
364 *maxpin = sc->num_pins - 1;
370 mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
372 struct mtk_gpio_softc *sc = device_get_softc(dev);
374 if (pin >= sc->num_pins)
378 *caps = sc->pins[pin].pin_caps;
385 mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
387 struct mtk_gpio_softc *sc = device_get_softc(dev);
389 if (pin >= sc->num_pins)
393 *flags = sc->pins[pin].pin_flags;
400 mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
402 struct mtk_gpio_softc *sc = device_get_softc(dev);
404 if (pin >= sc->num_pins)
407 strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
408 name[GPIOMAXNAME - 1] = '\0';
414 mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
416 struct mtk_gpio_softc *sc;
419 sc = device_get_softc(dev);
421 if (pin >= sc->num_pins)
425 retval = mtk_gpio_pin_set_direction(sc, pin,
426 flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
428 retval = mtk_gpio_pin_set_invert(sc, pin,
429 flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
436 mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
438 struct mtk_gpio_softc *sc;
441 sc = device_get_softc(dev);
444 if (pin >= sc->num_pins)
449 MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin));
451 MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin));
458 mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
460 struct mtk_gpio_softc *sc;
464 sc = device_get_softc(dev);
467 if (pin >= sc->num_pins)
471 data = MTK_READ_4(sc, GPIO_PIODATA);
472 *val = (data & (1u << pin)) ? 1 : 0;
479 mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
481 struct mtk_gpio_softc *sc;
484 sc = device_get_softc(dev);
487 if (pin >= sc->num_pins)
491 if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
495 MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin));
504 mtk_gpio_pic_map_fdt(struct mtk_gpio_softc *sc,
505 struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep)
509 if (daf->ncells != 1) {
510 device_printf(sc->dev, "Invalid #interrupt-cells\n");
516 if (irq >= sc->num_pins) {
517 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
523 *modep = GPIO_INTR_EDGE_BOTH;
529 mtk_gpio_pic_map_gpio(struct mtk_gpio_softc *sc,
530 struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep)
534 irq = dag->gpio_pin_num;
535 if (irq >= sc->num_pins) {
536 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
542 *modep = dag->gpio_intr_mode;
548 mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
549 struct intr_irqsrc **isrcp)
553 struct mtk_gpio_softc *sc;
555 sc = device_get_softc(dev);
556 switch (data->type) {
557 case INTR_MAP_DATA_FDT:
558 error = (mtk_gpio_pic_map_fdt(sc,
559 (struct intr_map_data_fdt *)data, &irq, NULL));
561 case INTR_MAP_DATA_GPIO:
562 error = (mtk_gpio_pic_map_gpio(sc,
563 (struct intr_map_data_gpio *)data, &irq, NULL));
571 device_printf(dev, "Invalid map type\n");
575 *isrcp = PIC_INTR_ISRC(sc, irq);
580 mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
582 struct mtk_gpio_softc *sc;
583 struct mtk_gpio_pin_irqsrc *pisrc;
584 uint32_t pin, mask, val;
586 sc = device_get_softc(dev);
588 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
594 if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
595 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
596 MTK_WRITE_4(sc, GPIO_PIORENA, val);
597 val = MTK_READ_4(sc, GPIO_PIOFENA) | mask;
598 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
600 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
601 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
602 val = MTK_READ_4(sc, GPIO_PIORENA) | mask;
603 MTK_WRITE_4(sc, GPIO_PIORENA, val);
610 mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
612 struct mtk_gpio_softc *sc;
613 struct mtk_gpio_pin_irqsrc *pisrc;
614 uint32_t pin, mask, val;
616 sc = device_get_softc(dev);
618 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
624 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
625 MTK_WRITE_4(sc, GPIO_PIORENA, val);
626 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
627 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
633 mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
636 mtk_gpio_pic_disable_intr(dev, isrc);
640 mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
643 mtk_gpio_pic_enable_intr(dev, isrc);
647 mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
649 struct mtk_gpio_softc *sc;
650 struct mtk_gpio_pin_irqsrc *pisrc;
652 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
653 sc = device_get_softc(dev);
655 MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq);
660 mtk_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
661 struct resource *res, struct intr_map_data *data)
663 struct mtk_gpio_softc *sc;
672 sc = device_get_softc(dev);
674 switch (data->type) {
675 case INTR_MAP_DATA_FDT:
676 error = mtk_gpio_pic_map_fdt(sc,
677 (struct intr_map_data_fdt *)data, &irq, &mode);
679 case INTR_MAP_DATA_GPIO:
680 error = mtk_gpio_pic_map_gpio(sc,
681 (struct intr_map_data_gpio *)data, &irq, &mode);
692 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_RISING) {
693 val = MTK_READ_4(sc, GPIO_PIORENA) | (1u << irq);
694 MTK_WRITE_4(sc, GPIO_PIORENA, val);
696 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_FALLING) {
697 val = MTK_READ_4(sc, GPIO_PIOFENA) | (1u << irq);
698 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
705 mtk_gpio_intr(void *arg)
707 struct mtk_gpio_softc *sc;
708 uint32_t i, interrupts;
711 interrupts = MTK_READ_4(sc, GPIO_PIOINT);
712 MTK_WRITE_4(sc, GPIO_PIOINT, interrupts);
714 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
715 if ((interrupts & 0x1) == 0)
717 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
718 curthread->td_intr_frame) != 0) {
719 device_printf(sc->dev, "spurious interrupt %d\n", i);
723 return (FILTER_HANDLED);
727 mtk_gpio_get_node(device_t bus, device_t dev)
730 /* We only have one child, the GPIO bus, which needs our own node. */
731 return (ofw_bus_get_node(bus));
734 static device_method_t mtk_gpio_methods[] = {
735 /* Device interface */
736 DEVMETHOD(device_probe, mtk_gpio_probe),
737 DEVMETHOD(device_attach, mtk_gpio_attach),
738 DEVMETHOD(device_detach, mtk_gpio_detach),
741 DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus),
742 DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max),
743 DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname),
744 DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags),
745 DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps),
746 DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags),
747 DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get),
748 DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set),
749 DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle),
751 /* Interrupt controller interface */
752 DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr),
753 DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr),
754 DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr),
755 DEVMETHOD(pic_setup_intr, mtk_gpio_pic_setup_intr),
756 DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter),
757 DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread),
758 DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread),
760 /* ofw_bus interface */
761 DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node),
766 static driver_t mtk_gpio_driver = {
769 sizeof(struct mtk_gpio_softc),
772 static devclass_t mtk_gpio_devclass;
774 EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver,
775 mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);