2 * Copyright (c) 2016 Stanislav Galabov.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
29 #include <sys/stddef.h>
30 #include <sys/param.h>
31 #include <sys/types.h>
32 #include <sys/kernel.h>
34 #include <sys/module.h>
36 #include <machine/bus.h>
38 #include <dev/fdt/fdt_common.h>
39 #include <dev/fdt/fdt_clock.h>
40 #include <mips/mediatek/fdt_reset.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
44 #include <mips/mediatek/mtk_sysctl.h>
45 #include <mips/mediatek/mtk_soc.h>
46 #include <mips/mediatek/mtk_usb_phy.h>
48 #define RESET_ASSERT_DELAY 1000
49 #define RESET_DEASSERT_DELAY 10000
51 struct mtk_usb_phy_softc {
53 struct resource * res;
60 #define USB_PHY_READ(_sc, _off) bus_read_4((_sc)->res, (_off))
61 #define USB_PHY_WRITE(_sc, _off, _val) bus_write_4((_sc)->res, (_off), (_val))
62 #define USB_PHY_CLR_SET(_sc, _off, _clr, _set) \
63 USB_PHY_WRITE(_sc, _off, ((USB_PHY_READ(_sc, _off) & ~(_clr)) | (_set)))
65 #define USB_PHY_READ_U2(_sc, _off) \
66 USB_PHY_READ((_sc), ((_sc)->u2_base + (_off)))
67 #define USB_PHY_WRITE_U2(_sc, _off, _val) \
68 USB_PHY_WRITE((_sc), ((_sc)->u2_base + (_off)), (_val))
69 #define USB_PHY_CLR_SET_U2(_sc, _off, _clr, _set) \
70 USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
72 #define USB_PHY_BARRIER(_sc) bus_barrier((_sc)->res, 0, 0, \
73 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ)
75 #define USB_PHY_READ_FM(_sc, _off) \
76 USB_PHY_READ((_sc), ((_sc)->fm_base + (_off)))
77 #define USB_PHY_WRITE_FM(_sc, _off) \
78 USB_PHY_WRITE((_sc), ((_sc)->fm_base + (_off)), (_val))
79 #define USB_PHY_CLR_SET_FM(_sc, _off, _clr, _set) \
80 USB_PHY_WRITE_U2((_sc), (_off), ((USB_PHY_READ_U2((_sc), (_off)) & \
83 static void mtk_usb_phy_mt7621_init(device_t);
84 static void mtk_usb_phy_mt7628_init(device_t);
86 static struct ofw_compat_data compat_data[] = {
87 { "ralink,mt7620-usbphy", MTK_SOC_MT7620A },
88 { "ralink,mt7628an-usbphy", MTK_SOC_MT7628 },
89 { "ralink,rt3352-usbphy", MTK_SOC_RT3352 },
90 { "ralink,rt3050-usbphy", MTK_SOC_RT3050 },
91 { NULL, MTK_SOC_UNKNOWN }
95 mtk_usb_phy_probe(device_t dev)
97 struct mtk_usb_phy_softc *sc = device_get_softc(dev);
99 if (!ofw_bus_status_okay(dev))
102 ofw_bus_search_compatible(dev, compat_data)->ocd_data) ==
106 device_set_desc(dev, "MTK USB PHY");
112 mtk_usb_phy_attach(device_t dev)
114 struct mtk_usb_phy_softc * sc = device_get_softc(dev);
121 /* Get our FDT node and SoC id */
122 node = ofw_bus_get_node(dev);
124 /* Now let's see about setting USB to host or device mode */
125 /* XXX: is it the same for all SoCs? */
126 val = mtk_sysctl_get(SYSCTL_SYSCFG1);
127 if (OF_hasprop(node, "mtk,usb-device"))
128 val &= ~SYSCFG1_USB_HOST_MODE;
130 val |= SYSCFG1_USB_HOST_MODE;
131 mtk_sysctl_set(SYSCTL_SYSCFG1, val);
133 /* If we have clocks defined - enable them */
134 if (OF_hasprop(node, "clocks"))
135 fdt_clock_enable_all(dev);
137 /* If we have resets defined - perform a reset sequence */
138 if (OF_hasprop(node, "resets")) {
139 fdt_reset_assert_all(dev);
140 DELAY(RESET_ASSERT_DELAY);
141 fdt_reset_deassert_all(dev);
142 DELAY(RESET_DEASSERT_DELAY);
145 /* Careful, some devices actually require resources */
146 if (OF_hasprop(node, "reg")) {
148 sc->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
150 if (sc->res == NULL) {
151 device_printf(dev, "could not map memory\n");
158 /* Some SoCs require specific USB PHY init... handle these */
160 case MTK_SOC_MT7628: /* Fallthrough */
164 sc->fm_base = MT7628_FM_FEG_BASE;
165 sc->u2_base = MT7628_U2_BASE;
166 sc->sr_coef = MT7628_SR_COEF;
167 mtk_usb_phy_mt7628_init(dev);
172 sc->fm_base = MT7621_FM_FEG_BASE;
173 sc->u2_base = MT7621_U2_BASE;
174 sc->sr_coef = MT7621_SR_COEF;
175 mtk_usb_phy_mt7621_init(dev);
179 /* We no longer need the resources, release them */
181 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
187 mtk_usb_phy_detach(device_t dev)
189 struct mtk_usb_phy_softc *sc = device_get_softc(dev);
192 /* Get our FDT node */
193 node = ofw_bus_get_node(dev);
195 /* If we have resets defined - assert them */
196 if (OF_hasprop(node, "resets"))
197 fdt_reset_assert_all(dev);
199 /* If we have clocks defined - disable them */
200 if (OF_hasprop(node, "clocks"))
201 fdt_clock_disable_all(dev);
203 /* Finally, release resources, if any were allocated */
205 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->res);
211 * Things currently seem to work a lot better without slew rate calibration
212 * both on MT7621 and MT7688, so we leave it out for now.
216 mtk_usb_phy_slew_rate_calibration(struct mtk_usb_phy_softc *sc)
221 USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, 0, SRCAL_EN);
225 USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, 0, FRCK_EN);
227 USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, CYCLECNT, 0x400);
229 USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, 0, FDET_EN);
232 for (i = 0; i < 1000; i++) {
233 if ((val = USB_PHY_READ_FM(sc, U2_PHY_FMMONR0)) != 0) {
234 device_printf(sc->dev, "DONE with FDET\n");
239 device_printf(sc->dev, "After FDET\n");
241 USB_PHY_CLR_SET_FM(sc, U2_PHY_FMCR0, FDET_EN, 0);
243 USB_PHY_CLR_SET_FM(sc, U2_PHY_FMMONR1, FRCK_EN, 0);
245 USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCAL_EN, 0);
250 USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, 0x4 << SRCTRL_OFF);
253 val = ((((1024 * 25 * sc->sr_coef) / val) + 500) / 1000) &
255 USB_PHY_CLR_SET_U2(sc, U2_PHY_ACR0, SRCTRL, val << SRCTRL_OFF);
262 mtk_usb_phy_mt7621_init(device_t dev)
265 struct mtk_usb_phy_softc *sc = device_get_softc(dev);
267 /* Slew rate calibration only, but for 2 ports */
268 mtk_usb_phy_slew_rate_calibration(sc);
270 sc->u2_base = MT7621_U2_BASE_P1;
271 mtk_usb_phy_slew_rate_calibration(sc);
276 mtk_usb_phy_mt7628_init(device_t dev)
278 struct mtk_usb_phy_softc *sc = device_get_softc(dev);
280 /* XXX: possibly add barriers between the next writes? */
281 USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00ffff02);
283 USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00555502);
285 USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00aaaa02);
287 USB_PHY_WRITE_U2(sc, U2_PHY_DCR0, 0x00000402);
289 USB_PHY_WRITE_U2(sc, U2_PHY_AC0, 0x0048086a);
291 USB_PHY_WRITE_U2(sc, U2_PHY_AC1, 0x4400001c);
293 USB_PHY_WRITE_U2(sc, U2_PHY_ACR3, 0xc0200000);
295 USB_PHY_WRITE_U2(sc, U2_PHY_DTM0, 0x02000000);
299 /* Slew rate calibration */
300 mtk_usb_phy_slew_rate_calibration(sc);
304 static device_method_t mtk_usb_phy_methods[] = {
305 /* Device interface */
306 DEVMETHOD(device_probe, mtk_usb_phy_probe),
307 DEVMETHOD(device_attach, mtk_usb_phy_attach),
308 DEVMETHOD(device_detach, mtk_usb_phy_detach),
309 DEVMETHOD(device_suspend, bus_generic_suspend),
310 DEVMETHOD(device_resume, bus_generic_resume),
311 DEVMETHOD(device_shutdown, bus_generic_shutdown),
316 static driver_t mtk_usb_phy_driver = {
318 .methods = mtk_usb_phy_methods,
319 .size = sizeof(struct mtk_usb_phy_softc),
322 static devclass_t mtk_usb_phy_devclass;
324 DRIVER_MODULE(usbphy, simplebus, mtk_usb_phy_driver, mtk_usb_phy_devclass, 0,