2 * Copyright (c) 2006 Oleksandr Tymoshenko
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. The name of the author may not be used to endorse or promote products
12 * derived from this software without specific prior written permission.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
18 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
33 * MIPS bus dma support routines
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/malloc.h>
40 #include <sys/busdma_bufalloc.h>
41 #include <sys/interrupt.h>
44 #include <sys/memdesc.h>
45 #include <sys/mutex.h>
47 #include <sys/kernel.h>
48 #include <sys/sysctl.h>
53 #include <vm/vm_extern.h>
54 #include <vm/vm_kern.h>
55 #include <vm/vm_page.h>
56 #include <vm/vm_map.h>
58 #include <machine/atomic.h>
59 #include <machine/bus.h>
60 #include <machine/cache.h>
61 #include <machine/cpufunc.h>
62 #include <machine/cpuinfo.h>
63 #include <machine/md_var.h>
66 #define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3
67 #define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4
70 * On XBurst cores from Ingenic, cache-line writeback is local
71 * only, unless accompanied by invalidation. Invalidations force
72 * dirty line writeout and invalidation requests forwarded to
73 * other cores if other cores have the cache line dirty.
75 #if defined(SMP) && defined(CPU_XBURST)
76 #define BUS_DMA_FORCE_WBINV
87 bus_dma_filter_t *filter;
95 bus_dma_lock_t *lockfunc;
97 bus_dma_segment_t *segments;
98 struct bounce_zone *bounce_zone;
102 vm_offset_t vaddr; /* kva of bounce buffer */
103 vm_offset_t vaddr_nocache; /* kva of bounce buffer uncached */
104 bus_addr_t busaddr; /* Physical address */
105 vm_offset_t datavaddr; /* kva of client data */
106 bus_addr_t dataaddr; /* client physical address */
107 bus_size_t datacount; /* client data count */
108 STAILQ_ENTRY(bounce_page) links;
112 vm_offset_t vaddr; /* kva of bounce buffer */
113 bus_addr_t busaddr; /* Physical address */
114 bus_size_t datacount; /* client data count */
117 int busdma_swi_pending;
120 STAILQ_ENTRY(bounce_zone) links;
121 STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
129 bus_size_t alignment;
133 struct sysctl_ctx_list sysctl_tree;
134 struct sysctl_oid *sysctl_tree_top;
137 static struct mtx bounce_lock;
138 static int total_bpages;
139 static int busdma_zonecount;
140 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
142 static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
143 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
144 "Total bounce pages");
146 #define DMAMAP_UNCACHEABLE 0x08
147 #define DMAMAP_CACHE_ALIGNED 0x10
150 struct bp_list bpages;
158 TAILQ_ENTRY(bus_dmamap) freelist;
159 STAILQ_ENTRY(bus_dmamap) links;
160 bus_dmamap_callback_t *callback;
163 struct sync_list *slist;
166 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
167 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
169 static void init_bounce_pages(void *dummy);
170 static int alloc_bounce_zone(bus_dma_tag_t dmat);
171 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
172 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
174 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
175 vm_offset_t vaddr, bus_addr_t addr,
177 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
179 /* Default tag, as most drivers provide no parent tag. */
180 bus_dma_tag_t mips_root_dma_tag;
182 static uma_zone_t dmamap_zone; /* Cache of struct bus_dmamap items */
184 static busdma_bufalloc_t coherent_allocator; /* Cache of coherent buffers */
185 static busdma_bufalloc_t standard_allocator; /* Cache of standard buffers */
187 MALLOC_DEFINE(M_BUSDMA, "busdma", "busdma metadata");
188 MALLOC_DEFINE(M_BOUNCE, "bounce", "busdma bounce pages");
191 * This is the ctor function passed to uma_zcreate() for the pool of dma maps.
192 * It'll need platform-specific changes if this code is copied.
195 dmamap_ctor(void *mem, int size, void *arg, int flags)
200 map = (bus_dmamap_t)mem;
201 dmat = (bus_dma_tag_t)arg;
208 map->allocbuffer = NULL;
210 STAILQ_INIT(&map->bpages);
216 * This is the dtor function passed to uma_zcreate() for the pool of dma maps.
217 * It may need platform-specific changes if this code is copied .
220 dmamap_dtor(void *mem, int size, void *arg)
224 map = (bus_dmamap_t)mem;
226 map->dmat->map_count--;
230 busdma_init(void *dummy)
233 /* Create a cache of maps for bus_dmamap_create(). */
234 dmamap_zone = uma_zcreate("dma maps", sizeof(struct bus_dmamap),
235 dmamap_ctor, dmamap_dtor, NULL, NULL, UMA_ALIGN_PTR, 0);
237 /* Create a cache of buffers in standard (cacheable) memory. */
238 standard_allocator = busdma_bufalloc_create("buffer",
239 mips_dcache_max_linesize, /* minimum_alignment */
240 NULL, /* uma_alloc func */
241 NULL, /* uma_free func */
242 0); /* uma_zcreate_flags */
245 * Create a cache of buffers in uncacheable memory, to implement the
246 * BUS_DMA_COHERENT flag.
248 coherent_allocator = busdma_bufalloc_create("coherent",
249 mips_dcache_max_linesize, /* minimum_alignment */
250 busdma_bufalloc_alloc_uncacheable,
251 busdma_bufalloc_free_uncacheable,
252 0); /* uma_zcreate_flags */
254 SYSINIT(busdma, SI_SUB_KMEM, SI_ORDER_FOURTH, busdma_init, NULL);
257 * Return true if a match is made.
259 * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
261 * If paddr is within the bounds of the dma tag then call the filter callback
262 * to check for a match, if there is no filter callback then assume a match.
265 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
272 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
273 || ((paddr & (dmat->alignment - 1)) != 0))
274 && (dmat->filter == NULL
275 || (*dmat->filter)(dmat->filterarg, paddr) != 0))
279 } while (retval == 0 && dmat != NULL);
284 * Check to see if the specified page is in an allowed DMA range.
288 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
291 for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
292 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
293 || (lowaddr < phys_avail[i] &&
294 highaddr > phys_avail[i]))
301 * Convenience function for manipulating driver locks from busdma (during
302 * busdma_swi, for example). Drivers that don't provide their own locks
303 * should specify &Giant to dmat->lockfuncarg. Drivers that use their own
304 * non-mutex locking scheme don't have to use this at all.
307 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
311 dmtx = (struct mtx *)arg;
320 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
325 * dflt_lock should never get called. It gets put into the dma tag when
326 * lockfunc == NULL, which is only valid if the maps that are associated
327 * with the tag are meant to never be defered.
328 * XXX Should have a way to identify which driver is responsible here.
331 dflt_lock(void *arg, bus_dma_lock_op_t op)
334 panic("driver error: busdma dflt_lock called");
336 printf("DRIVER_ERROR: busdma dflt_lock called\n");
340 static __inline bus_dmamap_t
341 _busdma_alloc_dmamap(bus_dma_tag_t dmat)
343 struct sync_list *slist;
346 slist = malloc(sizeof(*slist) * dmat->nsegments, M_BUSDMA, M_NOWAIT);
349 map = uma_zalloc_arg(dmamap_zone, dmat, M_NOWAIT);
353 free(slist, M_BUSDMA);
358 _busdma_free_dmamap(bus_dmamap_t map)
361 free(map->slist, M_BUSDMA);
362 uma_zfree(dmamap_zone, map);
366 * Allocate a device specific dma_tag.
371 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
372 bus_addr_t boundary, bus_addr_t lowaddr,
373 bus_addr_t highaddr, bus_dma_filter_t *filter,
374 void *filterarg, bus_size_t maxsize, int nsegments,
375 bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
376 void *lockfuncarg, bus_dma_tag_t *dmat)
378 bus_dma_tag_t newtag;
380 /* Return a NULL tag on failure */
383 parent = mips_root_dma_tag;
385 newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_BUSDMA, M_NOWAIT);
386 if (newtag == NULL) {
387 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
388 __func__, newtag, 0, error);
392 newtag->parent = parent;
393 newtag->alignment = alignment;
394 newtag->boundary = boundary;
395 newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
396 newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
397 newtag->filter = filter;
398 newtag->filterarg = filterarg;
399 newtag->maxsize = maxsize;
400 newtag->nsegments = nsegments;
401 newtag->maxsegsz = maxsegsz;
402 newtag->flags = flags;
403 if (cpuinfo.cache_coherent_dma)
404 newtag->flags |= BUS_DMA_COHERENT;
405 newtag->ref_count = 1; /* Count ourself */
406 newtag->map_count = 0;
407 if (lockfunc != NULL) {
408 newtag->lockfunc = lockfunc;
409 newtag->lockfuncarg = lockfuncarg;
411 newtag->lockfunc = dflt_lock;
412 newtag->lockfuncarg = NULL;
414 newtag->segments = NULL;
417 * Take into account any restrictions imposed by our parent tag
419 if (parent != NULL) {
420 newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr);
421 newtag->highaddr = MAX(parent->highaddr, newtag->highaddr);
422 if (newtag->boundary == 0)
423 newtag->boundary = parent->boundary;
424 else if (parent->boundary != 0)
426 MIN(parent->boundary, newtag->boundary);
427 if ((newtag->filter != NULL) ||
428 ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
429 newtag->flags |= BUS_DMA_COULD_BOUNCE;
430 if (newtag->filter == NULL) {
432 * Short circuit looking at our parent directly
433 * since we have encapsulated all of its information
435 newtag->filter = parent->filter;
436 newtag->filterarg = parent->filterarg;
437 newtag->parent = parent->parent;
439 if (newtag->parent != NULL)
440 atomic_add_int(&parent->ref_count, 1);
442 if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
443 || newtag->alignment > 1)
444 newtag->flags |= BUS_DMA_COULD_BOUNCE;
446 if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
447 (flags & BUS_DMA_ALLOCNOW) != 0) {
448 struct bounce_zone *bz;
452 if ((error = alloc_bounce_zone(newtag)) != 0) {
453 free(newtag, M_BUSDMA);
456 bz = newtag->bounce_zone;
458 if (ptoa(bz->total_bpages) < maxsize) {
461 pages = atop(maxsize) - bz->total_bpages;
463 /* Add pages to our bounce pool */
464 if (alloc_bounce_pages(newtag, pages) < pages)
467 /* Performed initial allocation */
468 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
470 newtag->bounce_zone = NULL;
472 free(newtag, M_BUSDMA);
475 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
476 __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
482 bus_dma_tag_destroy(bus_dma_tag_t dmat)
485 bus_dma_tag_t dmat_copy = dmat;
489 if (dmat->map_count != 0)
492 while (dmat != NULL) {
493 bus_dma_tag_t parent;
495 parent = dmat->parent;
496 atomic_subtract_int(&dmat->ref_count, 1);
497 if (dmat->ref_count == 0) {
498 if (dmat->segments != NULL)
499 free(dmat->segments, M_BUSDMA);
500 free(dmat, M_BUSDMA);
502 * Last reference count, so
503 * release our reference
504 * count on our parent.
511 CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
518 * Allocate a handle for mapping from kva/uva/physical
519 * address space into bus device space.
522 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
527 if (dmat->segments == NULL) {
528 dmat->segments = (bus_dma_segment_t *)malloc(
529 sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA,
531 if (dmat->segments == NULL) {
532 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
533 __func__, dmat, ENOMEM);
538 newmap = _busdma_alloc_dmamap(dmat);
539 if (newmap == NULL) {
540 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
546 * Bouncing might be required if the driver asks for an active
547 * exclusion region, a data alignment that is stricter than 1, and/or
548 * an active address boundary.
550 if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
553 struct bounce_zone *bz;
556 if (dmat->bounce_zone == NULL) {
557 if ((error = alloc_bounce_zone(dmat)) != 0) {
558 _busdma_free_dmamap(newmap);
563 bz = dmat->bounce_zone;
565 /* Initialize the new map */
566 STAILQ_INIT(&((*mapp)->bpages));
569 * Attempt to add pages to our pool on a per-instance
570 * basis up to a sane limit.
572 maxpages = MAX_BPAGES;
573 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
574 || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
577 pages = MAX(atop(dmat->maxsize), 1);
578 pages = MIN(maxpages - bz->total_bpages, pages);
579 pages = MAX(pages, 1);
580 if (alloc_bounce_pages(dmat, pages) < pages)
583 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
585 dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
593 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
594 __func__, dmat, dmat->flags, error);
600 * Destroy a handle for mapping from kva/uva/physical
601 * address space into bus device space.
604 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
607 if (STAILQ_FIRST(&map->bpages) != NULL || map->sync_count != 0) {
608 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
609 __func__, dmat, EBUSY);
612 if (dmat->bounce_zone)
613 dmat->bounce_zone->map_count--;
614 _busdma_free_dmamap(map);
615 CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
620 * Allocate a piece of memory that can be efficiently mapped into
621 * bus device space based on the constraints lited in the dma tag.
622 * A dmamap to for use with dmamap_load is also allocated.
625 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddrp, int flags,
628 bus_dmamap_t newmap = NULL;
629 busdma_bufalloc_t ba;
630 struct busdma_bufzone *bufzone;
631 vm_memattr_t memattr;
636 if (flags & BUS_DMA_NOWAIT)
640 if (dmat->segments == NULL) {
641 dmat->segments = (bus_dma_segment_t *)malloc(
642 sizeof(bus_dma_segment_t) * dmat->nsegments, M_BUSDMA,
644 if (dmat->segments == NULL) {
645 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
646 __func__, dmat, dmat->flags, ENOMEM);
651 newmap = _busdma_alloc_dmamap(dmat);
652 if (newmap == NULL) {
653 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
654 __func__, dmat, dmat->flags, ENOMEM);
659 * If all the memory is coherent with DMA then we don't need to
660 * do anything special for a coherent mapping request.
662 if (dmat->flags & BUS_DMA_COHERENT)
663 flags &= ~BUS_DMA_COHERENT;
665 if (flags & BUS_DMA_COHERENT) {
666 memattr = VM_MEMATTR_UNCACHEABLE;
667 ba = coherent_allocator;
668 newmap->flags |= DMAMAP_UNCACHEABLE;
670 memattr = VM_MEMATTR_DEFAULT;
671 ba = standard_allocator;
673 /* All buffers we allocate are cache-aligned. */
674 newmap->flags |= DMAMAP_CACHE_ALIGNED;
676 if (flags & BUS_DMA_ZERO)
680 * Try to find a bufzone in the allocator that holds a cache of buffers
681 * of the right size for this request. If the buffer is too big to be
682 * held in the allocator cache, this returns NULL.
684 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
687 * Allocate the buffer from the uma(9) allocator if...
688 * - It's small enough to be in the allocator (bufzone not NULL).
689 * - The alignment constraint isn't larger than the allocation size
690 * (the allocator aligns buffers to their size boundaries).
691 * - There's no need to handle lowaddr/highaddr exclusion zones.
692 * else allocate non-contiguous pages if...
693 * - The page count that could get allocated doesn't exceed nsegments.
694 * - The alignment constraint isn't larger than a page boundary.
695 * - There are no boundary-crossing constraints.
696 * else allocate a block of contiguous pages because one or more of the
697 * constraints is something that only the contig allocator can fulfill.
699 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
700 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
701 vaddr = uma_zalloc(bufzone->umazone, mflags);
702 } else if (dmat->nsegments >= btoc(dmat->maxsize) &&
703 dmat->alignment <= PAGE_SIZE && dmat->boundary == 0) {
704 vaddr = (void *)kmem_alloc_attr(kernel_arena, dmat->maxsize,
705 mflags, 0, dmat->lowaddr, memattr);
707 vaddr = (void *)kmem_alloc_contig(kernel_arena, dmat->maxsize,
708 mflags, 0, dmat->lowaddr, dmat->alignment, dmat->boundary,
712 _busdma_free_dmamap(newmap);
715 newmap->sync_count = 0;
720 return (vaddr == NULL ? ENOMEM : 0);
724 * Free a piece of memory and it's allocated dmamap, that was allocated
725 * via bus_dmamem_alloc. Make the same choice for free/contigfree.
728 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
730 struct busdma_bufzone *bufzone;
731 busdma_bufalloc_t ba;
733 if (map->flags & DMAMAP_UNCACHEABLE)
734 ba = coherent_allocator;
736 ba = standard_allocator;
738 free(map->slist, M_BUSDMA);
739 uma_zfree(dmamap_zone, map);
741 bufzone = busdma_bufalloc_findzone(ba, dmat->maxsize);
743 if (bufzone != NULL && dmat->alignment <= bufzone->size &&
744 !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
745 uma_zfree(bufzone->umazone, vaddr);
747 kmem_free(kernel_arena, (vm_offset_t)vaddr, dmat->maxsize);
748 CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
752 _bus_dmamap_count_phys(bus_dma_tag_t dmat, bus_dmamap_t map, vm_paddr_t buf,
753 bus_size_t buflen, int flags)
758 if ((map->pagesneeded == 0)) {
759 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
760 dmat->lowaddr, dmat->boundary, dmat->alignment);
761 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
762 map, map->pagesneeded);
764 * Count the number of bounce pages
765 * needed in order to complete this transfer
768 while (buflen != 0) {
769 sgsize = MIN(buflen, dmat->maxsegsz);
770 if (run_filter(dmat, curaddr) != 0) {
771 sgsize = MIN(sgsize, PAGE_SIZE);
777 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
782 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
783 void *buf, bus_size_t buflen, int flags)
786 vm_offset_t vendaddr;
789 if ((map->pagesneeded == 0)) {
790 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
791 dmat->lowaddr, dmat->boundary, dmat->alignment);
792 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
793 map, map->pagesneeded);
795 * Count the number of bounce pages
796 * needed in order to complete this transfer
798 vaddr = (vm_offset_t)buf;
799 vendaddr = (vm_offset_t)buf + buflen;
801 while (vaddr < vendaddr) {
804 KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap"));
805 sg_len = PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK);
806 paddr = pmap_kextract(vaddr);
807 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
808 run_filter(dmat, paddr) != 0) {
809 sg_len = roundup2(sg_len, dmat->alignment);
814 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
819 _bus_dmamap_reserve_pages(bus_dma_tag_t dmat, bus_dmamap_t map,int flags)
822 /* Reserve Necessary Bounce Pages */
823 mtx_lock(&bounce_lock);
824 if (flags & BUS_DMA_NOWAIT) {
825 if (reserve_bounce_pages(dmat, map, 0) != 0) {
826 mtx_unlock(&bounce_lock);
830 if (reserve_bounce_pages(dmat, map, 1) != 0) {
831 /* Queue us for resources */
832 STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
834 mtx_unlock(&bounce_lock);
835 return (EINPROGRESS);
838 mtx_unlock(&bounce_lock);
844 * Add a single contiguous physical range to the segment list.
847 _bus_dmamap_addseg(bus_dma_tag_t dmat, bus_dmamap_t map, bus_addr_t curaddr,
848 bus_size_t sgsize, bus_dma_segment_t *segs, int *segp)
850 bus_addr_t baddr, bmask;
854 * Make sure we don't cross any boundaries.
856 bmask = ~(dmat->boundary - 1);
857 if (dmat->boundary > 0) {
858 baddr = (curaddr + dmat->boundary) & bmask;
859 if (sgsize > (baddr - curaddr))
860 sgsize = (baddr - curaddr);
863 * Insert chunk into a segment, coalescing with
864 * the previous segment if possible.
868 curaddr == segs[seg].ds_addr + segs[seg].ds_len &&
869 (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
870 (dmat->boundary == 0 ||
871 (segs[seg].ds_addr & bmask) == (curaddr & bmask))) {
872 segs[seg].ds_len += sgsize;
874 if (++seg >= dmat->nsegments)
876 segs[seg].ds_addr = curaddr;
877 segs[seg].ds_len = sgsize;
884 * Utility function to load a physical buffer. segp contains
885 * the starting segment on entrace, and the ending segment on exit.
888 _bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map,
889 vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
897 segs = dmat->segments;
899 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
900 _bus_dmamap_count_phys(dmat, map, buf, buflen, flags);
901 if (map->pagesneeded != 0) {
902 error = _bus_dmamap_reserve_pages(dmat, map, flags);
910 sgsize = MIN(buflen, dmat->maxsegsz);
911 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
912 map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
913 sgsize = MIN(sgsize, PAGE_SIZE);
914 curaddr = add_bounce_page(dmat, map, 0, curaddr,
917 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
929 _bus_dmamap_unload(dmat, map);
930 return (EFBIG); /* XXX better return value here? */
936 _bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map,
937 struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
938 bus_dma_segment_t *segs, int *segp)
941 return (bus_dmamap_load_ma_triv(dmat, map, ma, tlen, ma_offs, flags,
946 * Utility function to load a linear buffer. segp contains
947 * the starting segment on entrance, and the ending segment on exit.
948 * first indicates if this is the first invocation of this function.
951 _bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
952 bus_size_t buflen, struct pmap *pmap, int flags, bus_dma_segment_t *segs,
957 struct sync_list *sl;
958 vm_offset_t vaddr = (vm_offset_t)buf;
963 segs = dmat->segments;
964 if ((flags & BUS_DMA_LOAD_MBUF) != 0)
965 map->flags |= DMAMAP_CACHE_ALIGNED;
967 if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
968 _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen, flags);
969 if (map->pagesneeded != 0) {
970 error = _bus_dmamap_reserve_pages(dmat, map, flags);
975 CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
976 "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
980 * Get the physical address for this segment.
982 * XXX Don't support checking for coherent mappings
983 * XXX in user address space.
985 KASSERT(kernel_pmap == pmap, ("pmap is not kernel pmap"));
986 curaddr = pmap_kextract(vaddr);
989 * Compute the segment size, and adjust counts.
991 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
992 if (sgsize > dmat->maxsegsz)
993 sgsize = dmat->maxsegsz;
997 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
998 map->pagesneeded != 0 && run_filter(dmat, curaddr)) {
999 curaddr = add_bounce_page(dmat, map, vaddr, curaddr,
1002 sl = &map->slist[map->sync_count - 1];
1003 if (map->sync_count == 0 ||
1004 vaddr != sl->vaddr + sl->datacount) {
1005 if (++map->sync_count > dmat->nsegments)
1009 sl->datacount = sgsize;
1010 sl->busaddr = curaddr;
1012 sl->datacount += sgsize;
1014 sgsize = _bus_dmamap_addseg(dmat, map, curaddr, sgsize, segs,
1027 _bus_dmamap_unload(dmat, map);
1028 error = EFBIG; /* XXX better return value here? */
1034 __bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map,
1035 struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
1038 KASSERT(dmat != NULL, ("dmatag is NULL"));
1039 KASSERT(map != NULL, ("dmamap is NULL"));
1041 map->callback = callback;
1042 map->callback_arg = callback_arg;
1046 _bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map,
1047 bus_dma_segment_t *segs, int nsegs, int error)
1051 segs = dmat->segments;
1056 * Release the mapping held by map.
1059 _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1061 struct bounce_page *bpage;
1063 while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1064 STAILQ_REMOVE_HEAD(&map->bpages, links);
1065 free_bounce_page(dmat, bpage);
1067 map->sync_count = 0;
1072 bus_dmamap_sync_buf(vm_offset_t buf, int len, bus_dmasync_op_t op, int aligned)
1074 char tmp_cl[mips_dcache_max_linesize], tmp_clend[mips_dcache_max_linesize];
1075 vm_offset_t buf_cl, buf_clend;
1076 vm_size_t size_cl, size_clend;
1077 int cache_linesize_mask = mips_dcache_max_linesize - 1;
1080 * dcache invalidation operates on cache line aligned addresses
1081 * and could modify areas of memory that share the same cache line
1082 * at the beginning and the ending of the buffer. In order to
1083 * prevent a data loss we save these chunks in temporary buffer
1084 * before invalidation and restore them afer it.
1086 * If the aligned flag is set the buffer is either an mbuf or came from
1087 * our allocator caches. In both cases they are always sized and
1088 * aligned to cacheline boundaries, so we can skip preserving nearby
1089 * data if a transfer appears to overlap cachelines. An mbuf in
1090 * particular will usually appear to be overlapped because of offsetting
1091 * within the buffer to align the L3 headers, but we know that the bytes
1092 * preceeding that offset are part of the same mbuf memory and are not
1093 * unrelated adjacent data (and a rule of mbuf handling is that the cpu
1094 * is not allowed to touch the mbuf while dma is in progress, including
1101 buf_cl = buf & ~cache_linesize_mask;
1102 size_cl = buf & cache_linesize_mask;
1103 buf_clend = buf + len;
1104 size_clend = (mips_dcache_max_linesize -
1105 (buf_clend & cache_linesize_mask)) & cache_linesize_mask;
1109 case BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE:
1110 case BUS_DMASYNC_POSTREAD:
1113 * Save buffers that might be modified by invalidation
1116 memcpy (tmp_cl, (void*)buf_cl, size_cl);
1118 memcpy (tmp_clend, (void*)buf_clend, size_clend);
1119 mips_dcache_inv_range(buf, len);
1124 memcpy ((void*)buf_cl, tmp_cl, size_cl);
1126 memcpy ((void*)buf_clend, tmp_clend, size_clend);
1128 * Copies above have brought corresponding memory
1129 * cache lines back into dirty state. Write them back
1130 * out and invalidate affected cache lines again if
1134 mips_dcache_wbinv_range(buf_cl, size_cl);
1135 if (size_clend && (size_cl == 0 ||
1136 buf_clend - buf_cl > mips_dcache_max_linesize))
1137 mips_dcache_wbinv_range(buf_clend, size_clend);
1140 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
1141 mips_dcache_wbinv_range(buf, len);
1144 case BUS_DMASYNC_PREREAD:
1146 * Save buffers that might be modified by invalidation
1149 memcpy (tmp_cl, (void *)buf_cl, size_cl);
1151 memcpy (tmp_clend, (void *)buf_clend, size_clend);
1152 mips_dcache_inv_range(buf, len);
1157 memcpy ((void *)buf_cl, tmp_cl, size_cl);
1159 memcpy ((void *)buf_clend, tmp_clend, size_clend);
1161 * Copies above have brought corresponding memory
1162 * cache lines back into dirty state. Write them back
1163 * out and invalidate affected cache lines again if
1167 mips_dcache_wbinv_range(buf_cl, size_cl);
1168 if (size_clend && (size_cl == 0 ||
1169 buf_clend - buf_cl > mips_dcache_max_linesize))
1170 mips_dcache_wbinv_range(buf_clend, size_clend);
1173 case BUS_DMASYNC_PREWRITE:
1174 #ifdef BUS_DMA_FORCE_WBINV
1175 mips_dcache_wbinv_range(buf, len);
1177 mips_dcache_wb_range(buf, len);
1184 _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1186 struct bounce_page *bpage;
1188 STAILQ_FOREACH(bpage, &map->bpages, links) {
1189 if (op & BUS_DMASYNC_PREWRITE) {
1190 if (bpage->datavaddr != 0)
1191 bcopy((void *)bpage->datavaddr,
1192 (void *)(bpage->vaddr_nocache != 0 ?
1193 bpage->vaddr_nocache :
1197 physcopyout(bpage->dataaddr,
1198 (void *)(bpage->vaddr_nocache != 0 ?
1199 bpage->vaddr_nocache :
1202 if (bpage->vaddr_nocache == 0) {
1203 #ifdef BUS_DMA_FORCE_WBINV
1204 mips_dcache_wbinv_range(bpage->vaddr,
1207 mips_dcache_wb_range(bpage->vaddr,
1211 dmat->bounce_zone->total_bounced++;
1213 if (op & BUS_DMASYNC_POSTREAD) {
1214 if (bpage->vaddr_nocache == 0) {
1215 mips_dcache_inv_range(bpage->vaddr,
1218 if (bpage->datavaddr != 0)
1219 bcopy((void *)(bpage->vaddr_nocache != 0 ?
1220 bpage->vaddr_nocache : bpage->vaddr),
1221 (void *)bpage->datavaddr, bpage->datacount);
1223 physcopyin((void *)(bpage->vaddr_nocache != 0 ?
1224 bpage->vaddr_nocache : bpage->vaddr),
1225 bpage->dataaddr, bpage->datacount);
1226 dmat->bounce_zone->total_bounced++;
1232 _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1234 struct sync_list *sl, *end;
1237 if (op == BUS_DMASYNC_POSTWRITE)
1239 if (STAILQ_FIRST(&map->bpages))
1240 _bus_dmamap_sync_bp(dmat, map, op);
1242 if ((dmat->flags & BUS_DMA_COHERENT) ||
1243 (map->flags & DMAMAP_UNCACHEABLE)) {
1244 if (op & BUS_DMASYNC_PREWRITE)
1249 aligned = (map->flags & DMAMAP_CACHE_ALIGNED) ? 1 : 0;
1251 CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1252 if (map->sync_count) {
1253 end = &map->slist[map->sync_count];
1254 for (sl = &map->slist[0]; sl != end; sl++)
1255 bus_dmamap_sync_buf(sl->vaddr, sl->datacount, op,
1261 init_bounce_pages(void *dummy __unused)
1265 STAILQ_INIT(&bounce_zone_list);
1266 STAILQ_INIT(&bounce_map_waitinglist);
1267 STAILQ_INIT(&bounce_map_callbacklist);
1268 mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1270 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1272 static struct sysctl_ctx_list *
1273 busdma_sysctl_tree(struct bounce_zone *bz)
1275 return (&bz->sysctl_tree);
1278 static struct sysctl_oid *
1279 busdma_sysctl_tree_top(struct bounce_zone *bz)
1281 return (bz->sysctl_tree_top);
1285 alloc_bounce_zone(bus_dma_tag_t dmat)
1287 struct bounce_zone *bz;
1289 /* Check to see if we already have a suitable zone */
1290 STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1291 if ((dmat->alignment <= bz->alignment)
1292 && (dmat->lowaddr >= bz->lowaddr)) {
1293 dmat->bounce_zone = bz;
1298 if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_BUSDMA,
1299 M_NOWAIT | M_ZERO)) == NULL)
1302 STAILQ_INIT(&bz->bounce_page_list);
1303 bz->free_bpages = 0;
1304 bz->reserved_bpages = 0;
1305 bz->active_bpages = 0;
1306 bz->lowaddr = dmat->lowaddr;
1307 bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1309 snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1311 snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1312 STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1313 dmat->bounce_zone = bz;
1315 sysctl_ctx_init(&bz->sysctl_tree);
1316 bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1317 SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1319 if (bz->sysctl_tree_top == NULL) {
1320 sysctl_ctx_free(&bz->sysctl_tree);
1321 return (0); /* XXX error code? */
1324 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1325 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1326 "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1327 "Total bounce pages");
1328 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1329 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1330 "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1331 "Free bounce pages");
1332 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1333 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1334 "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1335 "Reserved bounce pages");
1336 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1337 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1338 "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1339 "Active bounce pages");
1340 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1341 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1342 "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1343 "Total bounce requests");
1344 SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1345 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1346 "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1347 "Total bounce requests that were deferred");
1348 SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1349 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1350 "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1351 SYSCTL_ADD_UAUTO(busdma_sysctl_tree(bz),
1352 SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1353 "alignment", CTLFLAG_RD, &bz->alignment, "");
1359 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1361 struct bounce_zone *bz;
1364 bz = dmat->bounce_zone;
1366 while (numpages > 0) {
1367 struct bounce_page *bpage;
1369 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_BUSDMA,
1374 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_BOUNCE,
1379 if (bpage->vaddr == 0) {
1380 free(bpage, M_BUSDMA);
1383 bpage->busaddr = pmap_kextract(bpage->vaddr);
1384 bpage->vaddr_nocache =
1385 (vm_offset_t)pmap_mapdev(bpage->busaddr, PAGE_SIZE);
1386 mtx_lock(&bounce_lock);
1387 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1391 mtx_unlock(&bounce_lock);
1399 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1401 struct bounce_zone *bz;
1404 mtx_assert(&bounce_lock, MA_OWNED);
1405 bz = dmat->bounce_zone;
1406 pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1407 if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1408 return (map->pagesneeded - (map->pagesreserved + pages));
1409 bz->free_bpages -= pages;
1410 bz->reserved_bpages += pages;
1411 map->pagesreserved += pages;
1412 pages = map->pagesneeded - map->pagesreserved;
1418 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1419 bus_addr_t addr, bus_size_t size)
1421 struct bounce_zone *bz;
1422 struct bounce_page *bpage;
1424 KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1425 KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1427 bz = dmat->bounce_zone;
1428 if (map->pagesneeded == 0)
1429 panic("add_bounce_page: map doesn't need any pages");
1432 if (map->pagesreserved == 0)
1433 panic("add_bounce_page: map doesn't need any pages");
1434 map->pagesreserved--;
1436 mtx_lock(&bounce_lock);
1437 bpage = STAILQ_FIRST(&bz->bounce_page_list);
1439 panic("add_bounce_page: free page list is empty");
1441 STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1442 bz->reserved_bpages--;
1443 bz->active_bpages++;
1444 mtx_unlock(&bounce_lock);
1446 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1447 /* Page offset needs to be preserved. */
1448 bpage->vaddr |= addr & PAGE_MASK;
1449 bpage->busaddr |= addr & PAGE_MASK;
1451 bpage->datavaddr = vaddr;
1452 bpage->dataaddr = addr;
1453 bpage->datacount = size;
1454 STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1455 return (bpage->busaddr);
1459 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1461 struct bus_dmamap *map;
1462 struct bounce_zone *bz;
1464 bz = dmat->bounce_zone;
1465 bpage->datavaddr = 0;
1466 bpage->datacount = 0;
1467 if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1469 * Reset the bounce page to start at offset 0. Other uses
1470 * of this bounce page may need to store a full page of
1471 * data and/or assume it starts on a page boundary.
1473 bpage->vaddr &= ~PAGE_MASK;
1474 bpage->busaddr &= ~PAGE_MASK;
1477 mtx_lock(&bounce_lock);
1478 STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1480 bz->active_bpages--;
1481 if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1482 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1483 STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1484 STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1486 busdma_swi_pending = 1;
1487 bz->total_deferred++;
1488 swi_sched(vm_ih, 0);
1491 mtx_unlock(&bounce_lock);
1498 struct bus_dmamap *map;
1500 mtx_lock(&bounce_lock);
1501 while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1502 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1503 mtx_unlock(&bounce_lock);
1505 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1506 bus_dmamap_load_mem(map->dmat, map, &map->mem, map->callback,
1507 map->callback_arg, BUS_DMA_WAITOK);
1508 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1509 mtx_lock(&bounce_lock);
1511 mtx_unlock(&bounce_lock);