2 * Copyright (c) 2004-2005, Juniper Networks, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * JNPR: db_trace.c,v 1.8 2007/08/09 11:23:32 katta
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
36 #include <sys/stack.h>
37 #include <sys/sysent.h>
39 #include <machine/asm.h>
40 #include <machine/db_machdep.h>
41 #include <machine/md_var.h>
42 #include <machine/mips_opcode.h>
43 #include <machine/pcb.h>
44 #include <machine/trap.h>
47 #include <ddb/db_sym.h>
49 extern char _locore[];
50 extern char _locoreEnd[];
54 * A function using a stack frame has the following instruction as the first
55 * one: [d]addiu sp,sp,-<frame_size>
57 * We make use of this to detect starting address of a function. This works
58 * better than using 'j ra' instruction to signify end of the previous
59 * function (for e.g. functions like boot() or panic() do not actually
60 * emit a 'j ra' instruction).
62 * XXX the abi does not require that the addiu instruction be the first one.
64 #define MIPS_START_OF_FUNCTION(ins) ((((ins) & 0xffff8000) == 0x27bd8000) \
65 || (((ins) & 0xffff8000) == 0x67bd8000))
68 * MIPS ABI 3.0 requires that all functions return using the 'j ra' instruction
70 * XXX gcc doesn't do this for functions with __noreturn__ attribute.
72 #define MIPS_END_OF_FUNCTION(ins) ((ins) == 0x03e00008)
74 #if defined(__mips_n64)
75 # define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \
76 ((vm_offset_t)(reg) >= MIPS_XKPHYS_START))
78 # define MIPS_IS_VALID_KERNELADDR(reg) ((((reg) & 3) == 0) && \
79 ((vm_offset_t)(reg) >= MIPS_KSEG0_START))
83 stacktrace_subr(register_t pc, register_t sp, register_t ra)
87 * Arrays for a0..a3 registers and flags if content
88 * of these registers is valid, e.g. obtained from the stack
92 register_t va, subr, cause, badvaddr;
94 unsigned int frames = 0;
99 /* Jump here when done with a frame, to start a new one */
103 * Invalidate arguments values
113 if (frames++ > 100) {
114 db_printf("\nstackframe count exceeded\n");
118 /* Check for bad SP: could foul up next frame. */
119 if (!MIPS_IS_VALID_KERNELADDR(sp)) {
120 db_printf("SP 0x%jx: not in kernel\n", (uintmax_t)sp);
125 #define Between(x, y, z) \
126 ( ((x) <= (y)) && ((y) < (z)) )
127 #define pcBetween(a,b) \
128 Between((uintptr_t)a, pc, (uintptr_t)b)
131 * Check for current PC in exception handler code that don't have a
132 * preceding "j ra" at the tail of the preceding function. Depends
133 * on relative ordering of functions in exception.S, swtch.S.
135 if (pcBetween(MipsKernGenException, MipsUserGenException)) {
136 subr = (uintptr_t)MipsKernGenException;
138 } else if (pcBetween(MipsUserGenException, MipsKernIntr))
139 subr = (uintptr_t)MipsUserGenException;
140 else if (pcBetween(MipsKernIntr, MipsUserIntr)) {
141 subr = (uintptr_t)MipsKernIntr;
143 } else if (pcBetween(MipsUserIntr, MipsTLBInvalidException))
144 subr = (uintptr_t)MipsUserIntr;
145 else if (pcBetween(MipsTLBInvalidException, MipsTLBMissException)) {
146 subr = (uintptr_t)MipsTLBInvalidException;
147 if (pc == (uintptr_t)MipsKStackOverflow)
149 } else if (pcBetween(fork_trampoline, savectx))
150 subr = (uintptr_t)fork_trampoline;
151 else if (pcBetween(savectx, cpu_throw))
152 subr = (uintptr_t)savectx;
153 else if (pcBetween(cpu_throw, cpu_switch))
154 subr = (uintptr_t)cpu_throw;
155 else if (pcBetween(cpu_switch, MipsSwitchFPState))
156 subr = (uintptr_t)cpu_switch;
157 else if (pcBetween(_locore, _locoreEnd)) {
158 subr = (uintptr_t)_locore;
163 /* Check for bad PC. */
164 if (!MIPS_IS_VALID_KERNELADDR(pc)) {
165 db_printf("PC 0x%jx: not in kernel\n", (uintmax_t)pc);
171 * For a trapframe, skip to the output and afterwards pull the
172 * previous registers out of the trapframe instead of decoding
173 * the function prologue.
179 * Find the beginning of the current subroutine by scanning
180 * backwards from the current PC for the end of the previous
184 va = pc - sizeof(int);
186 instr = kdbpeek((int *)va);
188 if (MIPS_START_OF_FUNCTION(instr))
191 if (MIPS_END_OF_FUNCTION(instr)) {
192 /* skip over branch-delay slot instruction */
193 va += 2 * sizeof(int);
200 /* skip over nulls which might separate .o files */
201 while ((instr = kdbpeek((int *)va)) == 0)
205 /* scan forwards to find stack size and any saved registers */
209 for (va = subr; more; va += sizeof(int),
210 more = (more == 3) ? 3 : more - 1) {
211 /* stop if hit our current position */
214 instr = kdbpeek((int *)va);
216 switch (i.JType.op) {
218 switch (i.RType.func) {
221 more = 2; /* stop after next instruction */
226 more = 1; /* stop now */
237 more = 2; /* stop after next instruction */
244 switch (i.RType.rs) {
247 more = 2; /* stop after next instruction */
252 /* look for saved registers on the stack */
253 if (i.IType.rs != 29)
256 * only restore the first one except RA for
257 * MipsKernGenException case
259 if (mask & (1 << i.IType.rt)) {
260 if (subr == (uintptr_t)MipsKernGenException &&
262 next_ra = kdbpeek((int *)(sp +
263 (short)i.IType.imm));
266 mask |= (1 << i.IType.rt);
267 switch (i.IType.rt) {
269 args[0] = kdbpeek((int *)(sp + (short)i.IType.imm));
274 args[1] = kdbpeek((int *)(sp + (short)i.IType.imm));
279 args[2] = kdbpeek((int *)(sp + (short)i.IType.imm));
284 args[3] = kdbpeek((int *)(sp + (short)i.IType.imm));
289 ra = kdbpeek((int *)(sp + (short)i.IType.imm));
294 /* look for saved registers on the stack */
295 if (i.IType.rs != 29)
297 /* only restore the first one */
298 if (mask & (1 << i.IType.rt))
300 mask |= (1 << i.IType.rt);
301 switch (i.IType.rt) {
303 args[0] = kdbpeekd((int *)(sp + (short)i.IType.imm));
308 args[1] = kdbpeekd((int *)(sp + (short)i.IType.imm));
313 args[2] = kdbpeekd((int *)(sp + (short)i.IType.imm));
318 args[3] = kdbpeekd((int *)(sp + (short)i.IType.imm));
323 ra = kdbpeekd((int *)(sp + (short)i.IType.imm));
331 /* look for stack pointer adjustment */
332 if (i.IType.rs != 29 || i.IType.rt != 29)
334 stksize = -((short)i.IType.imm);
339 db_printsym(pc, DB_STGY_PROC);
341 for (j = 0; j < 4; j ++) {
345 db_printf("%jx", (uintmax_t)(u_register_t)args[j]);
350 db_printf(") ra %jx sp %jx sz %d\n",
351 (uintmax_t)(u_register_t) ra,
352 (uintmax_t)(u_register_t) sp,
356 #define TF_REG(base, reg) ((base) + CALLFRAME_SIZ + ((reg) * SZREG))
357 #if defined(__mips_n64) || defined(__mips_n32)
358 pc = kdbpeekd((int *)TF_REG(sp, PC));
359 ra = kdbpeekd((int *)TF_REG(sp, RA));
360 sp = kdbpeekd((int *)TF_REG(sp, SP));
361 cause = kdbpeekd((int *)TF_REG(sp, CAUSE));
362 badvaddr = kdbpeekd((int *)TF_REG(sp, BADVADDR));
364 pc = kdbpeek((int *)TF_REG(sp, PC));
365 ra = kdbpeek((int *)TF_REG(sp, RA));
366 sp = kdbpeek((int *)TF_REG(sp, SP));
367 cause = kdbpeek((int *)TF_REG(sp, CAUSE));
368 badvaddr = kdbpeek((int *)TF_REG(sp, BADVADDR));
371 db_printf("--- exception, cause %jx badvaddr %jx ---\n",
372 (uintmax_t)cause, (uintmax_t)badvaddr);
375 if (pc == ra && stksize == 0)
376 db_printf("stacktrace: loop!\n");
388 db_md_set_watchpoint(db_expr_t addr, db_expr_t size)
396 db_md_clr_watchpoint(db_expr_t addr, db_expr_t size)
404 db_md_list_watchpoints()
411 register_t pc, ra, sp;
413 sp = (register_t)(intptr_t)__builtin_frame_address(0);
414 ra = (register_t)(intptr_t)__builtin_return_address(0);
420 "move %0, $31\n" /* get ra */
421 "move $31, %1\n" /* restore ra */
424 stacktrace_subr(pc, sp, ra);
429 db_trace_thread(struct thread *thr, int count)
431 register_t pc, ra, sp;
434 ctx = kdb_thr_ctx(thr);
435 sp = (register_t)ctx->pcb_context[PCB_REG_SP];
436 pc = (register_t)ctx->pcb_context[PCB_REG_PC];
437 ra = (register_t)ctx->pcb_context[PCB_REG_RA];
438 stacktrace_subr(pc, sp, ra);
444 db_show_mdpcpu(struct pcpu *pc)
447 db_printf("ipis = 0x%x\n", pc->pc_pending_ipis);
448 db_printf("next ASID = %d\n", pc->pc_next_asid);
449 db_printf("GENID = %d\n", pc->pc_asid_generation);