1 /* $OpenBSD: locore.S,v 1.18 1998/09/15 10:58:53 pefo Exp $ */
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
6 * This code is derived from software contributed to Berkeley by
7 * Digital Equipment Corporation and Ralph Campbell.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * Copyright (C) 1989 Digital Equipment Corporation.
34 * Permission to use, copy, modify, and distribute this software and
35 * its documentation for any purpose and without fee is hereby granted,
36 * provided that the above copyright notice appears in all copies.
37 * Digital Equipment Corporation makes no representations about the
38 * suitability of this software for any purpose. It is provided "as is"
39 * without express or implied warranty.
41 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/loMem.s,
42 * v 1.1 89/07/11 17:55:04 nelson Exp SPRITE (DECWRL)
43 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAsm.s,
44 * v 9.2 90/01/29 18:00:39 shirriff Exp SPRITE (DECWRL)
45 * from: Header: /sprite/src/kernel/vm/ds3100.md/vmPmaxAsm.s,
46 * v 1.1 89/07/10 14:27:41 nelson Exp SPRITE (DECWRL)
48 * from: @(#)locore.s 8.5 (Berkeley) 1/4/94
49 * JNPR: locore.S,v 1.6.2.1 2007/08/29 12:24:49 girish
54 * FREEBSD_DEVELOPERS_FIXME
55 * The start routine below was written for a multi-core CPU
56 * with each core being hyperthreaded. This serves as an example
57 * for a complex CPU architecture. For a different CPU complex
58 * please make necessary changes to read CPU-ID etc.
59 * A clean solution would be to have a different locore file for
64 * Contains code that is the first executed at boot time plus
65 * assembly language support routines.
68 #include <machine/asm.h>
69 #include <machine/cpu.h>
70 #include <machine/cpuregs.h>
71 #include <machine/regnum.h>
78 .space 4 # Assumes mips32? Is that OK?
87 VECTOR(_locore, unknown)
88 /* UNSAFE TO USE a0..a3, need to preserve the args from boot loader */
89 mtc0 zero, MIPS_COP_0_CAUSE # Clear soft interrupts
91 #if defined(CPU_CNMIPS)
93 * t1: Bits to set explicitly:
98 li t1, (MIPS_SR_COP_0_BIT | MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_SX | MIPS_SR_BEV)
100 /* Reset these bits */
101 li t0, ~(MIPS_SR_DE | MIPS_SR_SR | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS_SR_COP_2_BIT)
102 #elif defined (CPU_RMI) || defined (CPU_NLM)
104 li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX)
106 /* Reset these bits */
107 li t0, ~(MIPS_SR_BEV | MIPS_SR_SR | MIPS_SR_INT_IE)
110 * t0: Bits to preserve if set:
112 * Boot exception vectors (firmware-provided)
114 li t0, (MIPS_SR_BEV | MIPS_SR_SR)
116 * t1: Bits to set explicitly:
119 li t1, MIPS_SR_COP_1_BIT
121 or t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX
125 * Read coprocessor 0 status register, clear bits not
126 * preserved (namely, clearing interrupt bits), and set
127 * bits we want to explicitly set.
129 mfc0 t2, MIPS_COP_0_STATUS
132 mtc0 t2, MIPS_COP_0_STATUS
135 /* Make sure KSEG0 is cached */
136 li t0, MIPS_CCA_CACHED
137 mtc0 t0, MIPS_COP_0_CONFIG
141 * now that we pass a0...a3 to the platform_init routine, do we need
142 * to stash this stuff here?
145 /* Save YAMON boot environment pointer */
146 sw a2, _C_LABEL(fenvp)
149 #if defined(CPU_CNMIPS) && defined(SMP)
162 * Initialize stack and call machine startup.
164 PTR_LA sp, _C_LABEL(pcpu_space)
165 PTR_ADDU sp, (PAGE_SIZE * 2) - CALLFRAME_SIZ
167 REG_S zero, CALLFRAME_RA(sp) # Zero out old ra for debugger
168 REG_S zero, CALLFRAME_SP(sp) # Zero out old fp for debugger
170 PTR_LA gp, _C_LABEL(_gp)
172 /* Call the platform-specific startup code. */
173 jal _C_LABEL(platform_start)
176 PTR_LA sp, _C_LABEL(thread0)
180 PTR_SUBU sp, a0, CALLFRAME_SIZ
182 jal _C_LABEL(mi_startup) # mi_startup(frame)
183 sw zero, CALLFRAME_SIZ - 8(sp) # Zero out old fp for debugger
185 PANIC("Startup failed!")