2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 4. Neither the name of the University nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
34 * from: src/sys/i386/i386/machdep.c,v 1.385.2.3 2000/05/10 02:04:46 obrien
35 * JNPR: pm_machdep.c,v 1.9.2.1 2007/08/16 15:59:10 girish
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
41 #include "opt_compat.h"
43 #include <sys/types.h>
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/sysent.h>
48 #include <sys/signalvar.h>
50 #include <sys/imgact.h>
51 #include <sys/ucontext.h>
53 #include <sys/syscallsubr.h>
54 #include <sys/sysproto.h>
55 #include <sys/ptrace.h>
56 #include <sys/syslog.h>
59 #include <vm/vm_map.h>
60 #include <vm/vm_extern.h>
63 #include <machine/reg.h>
64 #include <machine/md_var.h>
65 #include <machine/sigframe.h>
66 #include <machine/tls.h>
67 #include <machine/vmparam.h>
68 #include <sys/vnode.h>
69 #include <fs/pseudofs/pseudofs.h>
70 #include <fs/procfs/procfs.h>
72 #define UCONTEXT_MAGIC 0xACEDBADE
75 * Send an interrupt to process.
77 * Stack is set up to allow sigcode stored
78 * at top to call routine, followed by kcall
79 * to sigreturn routine below. After sigreturn
80 * resets the signal mask, the stack, and the
81 * frame pointer, it returns to the user
85 sendsig(sig_t catcher, ksiginfo_t *ksi, sigset_t *mask)
89 struct trapframe *regs;
91 struct sigframe sf, *sfp;
97 PROC_LOCK_ASSERT(p, MA_OWNED);
100 mtx_assert(&psp->ps_mtx, MA_OWNED);
103 oonstack = sigonstack(regs->sp);
105 /* save user context */
106 bzero(&sf, sizeof(struct sigframe));
107 sf.sf_uc.uc_sigmask = *mask;
108 sf.sf_uc.uc_stack = td->td_sigstk;
109 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
110 sf.sf_uc.uc_mcontext.mc_pc = regs->pc;
111 sf.sf_uc.uc_mcontext.mullo = regs->mullo;
112 sf.sf_uc.uc_mcontext.mulhi = regs->mulhi;
113 sf.sf_uc.uc_mcontext.mc_tls = td->td_md.md_tls;
114 sf.sf_uc.uc_mcontext.mc_regs[0] = UCONTEXT_MAGIC; /* magic number */
115 bcopy((void *)®s->ast, (void *)&sf.sf_uc.uc_mcontext.mc_regs[1],
116 sizeof(sf.sf_uc.uc_mcontext.mc_regs) - sizeof(register_t));
117 sf.sf_uc.uc_mcontext.mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
118 if (sf.sf_uc.uc_mcontext.mc_fpused) {
119 /* if FPU has current state, save it first */
120 if (td == PCPU_GET(fpcurthread))
121 MipsSaveCurFPState(td);
122 bcopy((void *)&td->td_frame->f0,
123 (void *)sf.sf_uc.uc_mcontext.mc_fpregs,
124 sizeof(sf.sf_uc.uc_mcontext.mc_fpregs));
127 /* Allocate and validate space for the signal handler context. */
128 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !oonstack &&
129 SIGISMEMBER(psp->ps_sigonstack, sig)) {
130 sfp = (struct sigframe *)(((uintptr_t)td->td_sigstk.ss_sp +
131 td->td_sigstk.ss_size - sizeof(struct sigframe))
132 & ~(sizeof(__int64_t) - 1));
134 sfp = (struct sigframe *)((vm_offset_t)(regs->sp -
135 sizeof(struct sigframe)) & ~(sizeof(__int64_t) - 1));
137 /* Build the argument list for the signal handler. */
139 regs->a2 = (register_t)(intptr_t)&sfp->sf_uc;
140 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
141 /* Signal handler installed with SA_SIGINFO. */
142 regs->a1 = (register_t)(intptr_t)&sfp->sf_si;
143 /* sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher; */
145 /* fill siginfo structure */
146 sf.sf_si = ksi->ksi_info;
147 sf.sf_si.si_signo = sig;
148 sf.sf_si.si_code = ksi->ksi_code;
149 sf.sf_si.si_addr = (void*)(intptr_t)regs->badvaddr;
151 /* Old FreeBSD-style arguments. */
152 regs->a1 = ksi->ksi_code;
153 regs->a3 = regs->badvaddr;
154 /* sf.sf_ahu.sf_handler = catcher; */
157 mtx_unlock(&psp->ps_mtx);
161 * Copy the sigframe out to the user's stack.
163 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
165 * Something is wrong with the stack pointer.
166 * ...Kill the process.
172 regs->pc = (register_t)(intptr_t)catcher;
173 regs->t9 = (register_t)(intptr_t)catcher;
174 regs->sp = (register_t)(intptr_t)sfp;
176 * Signal trampoline code is at base of user stack.
178 regs->ra = (register_t)(intptr_t)PS_STRINGS - *(p->p_sysent->sv_szsigcode);
180 mtx_lock(&psp->ps_mtx);
184 * System call to cleanup state after a signal
185 * has been taken. Reset signal mask and
186 * stack state from context left by sendsig (above).
187 * Return to previous pc as specified by
188 * context left by sendsig.
191 sys_sigreturn(struct thread *td, struct sigreturn_args *uap)
196 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
200 error = set_mcontext(td, &uc.uc_mcontext);
204 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0);
206 return (EJUSTRETURN);
210 ptrace_set_pc(struct thread *td, unsigned long addr)
212 td->td_frame->pc = (register_t) addr;
217 ptrace_read_int(struct thread *td, off_t addr, int *v)
220 if (proc_readmem(td, td->td_proc, addr, v, sizeof(*v)) != sizeof(*v))
226 ptrace_write_int(struct thread *td, off_t addr, int v)
229 if (proc_writemem(td, td->td_proc, addr, &v, sizeof(v)) != sizeof(v))
235 ptrace_single_step(struct thread *td)
238 struct trapframe *locr0 = td->td_frame;
240 int bpinstr = MIPS_BREAK_SSTEP;
247 * Fetch what's at the current location.
249 ptrace_read_int(td, (off_t)locr0->pc, &curinstr);
251 /* compute next address after current location */
253 va = MipsEmulateBranch(locr0, locr0->pc, locr0->fsr,
254 (uintptr_t)&curinstr);
258 if (td->td_md.md_ss_addr) {
259 printf("SS %s (%d): breakpoint already set at %x (va %x)\n",
260 p->p_comm, p->p_pid, td->td_md.md_ss_addr, va); /* XXX */
263 td->td_md.md_ss_addr = va;
265 * Fetch what's at the current location.
267 ptrace_read_int(td, (off_t)va, &td->td_md.md_ss_instr);
270 * Store breakpoint instruction at the "next" location now.
272 i = ptrace_write_int (td, va, bpinstr);
275 * The sync'ing of I & D caches is done by procfs_domem()
276 * through procfs_rwmem().
283 printf("SS %s (%d): breakpoint set at %x: %x (pc %x) br %x\n",
284 p->p_comm, p->p_pid, p->p_md.md_ss_addr,
285 p->p_md.md_ss_instr, locr0->pc, curinstr); /* XXX */
292 makectx(struct trapframe *tf, struct pcb *pcb)
295 pcb->pcb_context[PCB_REG_RA] = tf->ra;
296 pcb->pcb_context[PCB_REG_PC] = tf->pc;
297 pcb->pcb_context[PCB_REG_SP] = tf->sp;
301 fill_regs(struct thread *td, struct reg *regs)
303 memcpy(regs, td->td_frame, sizeof(struct reg));
308 set_regs(struct thread *td, struct reg *regs)
313 f = (struct trapframe *) td->td_frame;
315 * Don't allow the user to change SR
318 memcpy(td->td_frame, regs, sizeof(struct reg));
324 get_mcontext(struct thread *td, mcontext_t *mcp, int flags)
326 struct trapframe *tp;
329 PROC_LOCK(curthread->td_proc);
330 mcp->mc_onstack = sigonstack(tp->sp);
331 PROC_UNLOCK(curthread->td_proc);
332 bcopy((void *)&td->td_frame->zero, (void *)&mcp->mc_regs,
333 sizeof(mcp->mc_regs));
335 mcp->mc_fpused = td->td_md.md_flags & MDTD_FPUSED;
336 if (mcp->mc_fpused) {
337 bcopy((void *)&td->td_frame->f0, (void *)&mcp->mc_fpregs,
338 sizeof(mcp->mc_fpregs));
340 if (flags & GET_MC_CLEAR_RET) {
341 mcp->mc_regs[V0] = 0;
342 mcp->mc_regs[V1] = 0;
343 mcp->mc_regs[A3] = 0;
346 mcp->mc_pc = td->td_frame->pc;
347 mcp->mullo = td->td_frame->mullo;
348 mcp->mulhi = td->td_frame->mulhi;
349 mcp->mc_tls = td->td_md.md_tls;
354 set_mcontext(struct thread *td, mcontext_t *mcp)
356 struct trapframe *tp;
359 bcopy((void *)&mcp->mc_regs, (void *)&td->td_frame->zero,
360 sizeof(mcp->mc_regs));
362 td->td_md.md_flags = mcp->mc_fpused & MDTD_FPUSED;
363 if (mcp->mc_fpused) {
364 bcopy((void *)&mcp->mc_fpregs, (void *)&td->td_frame->f0,
365 sizeof(mcp->mc_fpregs));
367 td->td_frame->pc = mcp->mc_pc;
368 td->td_frame->mullo = mcp->mullo;
369 td->td_frame->mulhi = mcp->mulhi;
370 td->td_md.md_tls = mcp->mc_tls;
371 /* Dont let user to set any bits in status and cause registers. */
377 fill_fpregs(struct thread *td, struct fpreg *fpregs)
379 if (td == PCPU_GET(fpcurthread))
380 MipsSaveCurFPState(td);
381 memcpy(fpregs, &td->td_frame->f0, sizeof(struct fpreg));
386 set_fpregs(struct thread *td, struct fpreg *fpregs)
388 if (PCPU_GET(fpcurthread) == td)
389 PCPU_SET(fpcurthread, (struct thread *)0);
390 memcpy(&td->td_frame->f0, fpregs, sizeof(struct fpreg));
396 * Clear registers on exec
397 * $sp is set to the stack pointer passed in. $pc is set to the entry
398 * point given by the exec_package passed in, as is $t9 (used for PIC
399 * code by the MIPS elf abi).
402 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
405 bzero((caddr_t)td->td_frame, sizeof(struct trapframe));
408 * The stack pointer has to be aligned to accommodate the largest
409 * datatype at minimum. This probably means it should be 16-byte
410 * aligned, but for now we're 8-byte aligning it.
412 td->td_frame->sp = ((register_t) stack) & ~(sizeof(__int64_t) - 1);
415 * If we're running o32 or n32 programs but have 64-bit registers,
416 * GCC may use stack-relative addressing near the top of user
417 * address space that, due to sign extension, will yield an
418 * invalid address. For instance, if sp is 0x7fffff00 then GCC
419 * might do something like this to load a word from 0x7ffffff0:
424 * On systems with 64-bit registers, sp is sign-extended to
425 * 0xffffffff80007f00 and the load is instead done from
426 * 0xffffffff7ffffff0.
428 * To prevent this, we subtract 64K from the stack pointer here.
430 * For consistency, we should just always do this unless we're
431 * running n64 programs. For now, since we don't support
432 * COMPAT_FREEBSD32 on n64 kernels, we just do it unless we're
433 * running n64 kernels.
435 #if !defined(__mips_n64)
436 td->td_frame->sp -= 65536;
439 td->td_frame->pc = imgp->entry_addr & ~3;
440 td->td_frame->t9 = imgp->entry_addr & ~3; /* abicall req */
441 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
442 (mips_rd_status() & MIPS_SR_INT_MASK);
443 #if defined(__mips_n32)
444 td->td_frame->sr |= MIPS_SR_PX;
445 #elif defined(__mips_n64)
446 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
449 * FREEBSD_DEVELOPERS_FIXME:
450 * Setup any other CPU-Specific registers (Not MIPS Standard)
451 * and/or bits in other standard MIPS registers (if CPU-Specific)
456 * Set up arguments for the rtld-capable crt0:
458 * a1 rtld cleanup (filled in by dynamic loader)
459 * a2 rtld object (filled in by dynamic loader)
462 td->td_frame->a0 = (register_t) stack;
463 td->td_frame->a1 = 0;
464 td->td_frame->a2 = 0;
465 td->td_frame->a3 = (register_t)imgp->ps_strings;
467 td->td_md.md_flags &= ~MDTD_FPUSED;
468 if (PCPU_GET(fpcurthread) == td)
469 PCPU_SET(fpcurthread, (struct thread *)0);
470 td->td_md.md_ss_addr = 0;
472 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
476 ptrace_clear_single_step(struct thread *td)
482 PROC_LOCK_ASSERT(p, MA_OWNED);
483 if (!td->td_md.md_ss_addr)
487 * Restore original instruction and clear BP
489 i = ptrace_write_int (td, td->td_md.md_ss_addr, td->td_md.md_ss_instr);
491 /* The sync'ing of I & D caches is done by procfs_domem(). */
494 log(LOG_ERR, "SS %s %d: can't restore instruction at %x: %x\n",
495 p->p_comm, p->p_pid, td->td_md.md_ss_addr,
496 td->td_md.md_ss_instr);
498 td->td_md.md_ss_addr = 0;