2 * Copyright (c) 1991 Regents of the University of California.
4 * Copyright (c) 1994 John S. Dyson
6 * Copyright (c) 1994 David Greenman
9 * This code is derived from software contributed to Berkeley by
10 * the Systems Programming Group of the University of Utah Computer
11 * Science Department and William Jolitz of UUNET Technologies Inc.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)pmap.c 7.7 (Berkeley) 5/12/91
38 * from: src/sys/i386/i386/pmap.c,v 1.250.2.8 2000/11/21 00:09:14 ps
39 * JNPR: pmap.c,v 1.11.2.1 2007/08/16 11:51:06 girish
43 * Manages physical address maps.
45 * Since the information managed by this module is
46 * also stored by the logical address mapping module,
47 * this module may throw away valid virtual-to-physical
48 * mappings at almost any time. However, invalidations
49 * of virtual-to-physical mappings must be done as
52 * In order to cope with hardware architectures which
53 * make virtual-to-physical map invalidates expensive,
54 * this module may delay invalidate or reduced protection
55 * operations until such time as they are actually
56 * necessary. This module is given full information as
57 * to which processors are currently using which maps,
58 * and to when physical maps must be made correct.
61 #include <sys/cdefs.h>
62 __FBSDID("$FreeBSD$");
67 #include <sys/param.h>
68 #include <sys/systm.h>
71 #include <sys/msgbuf.h>
72 #include <sys/mutex.h>
75 #include <sys/rwlock.h>
76 #include <sys/sched.h>
80 #include <sys/cpuset.h>
82 #include <sys/sysctl.h>
83 #include <sys/vmmeter.h>
90 #include <vm/vm_param.h>
91 #include <vm/vm_kern.h>
92 #include <vm/vm_page.h>
93 #include <vm/vm_map.h>
94 #include <vm/vm_object.h>
95 #include <vm/vm_extern.h>
96 #include <vm/vm_pageout.h>
97 #include <vm/vm_pager.h>
100 #include <machine/cache.h>
101 #include <machine/md_var.h>
102 #include <machine/tlb.h>
106 #if !defined(DIAGNOSTIC)
107 #define PMAP_INLINE __inline
113 #define PV_STAT(x) do { x ; } while (0)
115 #define PV_STAT(x) do { } while (0)
119 * Get PDEs and PTEs for user/kernel address space
121 #define pmap_seg_index(v) (((v) >> SEGSHIFT) & (NPDEPG - 1))
122 #define pmap_pde_index(v) (((v) >> PDRSHIFT) & (NPDEPG - 1))
123 #define pmap_pte_index(v) (((v) >> PAGE_SHIFT) & (NPTEPG - 1))
124 #define pmap_pde_pindex(v) ((v) >> PDRSHIFT)
127 #define NUPDE (NPDEPG * NPDEPG)
128 #define NUSERPGTBLS (NUPDE + NPDEPG)
130 #define NUPDE (NPDEPG)
131 #define NUSERPGTBLS (NUPDE)
134 #define is_kernel_pmap(x) ((x) == kernel_pmap)
136 struct pmap kernel_pmap_store;
137 pd_entry_t *kernel_segmap;
139 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
140 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
143 unsigned pmap_max_asid; /* max ASID supported by the system */
145 #define PMAP_ASID_RESERVED 0
147 vm_offset_t kernel_vm_end = VM_MIN_KERNEL_ADDRESS;
149 static void pmap_asid_alloc(pmap_t pmap);
151 static struct rwlock_padalign pvh_global_lock;
154 * Data for the pv entry allocation mechanism
156 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
157 static int pv_entry_count;
159 static void free_pv_chunk(struct pv_chunk *pc);
160 static void free_pv_entry(pmap_t pmap, pv_entry_t pv);
161 static pv_entry_t get_pv_entry(pmap_t pmap, boolean_t try);
162 static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap);
163 static void pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va);
164 static pv_entry_t pmap_pvh_remove(struct md_page *pvh, pmap_t pmap,
166 static vm_page_t pmap_alloc_direct_page(unsigned int index, int req);
167 static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va,
168 vm_page_t m, vm_prot_t prot, vm_page_t mpte);
169 static int pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
171 static void pmap_remove_page(struct pmap *pmap, vm_offset_t va);
172 static void pmap_remove_entry(struct pmap *pmap, vm_page_t m, vm_offset_t va);
173 static boolean_t pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte,
174 vm_offset_t va, vm_page_t m);
175 static void pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte);
176 static void pmap_invalidate_all(pmap_t pmap);
177 static void pmap_invalidate_page(pmap_t pmap, vm_offset_t va);
178 static void _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m);
180 static vm_page_t pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags);
181 static vm_page_t _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags);
182 static int pmap_unuse_pt(pmap_t, vm_offset_t, pd_entry_t);
183 static pt_entry_t init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot);
185 static void pmap_invalidate_page_action(void *arg);
186 static void pmap_invalidate_range_action(void *arg);
187 static void pmap_update_page_action(void *arg);
191 * This structure is for high memory (memory above 512Meg in 32 bit) support.
192 * The highmem area does not have a KSEG0 mapping, and we need a mechanism to
193 * do temporary per-CPU mappings for pmap_zero_page, pmap_copy_page etc.
195 * At bootup, we reserve 2 virtual pages per CPU for mapping highmem pages. To
196 * access a highmem physical address on a CPU, we map the physical address to
197 * the reserved virtual address for the CPU in the kernel pagetable. This is
198 * done with interrupts disabled(although a spinlock and sched_pin would be
201 struct local_sysmaps {
204 uint16_t valid1, valid2;
206 static struct local_sysmaps sysmap_lmem[MAXCPU];
209 pmap_alloc_lmem_map(void)
213 for (i = 0; i < MAXCPU; i++) {
214 sysmap_lmem[i].base = virtual_avail;
215 virtual_avail += PAGE_SIZE * 2;
216 sysmap_lmem[i].valid1 = sysmap_lmem[i].valid2 = 0;
220 static __inline vm_offset_t
221 pmap_lmem_map1(vm_paddr_t phys)
223 struct local_sysmaps *sysm;
224 pt_entry_t *pte, npte;
229 intr = intr_disable();
230 cpu = PCPU_GET(cpuid);
231 sysm = &sysmap_lmem[cpu];
232 sysm->saved_intr = intr;
234 npte = TLBLO_PA_TO_PFN(phys) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
235 pte = pmap_pte(kernel_pmap, va);
241 static __inline vm_offset_t
242 pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2)
244 struct local_sysmaps *sysm;
245 pt_entry_t *pte, npte;
246 vm_offset_t va1, va2;
250 intr = intr_disable();
251 cpu = PCPU_GET(cpuid);
252 sysm = &sysmap_lmem[cpu];
253 sysm->saved_intr = intr;
255 va2 = sysm->base + PAGE_SIZE;
256 npte = TLBLO_PA_TO_PFN(phys1) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
257 pte = pmap_pte(kernel_pmap, va1);
259 npte = TLBLO_PA_TO_PFN(phys2) | PTE_C_CACHE | PTE_D | PTE_V | PTE_G;
260 pte = pmap_pte(kernel_pmap, va2);
268 pmap_lmem_unmap(void)
270 struct local_sysmaps *sysm;
274 cpu = PCPU_GET(cpuid);
275 sysm = &sysmap_lmem[cpu];
276 pte = pmap_pte(kernel_pmap, sysm->base);
278 tlb_invalidate_address(kernel_pmap, sysm->base);
281 pte = pmap_pte(kernel_pmap, sysm->base + PAGE_SIZE);
283 tlb_invalidate_address(kernel_pmap, sysm->base + PAGE_SIZE);
286 intr_restore(sysm->saved_intr);
288 #else /* __mips_n64 */
291 pmap_alloc_lmem_map(void)
295 static __inline vm_offset_t
296 pmap_lmem_map1(vm_paddr_t phys)
302 static __inline vm_offset_t
303 pmap_lmem_map2(vm_paddr_t phys1, vm_paddr_t phys2)
309 static __inline vm_offset_t
310 pmap_lmem_unmap(void)
315 #endif /* !__mips_n64 */
318 * Page table entry lookup routines.
320 static __inline pd_entry_t *
321 pmap_segmap(pmap_t pmap, vm_offset_t va)
324 return (&pmap->pm_segtab[pmap_seg_index(va)]);
328 static __inline pd_entry_t *
329 pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va)
333 pde = (pd_entry_t *)*pdpe;
334 return (&pde[pmap_pde_index(va)]);
337 static __inline pd_entry_t *
338 pmap_pde(pmap_t pmap, vm_offset_t va)
342 pdpe = pmap_segmap(pmap, va);
346 return (pmap_pdpe_to_pde(pdpe, va));
349 static __inline pd_entry_t *
350 pmap_pdpe_to_pde(pd_entry_t *pdpe, vm_offset_t va)
357 pd_entry_t *pmap_pde(pmap_t pmap, vm_offset_t va)
360 return (pmap_segmap(pmap, va));
364 static __inline pt_entry_t *
365 pmap_pde_to_pte(pd_entry_t *pde, vm_offset_t va)
369 pte = (pt_entry_t *)*pde;
370 return (&pte[pmap_pte_index(va)]);
374 pmap_pte(pmap_t pmap, vm_offset_t va)
378 pde = pmap_pde(pmap, va);
379 if (pde == NULL || *pde == NULL)
382 return (pmap_pde_to_pte(pde, va));
386 pmap_steal_memory(vm_size_t size)
388 vm_paddr_t bank_size, pa;
391 size = round_page(size);
392 bank_size = phys_avail[1] - phys_avail[0];
393 while (size > bank_size) {
396 for (i = 0; phys_avail[i + 2]; i += 2) {
397 phys_avail[i] = phys_avail[i + 2];
398 phys_avail[i + 1] = phys_avail[i + 3];
401 phys_avail[i + 1] = 0;
403 panic("pmap_steal_memory: out of memory");
404 bank_size = phys_avail[1] - phys_avail[0];
408 phys_avail[0] += size;
409 if (MIPS_DIRECT_MAPPABLE(pa) == 0)
410 panic("Out of memory below 512Meg?");
411 va = MIPS_PHYS_TO_DIRECT(pa);
412 bzero((caddr_t)va, size);
417 * Bootstrap the system enough to run with virtual memory. This
418 * assumes that the phys_avail array has been initialized.
421 pmap_create_kernel_pagetable(void)
433 * Allocate segment table for the kernel
435 kernel_segmap = (pd_entry_t *)pmap_steal_memory(PAGE_SIZE);
438 * Allocate second level page tables for the kernel
441 npde = howmany(NKPT, NPDEPG);
442 pdaddr = pmap_steal_memory(PAGE_SIZE * npde);
445 ptaddr = pmap_steal_memory(PAGE_SIZE * nkpt);
448 * The R[4-7]?00 stores only one copy of the Global bit in the
449 * translation lookaside buffer for each 2 page entry. Thus invalid
450 * entrys must have the Global bit set so when Entry LO and Entry HI
451 * G bits are anded together they will produce a global bit to store
454 for (i = 0, pte = (pt_entry_t *)ptaddr; i < (nkpt * NPTEPG); i++, pte++)
458 for (i = 0, npt = nkpt; npt > 0; i++) {
459 kernel_segmap[i] = (pd_entry_t)(pdaddr + i * PAGE_SIZE);
460 pde = (pd_entry_t *)kernel_segmap[i];
462 for (j = 0; j < NPDEPG && npt > 0; j++, npt--)
463 pde[j] = (pd_entry_t)(ptaddr + (i * NPDEPG + j) * PAGE_SIZE);
466 for (i = 0, j = pmap_seg_index(VM_MIN_KERNEL_ADDRESS); i < nkpt; i++, j++)
467 kernel_segmap[j] = (pd_entry_t)(ptaddr + (i * PAGE_SIZE));
470 PMAP_LOCK_INIT(kernel_pmap);
471 kernel_pmap->pm_segtab = kernel_segmap;
472 CPU_FILL(&kernel_pmap->pm_active);
473 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
474 kernel_pmap->pm_asid[0].asid = PMAP_ASID_RESERVED;
475 kernel_pmap->pm_asid[0].gen = 0;
476 kernel_vm_end += nkpt * NPTEPG * PAGE_SIZE;
483 int need_local_mappings = 0;
487 for (i = 0; phys_avail[i + 1] != 0; i += 2) {
489 * Keep the memory aligned on page boundary.
491 phys_avail[i] = round_page(phys_avail[i]);
492 phys_avail[i + 1] = trunc_page(phys_avail[i + 1]);
496 if (phys_avail[i - 2] > phys_avail[i]) {
499 ptemp[0] = phys_avail[i + 0];
500 ptemp[1] = phys_avail[i + 1];
502 phys_avail[i + 0] = phys_avail[i - 2];
503 phys_avail[i + 1] = phys_avail[i - 1];
505 phys_avail[i - 2] = ptemp[0];
506 phys_avail[i - 1] = ptemp[1];
512 * In 32 bit, we may have memory which cannot be mapped directly.
513 * This memory will need temporary mapping before it can be
516 if (!MIPS_DIRECT_MAPPABLE(phys_avail[i - 1] - 1))
517 need_local_mappings = 1;
520 * Copy the phys_avail[] array before we start stealing memory from it.
522 for (i = 0; phys_avail[i + 1] != 0; i += 2) {
523 physmem_desc[i] = phys_avail[i];
524 physmem_desc[i + 1] = phys_avail[i + 1];
527 Maxmem = atop(phys_avail[i - 1]);
530 printf("Physical memory chunk(s):\n");
531 for (i = 0; phys_avail[i + 1] != 0; i += 2) {
534 size = phys_avail[i + 1] - phys_avail[i];
535 printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n",
536 (uintmax_t) phys_avail[i],
537 (uintmax_t) phys_avail[i + 1] - 1,
538 (uintmax_t) size, (uintmax_t) size / PAGE_SIZE);
540 printf("Maxmem is 0x%0jx\n", ptoa((uintmax_t)Maxmem));
543 * Steal the message buffer from the beginning of memory.
545 msgbufp = (struct msgbuf *)pmap_steal_memory(msgbufsize);
546 msgbufinit(msgbufp, msgbufsize);
549 * Steal thread0 kstack.
551 kstack0 = pmap_steal_memory(KSTACK_PAGES << PAGE_SHIFT);
553 virtual_avail = VM_MIN_KERNEL_ADDRESS;
554 virtual_end = VM_MAX_KERNEL_ADDRESS;
558 * Steal some virtual address space to map the pcpu area.
560 virtual_avail = roundup2(virtual_avail, PAGE_SIZE * 2);
561 pcpup = (struct pcpu *)virtual_avail;
562 virtual_avail += PAGE_SIZE * 2;
565 * Initialize the wired TLB entry mapping the pcpu region for
566 * the BSP at 'pcpup'. Up until this point we were operating
567 * with the 'pcpup' for the BSP pointing to a virtual address
568 * in KSEG0 so there was no need for a TLB mapping.
570 mips_pcpu_tlb_init(PCPU_ADDR(0));
573 printf("pcpu is available at virtual address %p.\n", pcpup);
576 if (need_local_mappings)
577 pmap_alloc_lmem_map();
578 pmap_create_kernel_pagetable();
579 pmap_max_asid = VMNUM_PIDS;
584 * Initialize the global pv list lock.
586 rw_init(&pvh_global_lock, "pmap pv global");
590 * Initialize a vm_page's machine-dependent fields.
593 pmap_page_init(vm_page_t m)
596 TAILQ_INIT(&m->md.pv_list);
601 * Initialize the pmap module.
602 * Called by vm_init, to initialize any structures that the pmap
603 * system needs to map virtual memory.
610 /***************************************************
611 * Low level helper routines.....
612 ***************************************************/
616 pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg)
618 int cpuid, cpu, self;
619 cpuset_t active_cpus;
622 if (is_kernel_pmap(pmap)) {
623 smp_rendezvous(NULL, fn, NULL, arg);
626 /* Force ASID update on inactive CPUs */
628 if (!CPU_ISSET(cpu, &pmap->pm_active))
629 pmap->pm_asid[cpu].gen = 0;
631 cpuid = PCPU_GET(cpuid);
633 * XXX: barrier/locking for active?
635 * Take a snapshot of active here, any further changes are ignored.
636 * tlb update/invalidate should be harmless on inactive CPUs
638 active_cpus = pmap->pm_active;
639 self = CPU_ISSET(cpuid, &active_cpus);
640 CPU_CLR(cpuid, &active_cpus);
641 /* Optimize for the case where this cpu is the only active one */
642 if (CPU_EMPTY(&active_cpus)) {
647 CPU_SET(cpuid, &active_cpus);
648 smp_rendezvous_cpus(active_cpus, NULL, fn, NULL, arg);
655 pmap_call_on_active_cpus(pmap_t pmap, void (*fn)(void *), void *arg)
659 if (is_kernel_pmap(pmap)) {
663 cpuid = PCPU_GET(cpuid);
664 if (!CPU_ISSET(cpuid, &pmap->pm_active))
665 pmap->pm_asid[cpuid].gen = 0;
672 pmap_invalidate_all(pmap_t pmap)
675 pmap_call_on_active_cpus(pmap,
676 (void (*)(void *))tlb_invalidate_all_user, pmap);
679 struct pmap_invalidate_page_arg {
685 pmap_invalidate_page_action(void *arg)
687 struct pmap_invalidate_page_arg *p = arg;
689 tlb_invalidate_address(p->pmap, p->va);
693 pmap_invalidate_page(pmap_t pmap, vm_offset_t va)
695 struct pmap_invalidate_page_arg arg;
699 pmap_call_on_active_cpus(pmap, pmap_invalidate_page_action, &arg);
702 struct pmap_invalidate_range_arg {
709 pmap_invalidate_range_action(void *arg)
711 struct pmap_invalidate_range_arg *p = arg;
713 tlb_invalidate_range(p->pmap, p->sva, p->eva);
717 pmap_invalidate_range(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
719 struct pmap_invalidate_range_arg arg;
724 pmap_call_on_active_cpus(pmap, pmap_invalidate_range_action, &arg);
727 struct pmap_update_page_arg {
734 pmap_update_page_action(void *arg)
736 struct pmap_update_page_arg *p = arg;
738 tlb_update(p->pmap, p->va, p->pte);
742 pmap_update_page(pmap_t pmap, vm_offset_t va, pt_entry_t pte)
744 struct pmap_update_page_arg arg;
749 pmap_call_on_active_cpus(pmap, pmap_update_page_action, &arg);
753 * Routine: pmap_extract
755 * Extract the physical page address associated
756 * with the given map/virtual_address pair.
759 pmap_extract(pmap_t pmap, vm_offset_t va)
762 vm_offset_t retval = 0;
765 pte = pmap_pte(pmap, va);
767 retval = TLBLO_PTE_TO_PA(*pte) | (va & PAGE_MASK);
774 * Routine: pmap_extract_and_hold
776 * Atomically extract and hold the physical page
777 * with the given pmap and virtual address pair
778 * if that mapping permits the given protection.
781 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
783 pt_entry_t pte, *ptep;
784 vm_paddr_t pa, pte_pa;
791 ptep = pmap_pte(pmap, va);
794 if (pte_test(&pte, PTE_V) && (!pte_test(&pte, PTE_RO) ||
795 (prot & VM_PROT_WRITE) == 0)) {
796 pte_pa = TLBLO_PTE_TO_PA(pte);
797 if (vm_page_pa_tryrelock(pmap, pte_pa, &pa))
799 m = PHYS_TO_VM_PAGE(pte_pa);
808 /***************************************************
809 * Low level mapping routines.....
810 ***************************************************/
813 * add a wired page to the kva
816 pmap_kenter_attr(vm_offset_t va, vm_paddr_t pa, int attr)
819 pt_entry_t opte, npte;
822 printf("pmap_kenter: va: %p -> pa: %p\n", (void *)va, (void *)pa);
825 pte = pmap_pte(kernel_pmap, va);
827 npte = TLBLO_PA_TO_PFN(pa) | attr | PTE_D | PTE_V | PTE_G;
829 if (pte_test(&opte, PTE_V) && opte != npte)
830 pmap_update_page(kernel_pmap, va, npte);
834 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
837 KASSERT(is_cacheable_mem(pa),
838 ("pmap_kenter: memory at 0x%lx is not cacheable", (u_long)pa));
840 pmap_kenter_attr(va, pa, PTE_C_CACHE);
844 * remove a page from the kernel pagetables
846 /* PMAP_INLINE */ void
847 pmap_kremove(vm_offset_t va)
852 * Write back all caches from the page being destroyed
854 mips_dcache_wbinv_range_index(va, PAGE_SIZE);
856 pte = pmap_pte(kernel_pmap, va);
858 pmap_invalidate_page(kernel_pmap, va);
862 * Used to map a range of physical addresses into kernel
863 * virtual address space.
865 * The value passed in '*virt' is a suggested virtual address for
866 * the mapping. Architectures which can support a direct-mapped
867 * physical to virtual region can return the appropriate address
868 * within that region, leaving '*virt' unchanged. Other
869 * architectures should map the pages starting at '*virt' and
870 * update '*virt' with the first usable address after the mapped
873 * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
876 pmap_map(vm_offset_t *virt, vm_paddr_t start, vm_paddr_t end, int prot)
880 if (MIPS_DIRECT_MAPPABLE(end - 1))
881 return (MIPS_PHYS_TO_DIRECT(start));
884 while (start < end) {
885 pmap_kenter(va, start);
894 * Add a list of wired pages to the kva
895 * this routine is only used for temporary
896 * kernel mappings that do not need to have
897 * page modification or references recorded.
898 * Note that old mappings are simply written
899 * over. The page *must* be wired.
902 pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
905 vm_offset_t origva = va;
907 for (i = 0; i < count; i++) {
908 pmap_flush_pvcache(m[i]);
909 pmap_kenter(va, VM_PAGE_TO_PHYS(m[i]));
913 mips_dcache_wbinv_range_index(origva, PAGE_SIZE*count);
917 * this routine jerks page mappings from the
918 * kernel -- it is meant only for temporary mappings.
921 pmap_qremove(vm_offset_t va, int count)
928 mips_dcache_wbinv_range_index(va, PAGE_SIZE * count);
931 pte = pmap_pte(kernel_pmap, va);
934 } while (--count > 0);
935 pmap_invalidate_range(kernel_pmap, origva, va);
938 /***************************************************
939 * Page table page management routines.....
940 ***************************************************/
943 * Decrements a page table page's wire count, which is used to record the
944 * number of valid page table entries within the page. If the wire count
945 * drops to zero, then the page table page is unmapped. Returns TRUE if the
946 * page table page was unmapped and FALSE otherwise.
948 static PMAP_INLINE boolean_t
949 pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m)
953 if (m->wire_count == 0) {
954 _pmap_unwire_ptp(pmap, va, m);
961 _pmap_unwire_ptp(pmap_t pmap, vm_offset_t va, vm_page_t m)
965 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
967 * unmap the page table page
970 if (m->pindex < NUPDE)
971 pde = pmap_pde(pmap, va);
973 pde = pmap_segmap(pmap, va);
975 pde = pmap_pde(pmap, va);
978 pmap->pm_stats.resident_count--;
981 if (m->pindex < NUPDE) {
986 * Recursively decrement next level pagetable refcount
988 pdp = (pd_entry_t *)*pmap_segmap(pmap, va);
989 pdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pdp));
990 pmap_unwire_ptp(pmap, va, pdpg);
995 * If the page is finally unwired, simply free it.
997 vm_page_free_zero(m);
998 atomic_subtract_int(&cnt.v_wire_count, 1);
1002 * After removing a page table entry, this routine is used to
1003 * conditionally free the page, and manage the hold/wire counts.
1006 pmap_unuse_pt(pmap_t pmap, vm_offset_t va, pd_entry_t pde)
1010 if (va >= VM_MAXUSER_ADDRESS)
1012 KASSERT(pde != 0, ("pmap_unuse_pt: pde != 0"));
1013 mpte = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(pde));
1014 return (pmap_unwire_ptp(pmap, va, mpte));
1018 pmap_pinit0(pmap_t pmap)
1022 PMAP_LOCK_INIT(pmap);
1023 pmap->pm_segtab = kernel_segmap;
1024 CPU_ZERO(&pmap->pm_active);
1025 for (i = 0; i < MAXCPU; i++) {
1026 pmap->pm_asid[i].asid = PMAP_ASID_RESERVED;
1027 pmap->pm_asid[i].gen = 0;
1029 PCPU_SET(curpmap, pmap);
1030 TAILQ_INIT(&pmap->pm_pvchunk);
1031 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1035 pmap_grow_direct_page_cache()
1039 vm_pageout_grow_cache(3, 0, MIPS_XKPHYS_LARGEST_PHYS);
1041 vm_pageout_grow_cache(3, 0, MIPS_KSEG0_LARGEST_PHYS);
1046 pmap_alloc_direct_page(unsigned int index, int req)
1050 m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, req | VM_ALLOC_WIRED |
1055 if ((m->flags & PG_ZERO) == 0)
1063 * Initialize a preallocated and zeroed pmap structure,
1064 * such as one in a vmspace structure.
1067 pmap_pinit(pmap_t pmap)
1074 * allocate the page directory page
1076 while ((ptdpg = pmap_alloc_direct_page(NUSERPGTBLS, VM_ALLOC_NORMAL)) == NULL)
1077 pmap_grow_direct_page_cache();
1079 ptdva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(ptdpg));
1080 pmap->pm_segtab = (pd_entry_t *)ptdva;
1081 CPU_ZERO(&pmap->pm_active);
1082 for (i = 0; i < MAXCPU; i++) {
1083 pmap->pm_asid[i].asid = PMAP_ASID_RESERVED;
1084 pmap->pm_asid[i].gen = 0;
1086 TAILQ_INIT(&pmap->pm_pvchunk);
1087 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
1093 * this routine is called if the page table page is not
1097 _pmap_allocpte(pmap_t pmap, unsigned ptepindex, int flags)
1102 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1103 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1104 ("_pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1107 * Find or fabricate a new pagetable page
1109 if ((m = pmap_alloc_direct_page(ptepindex, VM_ALLOC_NORMAL)) == NULL) {
1110 if (flags & M_WAITOK) {
1112 rw_wunlock(&pvh_global_lock);
1113 pmap_grow_direct_page_cache();
1114 rw_wlock(&pvh_global_lock);
1119 * Indicate the need to retry. While waiting, the page
1120 * table page may have been allocated.
1126 * Map the pagetable page into the process address space, if it
1127 * isn't already there.
1129 pageva = MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
1132 if (ptepindex >= NUPDE) {
1133 pmap->pm_segtab[ptepindex - NUPDE] = (pd_entry_t)pageva;
1135 pd_entry_t *pdep, *pde;
1136 int segindex = ptepindex >> (SEGSHIFT - PDRSHIFT);
1137 int pdeindex = ptepindex & (NPDEPG - 1);
1140 pdep = &pmap->pm_segtab[segindex];
1141 if (*pdep == NULL) {
1142 /* recurse for allocating page dir */
1143 if (_pmap_allocpte(pmap, NUPDE + segindex,
1145 /* alloc failed, release current */
1147 atomic_subtract_int(&cnt.v_wire_count, 1);
1148 vm_page_free_zero(m);
1152 pg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pdep));
1155 /* Next level entry */
1156 pde = (pd_entry_t *)*pdep;
1157 pde[pdeindex] = (pd_entry_t)pageva;
1160 pmap->pm_segtab[ptepindex] = (pd_entry_t)pageva;
1162 pmap->pm_stats.resident_count++;
1167 pmap_allocpte(pmap_t pmap, vm_offset_t va, int flags)
1173 KASSERT((flags & (M_NOWAIT | M_WAITOK)) == M_NOWAIT ||
1174 (flags & (M_NOWAIT | M_WAITOK)) == M_WAITOK,
1175 ("pmap_allocpte: flags is neither M_NOWAIT nor M_WAITOK"));
1178 * Calculate pagetable page index
1180 ptepindex = pmap_pde_pindex(va);
1183 * Get the page directory entry
1185 pde = pmap_pde(pmap, va);
1188 * If the page table page is mapped, we just increment the hold
1189 * count, and activate it.
1191 if (pde != NULL && *pde != NULL) {
1192 m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(*pde));
1196 * Here if the pte page isn't mapped, or if it has been
1199 m = _pmap_allocpte(pmap, ptepindex, flags);
1200 if (m == NULL && (flags & M_WAITOK))
1207 /***************************************************
1208 * Pmap allocation/deallocation routines.
1209 ***************************************************/
1212 * Release any resources held by the given physical map.
1213 * Called when a pmap initialized by pmap_pinit is being released.
1214 * Should only be called if the map contains no valid mappings.
1217 pmap_release(pmap_t pmap)
1222 KASSERT(pmap->pm_stats.resident_count == 0,
1223 ("pmap_release: pmap resident count %ld != 0",
1224 pmap->pm_stats.resident_count));
1226 ptdva = (vm_offset_t)pmap->pm_segtab;
1227 ptdpg = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(ptdva));
1229 ptdpg->wire_count--;
1230 atomic_subtract_int(&cnt.v_wire_count, 1);
1231 vm_page_free_zero(ptdpg);
1235 * grow the number of kernel page table entries, if needed
1238 pmap_growkernel(vm_offset_t addr)
1241 pd_entry_t *pde, *pdpe;
1245 mtx_assert(&kernel_map->system_mtx, MA_OWNED);
1246 addr = roundup2(addr, NBSEG);
1247 if (addr - 1 >= kernel_map->max_offset)
1248 addr = kernel_map->max_offset;
1249 while (kernel_vm_end < addr) {
1250 pdpe = pmap_segmap(kernel_pmap, kernel_vm_end);
1253 /* new intermediate page table entry */
1254 nkpg = pmap_alloc_direct_page(nkpt, VM_ALLOC_INTERRUPT);
1256 panic("pmap_growkernel: no memory to grow kernel");
1257 *pdpe = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg));
1258 continue; /* try again */
1261 pde = pmap_pdpe_to_pde(pdpe, kernel_vm_end);
1263 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1264 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1265 kernel_vm_end = kernel_map->max_offset;
1272 * This index is bogus, but out of the way
1274 nkpg = pmap_alloc_direct_page(nkpt, VM_ALLOC_INTERRUPT);
1276 panic("pmap_growkernel: no memory to grow kernel");
1278 *pde = (pd_entry_t)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(nkpg));
1281 * The R[4-7]?00 stores only one copy of the Global bit in
1282 * the translation lookaside buffer for each 2 page entry.
1283 * Thus invalid entrys must have the Global bit set so when
1284 * Entry LO and Entry HI G bits are anded together they will
1285 * produce a global bit to store in the tlb.
1287 pte = (pt_entry_t *)*pde;
1288 for (i = 0; i < NPTEPG; i++)
1291 kernel_vm_end = (kernel_vm_end + NBPDR) & ~PDRMASK;
1292 if (kernel_vm_end - 1 >= kernel_map->max_offset) {
1293 kernel_vm_end = kernel_map->max_offset;
1299 /***************************************************
1300 * page management routines.
1301 ***************************************************/
1303 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
1305 CTASSERT(_NPCM == 3);
1306 CTASSERT(_NPCPV == 168);
1308 CTASSERT(_NPCM == 11);
1309 CTASSERT(_NPCPV == 336);
1312 static __inline struct pv_chunk *
1313 pv_to_chunk(pv_entry_t pv)
1316 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
1319 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
1322 #define PC_FREE0_1 0xfffffffffffffffful
1323 #define PC_FREE2 0x000000fffffffffful
1325 #define PC_FREE0_9 0xfffffffful /* Free values for index 0 through 9 */
1326 #define PC_FREE10 0x0000fffful /* Free values for index 10 */
1329 static const u_long pc_freemask[_NPCM] = {
1331 PC_FREE0_1, PC_FREE0_1, PC_FREE2
1333 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1334 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1335 PC_FREE0_9, PC_FREE0_9, PC_FREE0_9,
1336 PC_FREE0_9, PC_FREE10
1340 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
1342 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
1343 "Current number of pv entries");
1346 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
1348 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
1349 "Current number of pv entry chunks");
1350 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
1351 "Current number of pv entry chunks allocated");
1352 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
1353 "Current number of pv entry chunks frees");
1354 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
1355 "Number of times tried to get a chunk page but failed.");
1357 static long pv_entry_frees, pv_entry_allocs;
1358 static int pv_entry_spare;
1360 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
1361 "Current number of pv entry frees");
1362 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
1363 "Current number of pv entry allocs");
1364 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
1365 "Current number of spare pv entries");
1369 * We are in a serious low memory condition. Resort to
1370 * drastic measures to free some pages so we can allocate
1371 * another pv entry chunk.
1374 pmap_pv_reclaim(pmap_t locked_pmap)
1377 struct pv_chunk *pc;
1380 pt_entry_t *pte, oldpte;
1385 int bit, field, freed, idx;
1387 PMAP_LOCK_ASSERT(locked_pmap, MA_OWNED);
1390 TAILQ_INIT(&newtail);
1391 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL) {
1392 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1393 if (pmap != pc->pc_pmap) {
1395 pmap_invalidate_all(pmap);
1396 if (pmap != locked_pmap)
1400 /* Avoid deadlock and lock recursion. */
1401 if (pmap > locked_pmap)
1403 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
1405 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
1411 * Destroy every non-wired, 4 KB page mapping in the chunk.
1414 for (field = 0; field < _NPCM; field++) {
1415 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
1416 inuse != 0; inuse &= ~(1UL << bit)) {
1417 bit = ffsl(inuse) - 1;
1418 idx = field * sizeof(inuse) * NBBY + bit;
1419 pv = &pc->pc_pventry[idx];
1421 pde = pmap_pde(pmap, va);
1422 KASSERT(pde != NULL && *pde != 0,
1423 ("pmap_pv_reclaim: pde"));
1424 pte = pmap_pde_to_pte(pde, va);
1426 if (pte_test(&oldpte, PTE_W))
1428 if (is_kernel_pmap(pmap))
1432 m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(oldpte));
1433 if (pte_test(&oldpte, PTE_D))
1435 if (m->md.pv_flags & PV_TABLE_REF)
1436 vm_page_aflag_set(m, PGA_REFERENCED);
1437 m->md.pv_flags &= ~PV_TABLE_REF;
1438 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1439 if (TAILQ_EMPTY(&m->md.pv_list))
1440 vm_page_aflag_clear(m, PGA_WRITEABLE);
1441 pc->pc_map[field] |= 1UL << bit;
1442 pmap_unuse_pt(pmap, va, *pde);
1447 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
1450 /* Every freed mapping is for a 4 KB page. */
1451 pmap->pm_stats.resident_count -= freed;
1452 PV_STAT(pv_entry_frees += freed);
1453 PV_STAT(pv_entry_spare += freed);
1454 pv_entry_count -= freed;
1455 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1456 for (field = 0; field < _NPCM; field++)
1457 if (pc->pc_map[field] != pc_freemask[field]) {
1458 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
1460 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
1463 * One freed pv entry in locked_pmap is
1466 if (pmap == locked_pmap)
1470 if (field == _NPCM) {
1471 PV_STAT(pv_entry_spare -= _NPCPV);
1472 PV_STAT(pc_chunk_count--);
1473 PV_STAT(pc_chunk_frees++);
1474 /* Entire chunk is free; return it. */
1475 m_pc = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS(
1481 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
1483 pmap_invalidate_all(pmap);
1484 if (pmap != locked_pmap)
1491 * free the pv_entry back to the free list
1494 free_pv_entry(pmap_t pmap, pv_entry_t pv)
1496 struct pv_chunk *pc;
1497 int bit, field, idx;
1499 rw_assert(&pvh_global_lock, RA_WLOCKED);
1500 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1501 PV_STAT(pv_entry_frees++);
1502 PV_STAT(pv_entry_spare++);
1504 pc = pv_to_chunk(pv);
1505 idx = pv - &pc->pc_pventry[0];
1506 field = idx / (sizeof(u_long) * NBBY);
1507 bit = idx % (sizeof(u_long) * NBBY);
1508 pc->pc_map[field] |= 1ul << bit;
1509 for (idx = 0; idx < _NPCM; idx++)
1510 if (pc->pc_map[idx] != pc_freemask[idx]) {
1512 * 98% of the time, pc is already at the head of the
1513 * list. If it isn't already, move it to the head.
1515 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
1517 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1518 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
1523 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1528 free_pv_chunk(struct pv_chunk *pc)
1532 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
1533 PV_STAT(pv_entry_spare -= _NPCPV);
1534 PV_STAT(pc_chunk_count--);
1535 PV_STAT(pc_chunk_frees++);
1536 /* entire chunk is free, return it */
1537 m = PHYS_TO_VM_PAGE(MIPS_DIRECT_TO_PHYS((vm_offset_t)pc));
1538 vm_page_unwire(m, 0);
1543 * get a new pv_entry, allocating a block from the system
1547 get_pv_entry(pmap_t pmap, boolean_t try)
1549 struct pv_chunk *pc;
1552 int bit, field, idx;
1554 rw_assert(&pvh_global_lock, RA_WLOCKED);
1555 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1556 PV_STAT(pv_entry_allocs++);
1559 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
1561 for (field = 0; field < _NPCM; field++) {
1562 if (pc->pc_map[field]) {
1563 bit = ffsl(pc->pc_map[field]) - 1;
1567 if (field < _NPCM) {
1568 idx = field * sizeof(pc->pc_map[field]) * NBBY + bit;
1569 pv = &pc->pc_pventry[idx];
1570 pc->pc_map[field] &= ~(1ul << bit);
1571 /* If this was the last item, move it to tail */
1572 for (field = 0; field < _NPCM; field++)
1573 if (pc->pc_map[field] != 0) {
1574 PV_STAT(pv_entry_spare--);
1575 return (pv); /* not full, return */
1577 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
1578 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
1579 PV_STAT(pv_entry_spare--);
1583 /* No free items, allocate another chunk */
1584 m = vm_page_alloc_freelist(VM_FREELIST_DIRECT, VM_ALLOC_NORMAL |
1589 PV_STAT(pc_chunk_tryfail++);
1592 m = pmap_pv_reclaim(pmap);
1596 PV_STAT(pc_chunk_count++);
1597 PV_STAT(pc_chunk_allocs++);
1598 pc = (struct pv_chunk *)MIPS_PHYS_TO_DIRECT(VM_PAGE_TO_PHYS(m));
1600 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
1601 for (field = 1; field < _NPCM; field++)
1602 pc->pc_map[field] = pc_freemask[field];
1603 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
1604 pv = &pc->pc_pventry[0];
1605 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
1606 PV_STAT(pv_entry_spare += _NPCPV - 1);
1611 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1615 rw_assert(&pvh_global_lock, RA_WLOCKED);
1616 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
1617 if (pmap == PV_PMAP(pv) && va == pv->pv_va) {
1618 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
1626 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
1630 pv = pmap_pvh_remove(pvh, pmap, va);
1631 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found, pa %lx va %lx",
1632 (u_long)VM_PAGE_TO_PHYS(__containerof(pvh, struct vm_page, md)),
1634 free_pv_entry(pmap, pv);
1638 pmap_remove_entry(pmap_t pmap, vm_page_t m, vm_offset_t va)
1641 rw_assert(&pvh_global_lock, RA_WLOCKED);
1642 pmap_pvh_free(&m->md, pmap, va);
1643 if (TAILQ_EMPTY(&m->md.pv_list))
1644 vm_page_aflag_clear(m, PGA_WRITEABLE);
1648 * Conditionally create a pv entry.
1651 pmap_try_insert_pv_entry(pmap_t pmap, vm_page_t mpte, vm_offset_t va,
1656 rw_assert(&pvh_global_lock, RA_WLOCKED);
1657 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1658 if ((pv = get_pv_entry(pmap, TRUE)) != NULL) {
1660 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
1667 * pmap_remove_pte: do the things to unmap a page in a process
1670 pmap_remove_pte(struct pmap *pmap, pt_entry_t *ptq, vm_offset_t va,
1677 rw_assert(&pvh_global_lock, RA_WLOCKED);
1678 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1681 * Write back all cache lines from the page being unmapped.
1683 mips_dcache_wbinv_range_index(va, PAGE_SIZE);
1686 if (is_kernel_pmap(pmap))
1691 if (pte_test(&oldpte, PTE_W))
1692 pmap->pm_stats.wired_count -= 1;
1694 pmap->pm_stats.resident_count -= 1;
1696 if (pte_test(&oldpte, PTE_MANAGED)) {
1697 pa = TLBLO_PTE_TO_PA(oldpte);
1698 m = PHYS_TO_VM_PAGE(pa);
1699 if (pte_test(&oldpte, PTE_D)) {
1700 KASSERT(!pte_test(&oldpte, PTE_RO),
1701 ("%s: modified page not writable: va: %p, pte: %#jx",
1702 __func__, (void *)va, (uintmax_t)oldpte));
1705 if (m->md.pv_flags & PV_TABLE_REF)
1706 vm_page_aflag_set(m, PGA_REFERENCED);
1707 m->md.pv_flags &= ~PV_TABLE_REF;
1709 pmap_remove_entry(pmap, m, va);
1711 return (pmap_unuse_pt(pmap, va, pde));
1715 * Remove a single page from a process address space
1718 pmap_remove_page(struct pmap *pmap, vm_offset_t va)
1723 rw_assert(&pvh_global_lock, RA_WLOCKED);
1724 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
1725 pde = pmap_pde(pmap, va);
1726 if (pde == NULL || *pde == 0)
1728 ptq = pmap_pde_to_pte(pde, va);
1731 * If there is no pte for this address, just skip it!
1733 if (!pte_test(ptq, PTE_V))
1736 (void)pmap_remove_pte(pmap, ptq, va, *pde);
1737 pmap_invalidate_page(pmap, va);
1741 * Remove the given range of addresses from the specified map.
1743 * It is assumed that the start and end are properly
1744 * rounded to the page size.
1747 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
1749 pd_entry_t *pde, *pdpe;
1751 vm_offset_t va, va_next;
1754 * Perform an unsynchronized read. This is, however, safe.
1756 if (pmap->pm_stats.resident_count == 0)
1759 rw_wlock(&pvh_global_lock);
1763 * special handling of removing one page. a very common operation
1764 * and easy to short circuit some code.
1766 if ((sva + PAGE_SIZE) == eva) {
1767 pmap_remove_page(pmap, sva);
1770 for (; sva < eva; sva = va_next) {
1771 pdpe = pmap_segmap(pmap, sva);
1774 va_next = (sva + NBSEG) & ~SEGMASK;
1780 va_next = (sva + NBPDR) & ~PDRMASK;
1784 pde = pmap_pdpe_to_pde(pdpe, sva);
1789 * Limit our scan to either the end of the va represented
1790 * by the current page table page, or to the end of the
1791 * range being removed.
1797 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
1799 if (!pte_test(pte, PTE_V)) {
1800 if (va != va_next) {
1801 pmap_invalidate_range(pmap, va, sva);
1808 if (pmap_remove_pte(pmap, pte, sva, *pde)) {
1814 pmap_invalidate_range(pmap, va, sva);
1817 rw_wunlock(&pvh_global_lock);
1822 * Routine: pmap_remove_all
1824 * Removes this physical page from
1825 * all physical maps in which it resides.
1826 * Reflects back modify bits to the pager.
1829 * Original versions of this routine were very
1830 * inefficient because they iteratively called
1831 * pmap_remove (slow...)
1835 pmap_remove_all(vm_page_t m)
1840 pt_entry_t *pte, tpte;
1842 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
1843 ("pmap_remove_all: page %p is not managed", m));
1844 rw_wlock(&pvh_global_lock);
1846 if (m->md.pv_flags & PV_TABLE_REF)
1847 vm_page_aflag_set(m, PGA_REFERENCED);
1849 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
1854 * If it's last mapping writeback all caches from
1855 * the page being destroyed
1857 if (TAILQ_NEXT(pv, pv_list) == NULL)
1858 mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);
1860 pmap->pm_stats.resident_count--;
1862 pde = pmap_pde(pmap, pv->pv_va);
1863 KASSERT(pde != NULL && *pde != 0, ("pmap_remove_all: pde"));
1864 pte = pmap_pde_to_pte(pde, pv->pv_va);
1867 if (is_kernel_pmap(pmap))
1872 if (pte_test(&tpte, PTE_W))
1873 pmap->pm_stats.wired_count--;
1876 * Update the vm_page_t clean and reference bits.
1878 if (pte_test(&tpte, PTE_D)) {
1879 KASSERT(!pte_test(&tpte, PTE_RO),
1880 ("%s: modified page not writable: va: %p, pte: %#jx",
1881 __func__, (void *)pv->pv_va, (uintmax_t)tpte));
1884 pmap_invalidate_page(pmap, pv->pv_va);
1886 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
1887 pmap_unuse_pt(pmap, pv->pv_va, *pde);
1888 free_pv_entry(pmap, pv);
1892 vm_page_aflag_clear(m, PGA_WRITEABLE);
1893 m->md.pv_flags &= ~PV_TABLE_REF;
1894 rw_wunlock(&pvh_global_lock);
1898 * Set the physical protection on the
1899 * specified range of this map as requested.
1902 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
1904 pt_entry_t pbits, *pte;
1905 pd_entry_t *pde, *pdpe;
1906 vm_offset_t va, va_next;
1910 if ((prot & VM_PROT_READ) == VM_PROT_NONE) {
1911 pmap_remove(pmap, sva, eva);
1914 if (prot & VM_PROT_WRITE)
1918 for (; sva < eva; sva = va_next) {
1919 pdpe = pmap_segmap(pmap, sva);
1922 va_next = (sva + NBSEG) & ~SEGMASK;
1928 va_next = (sva + NBPDR) & ~PDRMASK;
1932 pde = pmap_pdpe_to_pde(pdpe, sva);
1937 * Limit our scan to either the end of the va represented
1938 * by the current page table page, or to the end of the
1939 * range being write protected.
1945 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
1948 if (!pte_test(&pbits, PTE_V) || pte_test(&pbits,
1950 if (va != va_next) {
1951 pmap_invalidate_range(pmap, va, sva);
1956 pte_set(&pbits, PTE_RO);
1957 if (pte_test(&pbits, PTE_D)) {
1958 pte_clear(&pbits, PTE_D);
1959 if (pte_test(&pbits, PTE_MANAGED)) {
1960 pa = TLBLO_PTE_TO_PA(pbits);
1961 m = PHYS_TO_VM_PAGE(pa);
1968 * Unless PTE_D is set, any TLB entries
1969 * mapping "sva" don't allow write access, so
1970 * they needn't be invalidated.
1972 if (va != va_next) {
1973 pmap_invalidate_range(pmap, va, sva);
1980 pmap_invalidate_range(pmap, va, sva);
1986 * Insert the given physical page (p) at
1987 * the specified virtual address (v) in the
1988 * target physical map with the protection requested.
1990 * If specified, the page will be wired down, meaning
1991 * that the related pte can not be reclaimed.
1993 * NB: This is the only routine which MAY NOT lazy-evaluate
1994 * or lose information. That is, this routine must actually
1995 * insert this page into the given map NOW.
1998 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
1999 vm_prot_t prot, boolean_t wired)
2003 pt_entry_t origpte, newpte;
2008 KASSERT(va <= VM_MAX_KERNEL_ADDRESS, ("pmap_enter: toobig"));
2009 KASSERT((m->oflags & VPO_UNMANAGED) != 0 || va < kmi.clean_sva ||
2010 va >= kmi.clean_eva,
2011 ("pmap_enter: managed mapping within the clean submap"));
2012 KASSERT((m->oflags & VPO_UNMANAGED) != 0 || vm_page_xbusied(m),
2013 ("pmap_enter: page %p is not busy", m));
2014 pa = VM_PAGE_TO_PHYS(m);
2015 newpte = TLBLO_PA_TO_PFN(pa) | init_pte_prot(m, access, prot);
2018 if (is_kernel_pmap(pmap))
2020 if (is_cacheable_mem(pa))
2021 newpte |= PTE_C_CACHE;
2023 newpte |= PTE_C_UNCACHED;
2027 rw_wlock(&pvh_global_lock);
2031 * In the case that a page table page is not resident, we are
2034 if (va < VM_MAXUSER_ADDRESS) {
2035 mpte = pmap_allocpte(pmap, va, M_WAITOK);
2037 pte = pmap_pte(pmap, va);
2040 * Page Directory table entry not valid, we need a new PT page
2043 panic("pmap_enter: invalid page directory, pdir=%p, va=%p",
2044 (void *)pmap->pm_segtab, (void *)va);
2048 opa = TLBLO_PTE_TO_PA(origpte);
2051 * Mapping has not changed, must be protection or wiring change.
2053 if (pte_test(&origpte, PTE_V) && opa == pa) {
2055 * Wiring change, just update stats. We don't worry about
2056 * wiring PT pages as they remain resident as long as there
2057 * are valid mappings in them. Hence, if a user page is
2058 * wired, the PT page will be also.
2060 if (wired && !pte_test(&origpte, PTE_W))
2061 pmap->pm_stats.wired_count++;
2062 else if (!wired && pte_test(&origpte, PTE_W))
2063 pmap->pm_stats.wired_count--;
2065 KASSERT(!pte_test(&origpte, PTE_D | PTE_RO),
2066 ("%s: modified page not writable: va: %p, pte: %#jx",
2067 __func__, (void *)va, (uintmax_t)origpte));
2070 * Remove extra pte reference
2075 if (pte_test(&origpte, PTE_MANAGED)) {
2076 m->md.pv_flags |= PV_TABLE_REF;
2078 newpte |= PTE_MANAGED;
2079 if (!pte_test(&newpte, PTE_RO))
2080 vm_page_aflag_set(m, PGA_WRITEABLE);
2088 * Mapping has changed, invalidate old range and fall through to
2089 * handle validating new mapping.
2092 if (pte_test(&origpte, PTE_W))
2093 pmap->pm_stats.wired_count--;
2095 if (pte_test(&origpte, PTE_MANAGED)) {
2096 om = PHYS_TO_VM_PAGE(opa);
2097 pv = pmap_pvh_remove(&om->md, pmap, va);
2101 KASSERT(mpte->wire_count > 0,
2102 ("pmap_enter: missing reference to page table page,"
2103 " va: %p", (void *)va));
2106 pmap->pm_stats.resident_count++;
2109 * Enter on the PV list if part of our managed memory.
2111 if ((m->oflags & VPO_UNMANAGED) == 0) {
2112 m->md.pv_flags |= PV_TABLE_REF;
2114 pv = get_pv_entry(pmap, FALSE);
2116 TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list);
2117 newpte |= PTE_MANAGED;
2118 if (!pte_test(&newpte, PTE_RO))
2119 vm_page_aflag_set(m, PGA_WRITEABLE);
2120 } else if (pv != NULL)
2121 free_pv_entry(pmap, pv);
2124 * Increment counters
2127 pmap->pm_stats.wired_count++;
2132 printf("pmap_enter: va: %p -> pa: %p\n", (void *)va, (void *)pa);
2136 * if the mapping or permission bits are different, we need to
2139 if (origpte != newpte) {
2141 if (pte_test(&origpte, PTE_V)) {
2142 if (pte_test(&origpte, PTE_MANAGED) && opa != pa) {
2143 if (om->md.pv_flags & PV_TABLE_REF)
2144 vm_page_aflag_set(om, PGA_REFERENCED);
2145 om->md.pv_flags &= ~PV_TABLE_REF;
2147 if (pte_test(&origpte, PTE_D)) {
2148 KASSERT(!pte_test(&origpte, PTE_RO),
2149 ("pmap_enter: modified page not writable:"
2150 " va: %p, pte: %#jx", (void *)va, (uintmax_t)origpte));
2151 if (pte_test(&origpte, PTE_MANAGED))
2154 if (pte_test(&origpte, PTE_MANAGED) &&
2155 TAILQ_EMPTY(&om->md.pv_list))
2156 vm_page_aflag_clear(om, PGA_WRITEABLE);
2157 pmap_update_page(pmap, va, newpte);
2162 * Sync I & D caches for executable pages. Do this only if the
2163 * target pmap belongs to the current process. Otherwise, an
2164 * unresolvable TLB miss may occur.
2166 if (!is_kernel_pmap(pmap) && (pmap == &curproc->p_vmspace->vm_pmap) &&
2167 (prot & VM_PROT_EXECUTE)) {
2168 mips_icache_sync_range(va, PAGE_SIZE);
2169 mips_dcache_wbinv_range(va, PAGE_SIZE);
2171 rw_wunlock(&pvh_global_lock);
2176 * this code makes some *MAJOR* assumptions:
2177 * 1. Current pmap & pmap exists.
2180 * 4. No page table pages.
2181 * but is *MUCH* faster than pmap_enter...
2185 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
2188 rw_wlock(&pvh_global_lock);
2190 (void)pmap_enter_quick_locked(pmap, va, m, prot, NULL);
2191 rw_wunlock(&pvh_global_lock);
2196 pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m,
2197 vm_prot_t prot, vm_page_t mpte)
2202 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva ||
2203 (m->oflags & VPO_UNMANAGED) != 0,
2204 ("pmap_enter_quick_locked: managed mapping within the clean submap"));
2205 rw_assert(&pvh_global_lock, RA_WLOCKED);
2206 PMAP_LOCK_ASSERT(pmap, MA_OWNED);
2209 * In the case that a page table page is not resident, we are
2212 if (va < VM_MAXUSER_ADDRESS) {
2217 * Calculate pagetable page index
2219 ptepindex = pmap_pde_pindex(va);
2220 if (mpte && (mpte->pindex == ptepindex)) {
2224 * Get the page directory entry
2226 pde = pmap_pde(pmap, va);
2229 * If the page table page is mapped, we just
2230 * increment the hold count, and activate it.
2232 if (pde && *pde != 0) {
2233 mpte = PHYS_TO_VM_PAGE(
2234 MIPS_DIRECT_TO_PHYS(*pde));
2237 mpte = _pmap_allocpte(pmap, ptepindex,
2247 pte = pmap_pte(pmap, va);
2248 if (pte_test(pte, PTE_V)) {
2257 * Enter on the PV list if part of our managed memory.
2259 if ((m->oflags & VPO_UNMANAGED) == 0 &&
2260 !pmap_try_insert_pv_entry(pmap, mpte, va, m)) {
2262 pmap_unwire_ptp(pmap, va, mpte);
2269 * Increment counters
2271 pmap->pm_stats.resident_count++;
2273 pa = VM_PAGE_TO_PHYS(m);
2276 * Now validate mapping with RO protection
2278 *pte = PTE_RO | TLBLO_PA_TO_PFN(pa) | PTE_V;
2279 if ((m->oflags & VPO_UNMANAGED) == 0)
2280 *pte |= PTE_MANAGED;
2282 if (is_cacheable_mem(pa))
2283 *pte |= PTE_C_CACHE;
2285 *pte |= PTE_C_UNCACHED;
2287 if (is_kernel_pmap(pmap))
2291 * Sync I & D caches. Do this only if the target pmap
2292 * belongs to the current process. Otherwise, an
2293 * unresolvable TLB miss may occur. */
2294 if (pmap == &curproc->p_vmspace->vm_pmap) {
2296 mips_icache_sync_range(va, PAGE_SIZE);
2297 mips_dcache_wbinv_range(va, PAGE_SIZE);
2304 * Make a temporary mapping for a physical address. This is only intended
2305 * to be used for panic dumps.
2307 * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
2310 pmap_kenter_temporary(vm_paddr_t pa, int i)
2315 printf("%s: ERROR!!! More than one page of virtual address mapping not supported\n",
2318 if (MIPS_DIRECT_MAPPABLE(pa)) {
2319 va = MIPS_PHYS_TO_DIRECT(pa);
2321 #ifndef __mips_n64 /* XXX : to be converted to new style */
2324 struct local_sysmaps *sysm;
2325 pt_entry_t *pte, npte;
2327 /* If this is used other than for dumps, we may need to leave
2328 * interrupts disasbled on return. If crash dumps don't work when
2329 * we get to this point, we might want to consider this (leaving things
2330 * disabled as a starting point ;-)
2332 intr = intr_disable();
2333 cpu = PCPU_GET(cpuid);
2334 sysm = &sysmap_lmem[cpu];
2335 /* Since this is for the debugger, no locks or any other fun */
2336 npte = TLBLO_PA_TO_PFN(pa) | PTE_C_CACHE | PTE_D | PTE_V |
2338 pte = pmap_pte(kernel_pmap, sysm->base);
2341 pmap_update_page(kernel_pmap, sysm->base, npte);
2346 return ((void *)va);
2350 pmap_kenter_temporary_free(vm_paddr_t pa)
2352 #ifndef __mips_n64 /* XXX : to be converted to new style */
2355 struct local_sysmaps *sysm;
2358 if (MIPS_DIRECT_MAPPABLE(pa)) {
2359 /* nothing to do for this case */
2362 #ifndef __mips_n64 /* XXX : to be converted to new style */
2363 cpu = PCPU_GET(cpuid);
2364 sysm = &sysmap_lmem[cpu];
2368 intr = intr_disable();
2369 pte = pmap_pte(kernel_pmap, sysm->base);
2371 pmap_invalidate_page(kernel_pmap, sysm->base);
2379 * Maps a sequence of resident pages belonging to the same object.
2380 * The sequence begins with the given page m_start. This page is
2381 * mapped at the given virtual address start. Each subsequent page is
2382 * mapped at a virtual address that is offset from start by the same
2383 * amount as the page is offset from m_start within the object. The
2384 * last page in the sequence is the page with the largest offset from
2385 * m_start that can be mapped at a virtual address less than the given
2386 * virtual address end. Not every virtual page between start and end
2387 * is mapped; only those for which a resident page exists with the
2388 * corresponding offset from m_start are mapped.
2391 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
2392 vm_page_t m_start, vm_prot_t prot)
2395 vm_pindex_t diff, psize;
2397 VM_OBJECT_ASSERT_LOCKED(m_start->object);
2399 psize = atop(end - start);
2402 rw_wlock(&pvh_global_lock);
2404 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
2405 mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m,
2407 m = TAILQ_NEXT(m, listq);
2409 rw_wunlock(&pvh_global_lock);
2414 * pmap_object_init_pt preloads the ptes for a given object
2415 * into the specified pmap. This eliminates the blast of soft
2416 * faults on process startup and immediately after an mmap.
2419 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr,
2420 vm_object_t object, vm_pindex_t pindex, vm_size_t size)
2422 VM_OBJECT_ASSERT_WLOCKED(object);
2423 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2424 ("pmap_object_init_pt: non-device object"));
2428 * Routine: pmap_change_wiring
2429 * Function: Change the wiring attribute for a map/virtual-address
2431 * In/out conditions:
2432 * The mapping must already exist in the pmap.
2435 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
2440 pte = pmap_pte(pmap, va);
2442 if (wired && !pte_test(pte, PTE_W))
2443 pmap->pm_stats.wired_count++;
2444 else if (!wired && pte_test(pte, PTE_W))
2445 pmap->pm_stats.wired_count--;
2448 * Wiring is not a hardware characteristic so there is no need to
2452 pte_set(pte, PTE_W);
2454 pte_clear(pte, PTE_W);
2459 * Copy the range specified by src_addr/len
2460 * from the source map to the range dst_addr/len
2461 * in the destination map.
2463 * This routine is only advisory and need not do anything.
2467 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
2468 vm_size_t len, vm_offset_t src_addr)
2473 * pmap_zero_page zeros the specified hardware page by mapping
2474 * the page into KVM and using bzero to clear its contents.
2476 * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
2479 pmap_zero_page(vm_page_t m)
2482 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
2484 if (MIPS_DIRECT_MAPPABLE(phys)) {
2485 va = MIPS_PHYS_TO_DIRECT(phys);
2486 bzero((caddr_t)va, PAGE_SIZE);
2487 mips_dcache_wbinv_range(va, PAGE_SIZE);
2489 va = pmap_lmem_map1(phys);
2490 bzero((caddr_t)va, PAGE_SIZE);
2491 mips_dcache_wbinv_range(va, PAGE_SIZE);
2497 * pmap_zero_page_area zeros the specified hardware page by mapping
2498 * the page into KVM and using bzero to clear its contents.
2500 * off and size may not cover an area beyond a single hardware page.
2503 pmap_zero_page_area(vm_page_t m, int off, int size)
2506 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
2508 if (MIPS_DIRECT_MAPPABLE(phys)) {
2509 va = MIPS_PHYS_TO_DIRECT(phys);
2510 bzero((char *)(caddr_t)va + off, size);
2511 mips_dcache_wbinv_range(va + off, size);
2513 va = pmap_lmem_map1(phys);
2514 bzero((char *)va + off, size);
2515 mips_dcache_wbinv_range(va + off, size);
2521 pmap_zero_page_idle(vm_page_t m)
2524 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
2526 if (MIPS_DIRECT_MAPPABLE(phys)) {
2527 va = MIPS_PHYS_TO_DIRECT(phys);
2528 bzero((caddr_t)va, PAGE_SIZE);
2529 mips_dcache_wbinv_range(va, PAGE_SIZE);
2531 va = pmap_lmem_map1(phys);
2532 bzero((caddr_t)va, PAGE_SIZE);
2533 mips_dcache_wbinv_range(va, PAGE_SIZE);
2539 * pmap_copy_page copies the specified (machine independent)
2540 * page by mapping the page into virtual memory and using
2541 * bcopy to copy the page, one machine dependent page at a
2544 * Use XKPHYS for 64 bit, and KSEG0 where possible for 32 bit.
2547 pmap_copy_page(vm_page_t src, vm_page_t dst)
2549 vm_offset_t va_src, va_dst;
2550 vm_paddr_t phys_src = VM_PAGE_TO_PHYS(src);
2551 vm_paddr_t phys_dst = VM_PAGE_TO_PHYS(dst);
2553 if (MIPS_DIRECT_MAPPABLE(phys_src) && MIPS_DIRECT_MAPPABLE(phys_dst)) {
2554 /* easy case, all can be accessed via KSEG0 */
2556 * Flush all caches for VA that are mapped to this page
2557 * to make sure that data in SDRAM is up to date
2559 pmap_flush_pvcache(src);
2560 mips_dcache_wbinv_range_index(
2561 MIPS_PHYS_TO_DIRECT(phys_dst), PAGE_SIZE);
2562 va_src = MIPS_PHYS_TO_DIRECT(phys_src);
2563 va_dst = MIPS_PHYS_TO_DIRECT(phys_dst);
2564 bcopy((caddr_t)va_src, (caddr_t)va_dst, PAGE_SIZE);
2565 mips_dcache_wbinv_range(va_dst, PAGE_SIZE);
2567 va_src = pmap_lmem_map2(phys_src, phys_dst);
2568 va_dst = va_src + PAGE_SIZE;
2569 bcopy((void *)va_src, (void *)va_dst, PAGE_SIZE);
2570 mips_dcache_wbinv_range(va_dst, PAGE_SIZE);
2575 int unmapped_buf_allowed;
2578 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
2579 vm_offset_t b_offset, int xfersize)
2583 vm_offset_t a_pg_offset, b_pg_offset;
2584 vm_paddr_t a_phys, b_phys;
2587 while (xfersize > 0) {
2588 a_pg_offset = a_offset & PAGE_MASK;
2589 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
2590 a_m = ma[a_offset >> PAGE_SHIFT];
2591 a_phys = VM_PAGE_TO_PHYS(a_m);
2592 b_pg_offset = b_offset & PAGE_MASK;
2593 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
2594 b_m = mb[b_offset >> PAGE_SHIFT];
2595 b_phys = VM_PAGE_TO_PHYS(b_m);
2596 if (MIPS_DIRECT_MAPPABLE(a_phys) &&
2597 MIPS_DIRECT_MAPPABLE(b_phys)) {
2598 pmap_flush_pvcache(a_m);
2599 mips_dcache_wbinv_range_index(
2600 MIPS_PHYS_TO_DIRECT(b_phys), PAGE_SIZE);
2601 a_cp = (char *)MIPS_PHYS_TO_DIRECT(a_phys) +
2603 b_cp = (char *)MIPS_PHYS_TO_DIRECT(b_phys) +
2605 bcopy(a_cp, b_cp, cnt);
2606 mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt);
2608 a_cp = (char *)pmap_lmem_map2(a_phys, b_phys);
2609 b_cp = (char *)a_cp + PAGE_SIZE;
2610 a_cp += a_pg_offset;
2611 b_cp += b_pg_offset;
2612 bcopy(a_cp, b_cp, cnt);
2613 mips_dcache_wbinv_range((vm_offset_t)b_cp, cnt);
2623 * Returns true if the pmap's pv is one of the first
2624 * 16 pvs linked to from this page. This count may
2625 * be changed upwards or downwards in the future; it
2626 * is only necessary that true be returned for a small
2627 * subset of pmaps for proper page aging.
2630 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
2636 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2637 ("pmap_page_exists_quick: page %p is not managed", m));
2639 rw_wlock(&pvh_global_lock);
2640 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2641 if (PV_PMAP(pv) == pmap) {
2649 rw_wunlock(&pvh_global_lock);
2654 * Remove all pages from specified address space
2655 * this aids process exit speeds. Also, this code
2656 * is special cased for current process only, but
2657 * can have the more generic (and slightly slower)
2658 * mode enabled. This is much faster than pmap_remove
2659 * in the case of running down an entire address space.
2662 pmap_remove_pages(pmap_t pmap)
2665 pt_entry_t *pte, tpte;
2668 struct pv_chunk *pc, *npc;
2669 u_long inuse, bitmask;
2670 int allfree, bit, field, idx;
2672 if (pmap != vmspace_pmap(curthread->td_proc->p_vmspace)) {
2673 printf("warning: pmap_remove_pages called with non-current pmap\n");
2676 rw_wlock(&pvh_global_lock);
2678 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2680 for (field = 0; field < _NPCM; field++) {
2681 inuse = ~pc->pc_map[field] & pc_freemask[field];
2682 while (inuse != 0) {
2683 bit = ffsl(inuse) - 1;
2684 bitmask = 1UL << bit;
2685 idx = field * sizeof(inuse) * NBBY + bit;
2686 pv = &pc->pc_pventry[idx];
2689 pde = pmap_pde(pmap, pv->pv_va);
2690 KASSERT(pde != NULL && *pde != 0,
2691 ("pmap_remove_pages: pde"));
2692 pte = pmap_pde_to_pte(pde, pv->pv_va);
2693 if (!pte_test(pte, PTE_V))
2694 panic("pmap_remove_pages: bad pte");
2698 * We cannot remove wired pages from a process' mapping at this time
2700 if (pte_test(&tpte, PTE_W)) {
2704 *pte = is_kernel_pmap(pmap) ? PTE_G : 0;
2706 m = PHYS_TO_VM_PAGE(TLBLO_PTE_TO_PA(tpte));
2708 ("pmap_remove_pages: bad tpte %#jx",
2712 * Update the vm_page_t clean and reference bits.
2714 if (pte_test(&tpte, PTE_D))
2718 PV_STAT(pv_entry_frees++);
2719 PV_STAT(pv_entry_spare++);
2721 pc->pc_map[field] |= bitmask;
2722 pmap->pm_stats.resident_count--;
2723 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2724 if (TAILQ_EMPTY(&m->md.pv_list))
2725 vm_page_aflag_clear(m, PGA_WRITEABLE);
2726 pmap_unuse_pt(pmap, pv->pv_va, *pde);
2730 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2734 pmap_invalidate_all(pmap);
2736 rw_wunlock(&pvh_global_lock);
2740 * pmap_testbit tests bits in pte's
2743 pmap_testbit(vm_page_t m, int bit)
2748 boolean_t rv = FALSE;
2750 if (m->oflags & VPO_UNMANAGED)
2753 rw_assert(&pvh_global_lock, RA_WLOCKED);
2754 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2757 pte = pmap_pte(pmap, pv->pv_va);
2758 rv = pte_test(pte, bit);
2767 * pmap_page_wired_mappings:
2769 * Return the number of managed mappings to the given physical page
2773 pmap_page_wired_mappings(vm_page_t m)
2781 if ((m->oflags & VPO_UNMANAGED) != 0)
2783 rw_wlock(&pvh_global_lock);
2784 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2787 pte = pmap_pte(pmap, pv->pv_va);
2788 if (pte_test(pte, PTE_W))
2792 rw_wunlock(&pvh_global_lock);
2797 * Clear the write and modified bits in each of the given page's mappings.
2800 pmap_remove_write(vm_page_t m)
2803 pt_entry_t pbits, *pte;
2806 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2807 ("pmap_remove_write: page %p is not managed", m));
2810 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2811 * set by another thread while the object is locked. Thus,
2812 * if PGA_WRITEABLE is clear, no page table entries need updating.
2814 VM_OBJECT_ASSERT_WLOCKED(m->object);
2815 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2817 rw_wlock(&pvh_global_lock);
2818 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
2821 pte = pmap_pte(pmap, pv->pv_va);
2822 KASSERT(pte != NULL && pte_test(pte, PTE_V),
2823 ("page on pv_list has no pte"));
2825 if (pte_test(&pbits, PTE_D)) {
2826 pte_clear(&pbits, PTE_D);
2829 pte_set(&pbits, PTE_RO);
2830 if (pbits != *pte) {
2832 pmap_update_page(pmap, pv->pv_va, pbits);
2836 vm_page_aflag_clear(m, PGA_WRITEABLE);
2837 rw_wunlock(&pvh_global_lock);
2841 * pmap_ts_referenced:
2843 * Return the count of reference bits for a page, clearing all of them.
2846 pmap_ts_referenced(vm_page_t m)
2849 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2850 ("pmap_ts_referenced: page %p is not managed", m));
2851 if (m->md.pv_flags & PV_TABLE_REF) {
2852 rw_wlock(&pvh_global_lock);
2853 m->md.pv_flags &= ~PV_TABLE_REF;
2854 rw_wunlock(&pvh_global_lock);
2863 * Return whether or not the specified physical page was modified
2864 * in any physical maps.
2867 pmap_is_modified(vm_page_t m)
2871 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2872 ("pmap_is_modified: page %p is not managed", m));
2875 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
2876 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
2877 * is clear, no PTEs can have PTE_D set.
2879 VM_OBJECT_ASSERT_WLOCKED(m->object);
2880 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
2882 rw_wlock(&pvh_global_lock);
2883 rv = pmap_testbit(m, PTE_D);
2884 rw_wunlock(&pvh_global_lock);
2891 * pmap_is_prefaultable:
2893 * Return whether or not the specified virtual address is elgible
2897 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2905 pde = pmap_pde(pmap, addr);
2906 if (pde != NULL && *pde != 0) {
2907 pte = pmap_pde_to_pte(pde, addr);
2915 * Apply the given advice to the specified range of addresses within the
2916 * given pmap. Depending on the advice, clear the referenced and/or
2917 * modified flags in each mapping and set the mapped page's dirty field.
2920 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
2922 pd_entry_t *pde, *pdpe;
2924 vm_offset_t va, va_next;
2928 if (advice != MADV_DONTNEED && advice != MADV_FREE)
2930 rw_wlock(&pvh_global_lock);
2932 for (; sva < eva; sva = va_next) {
2933 pdpe = pmap_segmap(pmap, sva);
2936 va_next = (sva + NBSEG) & ~SEGMASK;
2942 va_next = (sva + NBPDR) & ~PDRMASK;
2946 pde = pmap_pdpe_to_pde(pdpe, sva);
2951 * Limit our scan to either the end of the va represented
2952 * by the current page table page, or to the end of the
2953 * range being write protected.
2959 for (pte = pmap_pde_to_pte(pde, sva); sva != va_next; pte++,
2961 if (!pte_test(pte, PTE_MANAGED | PTE_V)) {
2962 if (va != va_next) {
2963 pmap_invalidate_range(pmap, va, sva);
2968 pa = TLBLO_PTE_TO_PA(*pte);
2969 m = PHYS_TO_VM_PAGE(pa);
2970 m->md.pv_flags &= ~PV_TABLE_REF;
2971 if (pte_test(pte, PTE_D)) {
2972 if (advice == MADV_DONTNEED) {
2974 * Future calls to pmap_is_modified()
2975 * can be avoided by making the page
2980 pte_clear(pte, PTE_D);
2986 * Unless PTE_D is set, any TLB entries
2987 * mapping "sva" don't allow write access, so
2988 * they needn't be invalidated.
2990 if (va != va_next) {
2991 pmap_invalidate_range(pmap, va, sva);
2997 pmap_invalidate_range(pmap, va, sva);
2999 rw_wunlock(&pvh_global_lock);
3004 * Clear the modify bits on the specified physical page.
3007 pmap_clear_modify(vm_page_t m)
3013 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3014 ("pmap_clear_modify: page %p is not managed", m));
3015 VM_OBJECT_ASSERT_WLOCKED(m->object);
3016 KASSERT(!vm_page_xbusied(m),
3017 ("pmap_clear_modify: page %p is exclusive busied", m));
3020 * If the page is not PGA_WRITEABLE, then no PTEs can have PTE_D set.
3021 * If the object containing the page is locked and the page is not
3022 * write busied, then PGA_WRITEABLE cannot be concurrently set.
3024 if ((m->aflags & PGA_WRITEABLE) == 0)
3026 rw_wlock(&pvh_global_lock);
3027 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
3030 pte = pmap_pte(pmap, pv->pv_va);
3031 if (pte_test(pte, PTE_D)) {
3032 pte_clear(pte, PTE_D);
3033 pmap_update_page(pmap, pv->pv_va, *pte);
3037 rw_wunlock(&pvh_global_lock);
3041 * pmap_is_referenced:
3043 * Return whether or not the specified physical page was referenced
3044 * in any physical maps.
3047 pmap_is_referenced(vm_page_t m)
3050 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3051 ("pmap_is_referenced: page %p is not managed", m));
3052 return ((m->md.pv_flags & PV_TABLE_REF) != 0);
3056 * pmap_clear_reference:
3058 * Clear the reference bit on the specified physical page.
3061 pmap_clear_reference(vm_page_t m)
3064 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3065 ("pmap_clear_reference: page %p is not managed", m));
3066 rw_wlock(&pvh_global_lock);
3067 if (m->md.pv_flags & PV_TABLE_REF) {
3068 m->md.pv_flags &= ~PV_TABLE_REF;
3070 rw_wunlock(&pvh_global_lock);
3074 * Miscellaneous support routines follow
3078 * Map a set of physical memory pages into the kernel virtual
3079 * address space. Return a pointer to where it is mapped. This
3080 * routine is intended to be used for mapping device memory,
3083 * Use XKPHYS uncached for 64 bit, and KSEG1 where possible for 32 bit.
3086 pmap_mapdev(vm_paddr_t pa, vm_size_t size)
3088 vm_offset_t va, tmpva, offset;
3091 * KSEG1 maps only first 512M of phys address space. For
3092 * pa > 0x20000000 we should make proper mapping * using pmap_kenter.
3094 if (MIPS_DIRECT_MAPPABLE(pa + size - 1))
3095 return ((void *)MIPS_PHYS_TO_DIRECT_UNCACHED(pa));
3097 offset = pa & PAGE_MASK;
3098 size = roundup(size + offset, PAGE_SIZE);
3100 va = kva_alloc(size);
3102 panic("pmap_mapdev: Couldn't alloc kernel virtual memory");
3103 pa = trunc_page(pa);
3104 for (tmpva = va; size > 0;) {
3105 pmap_kenter_attr(tmpva, pa, PTE_C_UNCACHED);
3112 return ((void *)(va + offset));
3116 pmap_unmapdev(vm_offset_t va, vm_size_t size)
3119 vm_offset_t base, offset;
3121 /* If the address is within KSEG1 then there is nothing to do */
3122 if (va >= MIPS_KSEG1_START && va <= MIPS_KSEG1_END)
3125 base = trunc_page(va);
3126 offset = va & PAGE_MASK;
3127 size = roundup(size + offset, PAGE_SIZE);
3128 kva_free(base, size);
3133 * perform the pmap work for mincore
3136 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
3138 pt_entry_t *ptep, pte;
3145 ptep = pmap_pte(pmap, addr);
3146 pte = (ptep != NULL) ? *ptep : 0;
3147 if (!pte_test(&pte, PTE_V)) {
3151 val = MINCORE_INCORE;
3152 if (pte_test(&pte, PTE_D))
3153 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
3154 pa = TLBLO_PTE_TO_PA(pte);
3155 if (pte_test(&pte, PTE_MANAGED)) {
3157 * This may falsely report the given address as
3158 * MINCORE_REFERENCED. Unfortunately, due to the lack of
3159 * per-PTE reference information, it is impossible to
3160 * determine if the address is MINCORE_REFERENCED.
3162 m = PHYS_TO_VM_PAGE(pa);
3163 if ((m->aflags & PGA_REFERENCED) != 0)
3164 val |= MINCORE_REFERENCED | MINCORE_REFERENCED_OTHER;
3166 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
3167 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) &&
3168 pte_test(&pte, PTE_MANAGED)) {
3169 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
3170 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
3174 PA_UNLOCK_COND(*locked_pa);
3180 pmap_activate(struct thread *td)
3182 pmap_t pmap, oldpmap;
3183 struct proc *p = td->td_proc;
3188 pmap = vmspace_pmap(p->p_vmspace);
3189 oldpmap = PCPU_GET(curpmap);
3190 cpuid = PCPU_GET(cpuid);
3193 CPU_CLR_ATOMIC(cpuid, &oldpmap->pm_active);
3194 CPU_SET_ATOMIC(cpuid, &pmap->pm_active);
3195 pmap_asid_alloc(pmap);
3196 if (td == curthread) {
3197 PCPU_SET(segbase, pmap->pm_segtab);
3198 mips_wr_entryhi(pmap->pm_asid[cpuid].asid);
3201 PCPU_SET(curpmap, pmap);
3206 pmap_sync_icache(pmap_t pm, vm_offset_t va, vm_size_t sz)
3211 * Increase the starting virtual address of the given mapping if a
3212 * different alignment might result in more superpage mappings.
3215 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
3216 vm_offset_t *addr, vm_size_t size)
3218 vm_offset_t superpage_offset;
3222 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
3223 offset += ptoa(object->pg_color);
3224 superpage_offset = offset & SEGMASK;
3225 if (size - ((NBSEG - superpage_offset) & SEGMASK) < NBSEG ||
3226 (*addr & SEGMASK) == superpage_offset)
3228 if ((*addr & SEGMASK) < superpage_offset)
3229 *addr = (*addr & ~SEGMASK) + superpage_offset;
3231 *addr = ((*addr + SEGMASK) & ~SEGMASK) + superpage_offset;
3235 DB_SHOW_COMMAND(ptable, ddb_pid_dump)
3238 struct thread *td = NULL;
3245 td = db_lookup_thread(addr, TRUE);
3247 db_printf("Invalid pid or tid");
3251 if (p->p_vmspace == NULL) {
3252 db_printf("No vmspace for process");
3255 pmap = vmspace_pmap(p->p_vmspace);
3259 db_printf("pmap:%p segtab:%p asid:%x generation:%x\n",
3260 pmap, pmap->pm_segtab, pmap->pm_asid[0].asid,
3261 pmap->pm_asid[0].gen);
3262 for (i = 0; i < NPDEPG; i++) {
3267 pdpe = (pd_entry_t *)pmap->pm_segtab[i];
3270 db_printf("[%4d] %p\n", i, pdpe);
3272 for (j = 0; j < NPDEPG; j++) {
3273 pde = (pt_entry_t *)pdpe[j];
3276 db_printf("\t[%4d] %p\n", j, pde);
3280 pde = (pt_entry_t *)pdpe;
3282 for (k = 0; k < NPTEPG; k++) {
3284 if (pte == 0 || !pte_test(&pte, PTE_V))
3286 pa = TLBLO_PTE_TO_PA(pte);
3287 va = ((u_long)i << SEGSHIFT) | (j << PDRSHIFT) | (k << PAGE_SHIFT);
3288 db_printf("\t\t[%04d] va: %p pte: %8jx pa:%jx\n",
3289 k, (void *)va, (uintmax_t)pte, (uintmax_t)pa);
3298 static void pads(pmap_t pm);
3299 void pmap_pvdump(vm_offset_t pa);
3301 /* print address space of pmap*/
3308 if (pm == kernel_pmap)
3310 for (i = 0; i < NPTEPG; i++)
3311 if (pm->pm_segtab[i])
3312 for (j = 0; j < NPTEPG; j++) {
3313 va = (i << SEGSHIFT) + (j << PAGE_SHIFT);
3314 if (pm == kernel_pmap && va < KERNBASE)
3316 if (pm != kernel_pmap &&
3317 va >= VM_MAXUSER_ADDRESS)
3319 ptep = pmap_pte(pm, va);
3320 if (pte_test(ptep, PTE_V))
3321 printf("%x:%x ", va, *(int *)ptep);
3327 pmap_pvdump(vm_offset_t pa)
3329 register pv_entry_t pv;
3332 printf("pa %x", pa);
3333 m = PHYS_TO_VM_PAGE(pa);
3334 for (pv = TAILQ_FIRST(&m->md.pv_list); pv;
3335 pv = TAILQ_NEXT(pv, pv_list)) {
3336 printf(" -> pmap %p, va %x", (void *)pv->pv_pmap, pv->pv_va);
3347 * Allocate TLB address space tag (called ASID or TLBPID) and return it.
3348 * It takes almost as much or more time to search the TLB for a
3349 * specific ASID and flush those entries as it does to flush the entire TLB.
3350 * Therefore, when we allocate a new ASID, we just take the next number. When
3351 * we run out of numbers, we flush the TLB, increment the generation count
3352 * and start over. ASID zero is reserved for kernel use.
3355 pmap_asid_alloc(pmap)
3358 if (pmap->pm_asid[PCPU_GET(cpuid)].asid != PMAP_ASID_RESERVED &&
3359 pmap->pm_asid[PCPU_GET(cpuid)].gen == PCPU_GET(asid_generation));
3361 if (PCPU_GET(next_asid) == pmap_max_asid) {
3362 tlb_invalidate_all_user(NULL);
3363 PCPU_SET(asid_generation,
3364 (PCPU_GET(asid_generation) + 1) & ASIDGEN_MASK);
3365 if (PCPU_GET(asid_generation) == 0) {
3366 PCPU_SET(asid_generation, 1);
3368 PCPU_SET(next_asid, 1); /* 0 means invalid */
3370 pmap->pm_asid[PCPU_GET(cpuid)].asid = PCPU_GET(next_asid);
3371 pmap->pm_asid[PCPU_GET(cpuid)].gen = PCPU_GET(asid_generation);
3372 PCPU_SET(next_asid, PCPU_GET(next_asid) + 1);
3377 init_pte_prot(vm_page_t m, vm_prot_t access, vm_prot_t prot)
3381 if (!(prot & VM_PROT_WRITE))
3382 rw = PTE_V | PTE_RO;
3383 else if ((m->oflags & VPO_UNMANAGED) == 0) {
3384 if ((access & VM_PROT_WRITE) != 0)
3389 /* Needn't emulate a modified bit for unmanaged pages. */
3395 * pmap_emulate_modified : do dirty bit emulation
3397 * On SMP, update just the local TLB, other CPUs will update their
3398 * TLBs from PTE lazily, if they get the exception.
3399 * Returns 0 in case of sucess, 1 if the page is read only and we
3403 pmap_emulate_modified(pmap_t pmap, vm_offset_t va)
3408 pte = pmap_pte(pmap, va);
3410 panic("pmap_emulate_modified: can't find PTE");
3412 /* It is possible that some other CPU changed m-bit */
3413 if (!pte_test(pte, PTE_V) || pte_test(pte, PTE_D)) {
3414 tlb_update(pmap, va, *pte);
3419 if (!pte_test(pte, PTE_V) || pte_test(pte, PTE_D))
3420 panic("pmap_emulate_modified: invalid pte");
3422 if (pte_test(pte, PTE_RO)) {
3426 pte_set(pte, PTE_D);
3427 tlb_update(pmap, va, *pte);
3428 if (!pte_test(pte, PTE_MANAGED))
3429 panic("pmap_emulate_modified: unmanaged page");
3435 * Routine: pmap_kextract
3437 * Extract the physical page address associated
3441 pmap_kextract(vm_offset_t va)
3446 * First, the direct-mapped regions.
3448 #if defined(__mips_n64)
3449 if (va >= MIPS_XKPHYS_START && va < MIPS_XKPHYS_END)
3450 return (MIPS_XKPHYS_TO_PHYS(va));
3452 if (va >= MIPS_KSEG0_START && va < MIPS_KSEG0_END)
3453 return (MIPS_KSEG0_TO_PHYS(va));
3455 if (va >= MIPS_KSEG1_START && va < MIPS_KSEG1_END)
3456 return (MIPS_KSEG1_TO_PHYS(va));
3459 * User virtual addresses.
3461 if (va < VM_MAXUSER_ADDRESS) {
3464 if (curproc && curproc->p_vmspace) {
3465 ptep = pmap_pte(&curproc->p_vmspace->vm_pmap, va);
3467 return (TLBLO_PTE_TO_PA(*ptep) |
3475 * Should be kernel virtual here, otherwise fail
3477 mapped = (va >= MIPS_KSEG2_START || va < MIPS_KSEG2_END);
3478 #if defined(__mips_n64)
3479 mapped = mapped || (va >= MIPS_XKSEG_START || va < MIPS_XKSEG_END);
3488 /* Is the kernel pmap initialized? */
3489 if (!CPU_EMPTY(&kernel_pmap->pm_active)) {
3490 /* It's inside the virtual address range */
3491 ptep = pmap_pte(kernel_pmap, va);
3493 return (TLBLO_PTE_TO_PA(*ptep) |
3500 panic("%s for unknown address space %p.", __func__, (void *)va);
3505 pmap_flush_pvcache(vm_page_t m)
3510 for (pv = TAILQ_FIRST(&m->md.pv_list); pv;
3511 pv = TAILQ_NEXT(pv, pv_list)) {
3512 mips_dcache_wbinv_range_index(pv->pv_va, PAGE_SIZE);