2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 4. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
36 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
37 * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
38 * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_compat.h"
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/malloc.h>
51 #include <sys/syscall.h>
52 #include <sys/sysent.h>
54 #include <sys/vnode.h>
55 #include <sys/vmmeter.h>
56 #include <sys/kernel.h>
57 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
60 #include <machine/cache.h>
61 #include <machine/clock.h>
62 #include <machine/cpu.h>
63 #include <machine/md_var.h>
64 #include <machine/pcb.h>
67 #include <vm/vm_extern.h>
69 #include <vm/vm_kern.h>
70 #include <vm/vm_map.h>
71 #include <vm/vm_page.h>
72 #include <vm/vm_pageout.h>
73 #include <vm/vm_param.h>
75 #include <vm/uma_int.h>
80 /* Duplicated from asm.h */
81 #if defined(__mips_o32)
86 #if defined(__mips_o32) || defined(__mips_o64)
87 #define CALLFRAME_SIZ (SZREG * (4 + 2))
88 #elif defined(__mips_n32) || defined(__mips_n64)
89 #define CALLFRAME_SIZ (SZREG * 4)
93 * Finish a fork operation, with process p2 nearly set up.
94 * Copy and update the pcb, set up the stack so that the child
95 * ready to run and return to user mode.
98 cpu_fork(register struct thread *td1,register struct proc *p2,
99 struct thread *td2,int flags)
101 register struct proc *p1;
105 if ((flags & RFPROC) == 0)
107 /* It is assumed that the vm_thread_alloc called
108 * cpu_thread_alloc() before cpu_fork is called.
111 /* Point the pcb to the top of the stack */
114 /* Copy p1's pcb, note that in this case
115 * our pcb also includes the td_frame being copied
116 * too. The older mips2 code did an additional copy
117 * of the td_frame, for us that's not needed any
118 * longer (this copy does them both)
120 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
122 /* Point mdproc and then copy over td1's contents
123 * md_proc is empty for MIPS
125 td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
128 * Set up return-value registers as fork() libc stub expects.
130 td2->td_frame->v0 = 0;
131 td2->td_frame->v1 = 1;
132 td2->td_frame->a3 = 0;
134 if (td1 == PCPU_GET(fpcurthread))
135 MipsSaveCurFPState(td1);
137 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
138 /* Make sp 64-bit aligned */
139 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
140 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
141 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
142 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
143 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
144 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
145 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
147 * FREEBSD_DEVELOPERS_FIXME:
148 * Setup any other CPU-Specific registers (Not MIPS Standard)
149 * and/or bits in other standard MIPS registers (if CPU-Specific)
153 td2->td_md.md_tls = td1->td_md.md_tls;
154 td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
155 td2->td_md.md_spinlock_count = 1;
157 if (td1->td_md.md_flags & MDTD_COP2USED) {
158 if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
159 if (td1->td_md.md_ucop2)
160 octeon_cop2_save(td1->td_md.md_ucop2);
162 panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
165 if (td1->td_md.md_cop2)
166 octeon_cop2_save(td1->td_md.md_cop2);
168 panic("cpu_fork: cop2 is NULL but COP2 is enabled");
172 if (td1->td_md.md_cop2) {
173 td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
174 memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2,
175 sizeof(*td1->td_md.md_cop2));
177 if (td1->td_md.md_ucop2) {
178 td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
179 memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2,
180 sizeof(*td1->td_md.md_ucop2));
182 td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
183 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
184 /* Clear COP2 bits for userland & kernel */
185 td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
186 pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
191 * Intercept the return address from a freshly forked process that has NOT
192 * been scheduled yet.
194 * This is needed to make kernel threads stay in kernel mode.
197 cpu_set_fork_handler(struct thread *td, void (*func) __P((void *)), void *arg)
200 * Note that the trap frame follows the args, so the function
201 * is really called like this: func(arg, frame);
203 td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
204 td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
208 cpu_exit(struct thread *td)
213 cpu_thread_exit(struct thread *td)
216 if (PCPU_GET(fpcurthread) == td)
217 PCPU_GET(fpcurthread) = (struct thread *)0;
219 if (td->td_md.md_cop2)
220 memset(td->td_md.md_cop2, 0,
221 sizeof(*td->td_md.md_cop2));
222 if (td->td_md.md_ucop2)
223 memset(td->td_md.md_ucop2, 0,
224 sizeof(*td->td_md.md_ucop2));
229 cpu_thread_free(struct thread *td)
232 if (td->td_md.md_cop2)
233 octeon_cop2_free_ctx(td->td_md.md_cop2);
234 if (td->td_md.md_ucop2)
235 octeon_cop2_free_ctx(td->td_md.md_ucop2);
236 td->td_md.md_cop2 = NULL;
237 td->td_md.md_ucop2 = NULL;
242 cpu_thread_clean(struct thread *td)
247 cpu_thread_swapin(struct thread *td)
253 * The kstack may be at a different physical address now.
254 * Cache the PTEs for the Kernel stack in the machine dependent
255 * part of the thread struct so cpu_switch() can quickly map in
256 * the pcb struct and kernel stack.
258 for (i = 0; i < KSTACK_PAGES; i++) {
259 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
260 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
265 cpu_thread_swapout(struct thread *td)
270 cpu_thread_alloc(struct thread *td)
275 KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
276 td->td_pcb = (struct pcb *)(td->td_kstack +
277 td->td_kstack_pages * PAGE_SIZE) - 1;
278 td->td_frame = &td->td_pcb->pcb_regs;
280 for (i = 0; i < KSTACK_PAGES; i++) {
281 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
282 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
287 cpu_set_syscall_retval(struct thread *td, int error)
289 struct trapframe *locr0 = td->td_frame;
295 #if defined(__mips_n32) || defined(__mips_n64)
296 #ifdef COMPAT_FREEBSD32
297 if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
301 if (code == SYS___syscall)
305 if (code == SYS_syscall)
307 else if (code == SYS___syscall) {
309 code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
316 if (quad_syscall && code != SYS_lseek) {
318 * System call invoked through the
319 * SYS___syscall interface but the
320 * return value is really just 32
323 locr0->v0 = td->td_retval[0];
325 locr0->v1 = td->td_retval[0];
328 locr0->v0 = td->td_retval[0];
329 locr0->v1 = td->td_retval[1];
335 locr0->pc = td->td_pcb->pcb_tpc;
339 break; /* nothing to do */
342 if (quad_syscall && code != SYS_lseek) {
355 * Initialize machine state (pcb and trap frame) for a new thread about to
356 * upcall. Put enough state in the new thread's PCB to get it to go back
357 * userret(), where we can intercept it again to set the return (upcall)
358 * Address and stack, along with those from upcalls that are from other sources
359 * such as those generated in thread_userret() itself.
362 cpu_set_upcall(struct thread *td, struct thread *td0)
366 /* Point the pcb to the top of the stack. */
370 * Copy the upcall pcb. This loads kernel regs.
371 * Those not loaded individually below get their default
374 * XXXKSE It might be a good idea to simply skip this as
375 * the values of the other registers may be unimportant.
376 * This would remove any requirement for knowing the KSE
377 * at this time (see the matching comment below for
378 * more analysis) (need a good safe default).
379 * In MIPS, the trapframe is the first element of the PCB
380 * and gets copied when we copy the PCB. No separate copy
383 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
386 * Set registers for trampoline to user mode.
389 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
390 /* Make sp 64-bit aligned */
391 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
392 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
393 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
394 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
395 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
396 /* Dont set IE bit in SR. sched lock release will take care of it */
397 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
398 (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
401 * FREEBSD_DEVELOPERS_FIXME:
402 * Setup any other CPU-Specific registers (Not MIPS Standard)
406 /* Setup to release spin count in in fork_exit(). */
407 td->td_md.md_spinlock_count = 1;
408 td->td_md.md_saved_intr = MIPS_SR_INT_IE;
410 /* Maybe we need to fix this? */
411 td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
412 (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
413 (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
418 * Set that machine state for performing an upcall that has to
419 * be done in thread_userret() so that those upcalls generated
420 * in thread_userret() itself can be done as well.
423 cpu_set_upcall_kse(struct thread *td, void (*entry)(void *), void *arg,
426 struct trapframe *tf;
430 * At the point where a function is called, sp must be 8
431 * byte aligned[for compatibility with 64-bit CPUs]
432 * in ``See MIPS Run'' by D. Sweetman, p. 269
435 sp = ((register_t)(intptr_t)(stack->ss_sp + stack->ss_size) & ~0x7) -
439 * Set the trap frame to point at the beginning of the uts
443 bzero(tf, sizeof(struct trapframe));
445 tf->pc = (register_t)(intptr_t)entry;
447 * MIPS ABI requires T9 to be the same as PC
448 * in subroutine entry point
450 tf->t9 = (register_t)(intptr_t)entry;
451 tf->a0 = (register_t)(intptr_t)arg;
454 * Keep interrupt mask
456 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
457 (mips_rd_status() & MIPS_SR_INT_MASK);
458 #if defined(__mips_n32)
459 td->td_frame->sr |= MIPS_SR_PX;
460 #elif defined(__mips_n64)
461 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
463 /* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
464 /**XXX the above may now be wrong -- mips2 implements this as panic */
466 * FREEBSD_DEVELOPERS_FIXME:
467 * Setup any other CPU-Specific registers (Not MIPS Standard)
473 * Implement the pre-zeroed page mechanism.
474 * This routine is called from the idle loop.
477 #define ZIDLE_LO(v) ((v) * 2 / 3)
478 #define ZIDLE_HI(v) ((v) * 4 / 5)
481 * Software interrupt handler for queued VM system processing.
487 if (busdma_swi_pending)
492 cpu_set_user_tls(struct thread *td, void *tls_base)
495 td->td_md.md_tls = (char*)tls_base;
503 #define DB_PRINT_REG(ptr, regname) \
504 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
506 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
507 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
510 dump_trapframe(struct trapframe *trapframe)
513 db_printf("Trapframe at %p\n", trapframe);
515 DB_PRINT_REG(trapframe, zero);
516 DB_PRINT_REG(trapframe, ast);
517 DB_PRINT_REG(trapframe, v0);
518 DB_PRINT_REG(trapframe, v1);
519 DB_PRINT_REG(trapframe, a0);
520 DB_PRINT_REG(trapframe, a1);
521 DB_PRINT_REG(trapframe, a2);
522 DB_PRINT_REG(trapframe, a3);
523 #if defined(__mips_n32) || defined(__mips_n64)
524 DB_PRINT_REG(trapframe, a4);
525 DB_PRINT_REG(trapframe, a5);
526 DB_PRINT_REG(trapframe, a6);
527 DB_PRINT_REG(trapframe, a7);
528 DB_PRINT_REG(trapframe, t0);
529 DB_PRINT_REG(trapframe, t1);
530 DB_PRINT_REG(trapframe, t2);
531 DB_PRINT_REG(trapframe, t3);
533 DB_PRINT_REG(trapframe, t0);
534 DB_PRINT_REG(trapframe, t1);
535 DB_PRINT_REG(trapframe, t2);
536 DB_PRINT_REG(trapframe, t3);
537 DB_PRINT_REG(trapframe, t4);
538 DB_PRINT_REG(trapframe, t5);
539 DB_PRINT_REG(trapframe, t6);
540 DB_PRINT_REG(trapframe, t7);
542 DB_PRINT_REG(trapframe, s0);
543 DB_PRINT_REG(trapframe, s1);
544 DB_PRINT_REG(trapframe, s2);
545 DB_PRINT_REG(trapframe, s3);
546 DB_PRINT_REG(trapframe, s4);
547 DB_PRINT_REG(trapframe, s5);
548 DB_PRINT_REG(trapframe, s6);
549 DB_PRINT_REG(trapframe, s7);
550 DB_PRINT_REG(trapframe, t8);
551 DB_PRINT_REG(trapframe, t9);
552 DB_PRINT_REG(trapframe, k0);
553 DB_PRINT_REG(trapframe, k1);
554 DB_PRINT_REG(trapframe, gp);
555 DB_PRINT_REG(trapframe, sp);
556 DB_PRINT_REG(trapframe, s8);
557 DB_PRINT_REG(trapframe, ra);
558 DB_PRINT_REG(trapframe, sr);
559 DB_PRINT_REG(trapframe, mullo);
560 DB_PRINT_REG(trapframe, mulhi);
561 DB_PRINT_REG(trapframe, badvaddr);
562 DB_PRINT_REG(trapframe, cause);
563 DB_PRINT_REG(trapframe, pc);
566 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
570 struct trapframe *trapframe;
572 /* Determine which thread to examine. */
574 td = db_lookup_thread(addr, TRUE);
580 db_printf("Thread %d at %p\n", td->td_tid, td);
582 db_printf("PCB at %p\n", pcb);
584 trapframe = &pcb->pcb_regs;
585 dump_trapframe(trapframe);
587 db_printf("PCB Context:\n");
588 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
589 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
590 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
591 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
592 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
593 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
594 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
595 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
596 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
597 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
598 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
599 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
600 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
601 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
603 db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
604 db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
605 db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
607 if (td->td_frame != trapframe) {
608 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
609 td->td_frame, trapframe);
614 * Dump the trapframe beginning at address specified by first argument.
616 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
622 dump_trapframe((struct trapframe *)addr);