2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 1982, 1986 The Regents of the University of California.
5 * Copyright (c) 1989, 1990 William Jolitz
6 * Copyright (c) 1994 John Dyson
9 * This code is derived from software contributed to Berkeley by
10 * the Systems Programming Group of the University of Utah Computer
11 * Science Department, and William Jolitz.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
38 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
39 * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
40 * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
43 #include <sys/cdefs.h>
44 __FBSDID("$FreeBSD$");
46 #include "opt_compat.h"
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/malloc.h>
53 #include <sys/syscall.h>
54 #include <sys/sysent.h>
56 #include <sys/vnode.h>
57 #include <sys/vmmeter.h>
58 #include <sys/kernel.h>
59 #include <sys/sysctl.h>
60 #include <sys/unistd.h>
62 #include <machine/abi.h>
63 #include <machine/cache.h>
64 #include <machine/clock.h>
65 #include <machine/cpu.h>
66 #include <machine/cpufunc.h>
67 #include <machine/cpuinfo.h>
68 #include <machine/md_var.h>
69 #include <machine/pcb.h>
70 #include <machine/tls.h>
73 #include <vm/vm_extern.h>
75 #include <vm/vm_kern.h>
76 #include <vm/vm_map.h>
77 #include <vm/vm_page.h>
78 #include <vm/vm_pageout.h>
79 #include <vm/vm_param.h>
81 #include <vm/uma_int.h>
87 * Finish a fork operation, with process p2 nearly set up.
88 * Copy and update the pcb, set up the stack so that the child
89 * ready to run and return to user mode.
92 cpu_fork(struct thread *td1, struct proc *p2, struct thread *td2,int flags)
98 if ((flags & RFPROC) == 0)
100 /* It is assumed that the vm_thread_alloc called
101 * cpu_thread_alloc() before cpu_fork is called.
104 /* Point the pcb to the top of the stack */
107 /* Copy p1's pcb, note that in this case
108 * our pcb also includes the td_frame being copied
109 * too. The older mips2 code did an additional copy
110 * of the td_frame, for us that's not needed any
111 * longer (this copy does them both)
113 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
115 /* Point mdproc and then copy over td1's contents
116 * md_proc is empty for MIPS
118 td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
121 * Set up return-value registers as fork() libc stub expects.
123 td2->td_frame->v0 = 0;
124 td2->td_frame->v1 = 1;
125 td2->td_frame->a3 = 0;
127 if (td1 == PCPU_GET(fpcurthread))
128 MipsSaveCurFPState(td1);
130 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
131 /* Make sp 64-bit aligned */
132 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
133 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
134 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
135 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
136 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
137 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
138 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
140 * FREEBSD_DEVELOPERS_FIXME:
141 * Setup any other CPU-Specific registers (Not MIPS Standard)
142 * and/or bits in other standard MIPS registers (if CPU-Specific)
146 td2->td_md.md_tls = td1->td_md.md_tls;
147 td2->td_md.md_tls_tcb_offset = td1->td_md.md_tls_tcb_offset;
148 td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
149 td2->td_md.md_spinlock_count = 1;
151 if (td1->td_md.md_flags & MDTD_COP2USED) {
152 if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
153 if (td1->td_md.md_ucop2)
154 octeon_cop2_save(td1->td_md.md_ucop2);
156 panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
159 if (td1->td_md.md_cop2)
160 octeon_cop2_save(td1->td_md.md_cop2);
162 panic("cpu_fork: cop2 is NULL but COP2 is enabled");
166 if (td1->td_md.md_cop2) {
167 td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
168 memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2,
169 sizeof(*td1->td_md.md_cop2));
171 if (td1->td_md.md_ucop2) {
172 td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
173 memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2,
174 sizeof(*td1->td_md.md_ucop2));
176 td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
177 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
178 /* Clear COP2 bits for userland & kernel */
179 td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
180 pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
185 * Intercept the return address from a freshly forked process that has NOT
186 * been scheduled yet.
188 * This is needed to make kernel threads stay in kernel mode.
191 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
194 * Note that the trap frame follows the args, so the function
195 * is really called like this: func(arg, frame);
197 td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
198 td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
202 cpu_exit(struct thread *td)
207 cpu_thread_exit(struct thread *td)
210 if (PCPU_GET(fpcurthread) == td)
211 PCPU_GET(fpcurthread) = (struct thread *)0;
213 if (td->td_md.md_cop2)
214 memset(td->td_md.md_cop2, 0,
215 sizeof(*td->td_md.md_cop2));
216 if (td->td_md.md_ucop2)
217 memset(td->td_md.md_ucop2, 0,
218 sizeof(*td->td_md.md_ucop2));
223 cpu_thread_free(struct thread *td)
226 if (td->td_md.md_cop2)
227 octeon_cop2_free_ctx(td->td_md.md_cop2);
228 if (td->td_md.md_ucop2)
229 octeon_cop2_free_ctx(td->td_md.md_ucop2);
230 td->td_md.md_cop2 = NULL;
231 td->td_md.md_ucop2 = NULL;
236 cpu_thread_clean(struct thread *td)
241 cpu_thread_swapin(struct thread *td)
247 * The kstack may be at a different physical address now.
248 * Cache the PTEs for the Kernel stack in the machine dependent
249 * part of the thread struct so cpu_switch() can quickly map in
250 * the pcb struct and kernel stack.
252 for (i = 0; i < KSTACK_PAGES; i++) {
253 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
254 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
259 cpu_thread_swapout(struct thread *td)
264 cpu_thread_alloc(struct thread *td)
269 KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
270 td->td_pcb = (struct pcb *)(td->td_kstack +
271 td->td_kstack_pages * PAGE_SIZE) - 1;
272 td->td_frame = &td->td_pcb->pcb_regs;
274 for (i = 0; i < KSTACK_PAGES; i++) {
275 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
276 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
281 cpu_set_syscall_retval(struct thread *td, int error)
283 struct trapframe *locr0 = td->td_frame;
289 #if defined(__mips_n32) || defined(__mips_n64)
290 #ifdef COMPAT_FREEBSD32
291 if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
295 if (code == SYS___syscall)
299 if (code == SYS_syscall)
301 else if (code == SYS___syscall) {
303 code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
310 if (quad_syscall && code != SYS_lseek) {
312 * System call invoked through the
313 * SYS___syscall interface but the
314 * return value is really just 32
317 locr0->v0 = td->td_retval[0];
319 locr0->v1 = td->td_retval[0];
322 locr0->v0 = td->td_retval[0];
323 locr0->v1 = td->td_retval[1];
329 locr0->pc = td->td_pcb->pcb_tpc;
333 break; /* nothing to do */
336 if (quad_syscall && code != SYS_lseek) {
349 * Initialize machine state, mostly pcb and trap frame for a new
350 * thread, about to return to userspace. Put enough state in the new
351 * thread's PCB to get it to go back to the fork_return(), which
352 * finalizes the thread state and handles peculiarities of the first
353 * return to userspace for the new thread.
356 cpu_copy_thread(struct thread *td, struct thread *td0)
360 /* Point the pcb to the top of the stack. */
364 * Copy the upcall pcb. This loads kernel regs.
365 * Those not loaded individually below get their default
368 * XXXKSE It might be a good idea to simply skip this as
369 * the values of the other registers may be unimportant.
370 * This would remove any requirement for knowing the KSE
371 * at this time (see the matching comment below for
372 * more analysis) (need a good safe default).
373 * In MIPS, the trapframe is the first element of the PCB
374 * and gets copied when we copy the PCB. No separate copy
377 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
380 * Set registers for trampoline to user mode.
383 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
384 /* Make sp 64-bit aligned */
385 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
386 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
387 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
388 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
389 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
390 /* Dont set IE bit in SR. sched lock release will take care of it */
391 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
392 (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
395 * FREEBSD_DEVELOPERS_FIXME:
396 * Setup any other CPU-Specific registers (Not MIPS Standard)
400 /* Setup to release spin count in in fork_exit(). */
401 td->td_md.md_spinlock_count = 1;
402 td->td_md.md_saved_intr = MIPS_SR_INT_IE;
404 /* Maybe we need to fix this? */
405 td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
406 (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
407 (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
412 * Set that machine state for performing an upcall that starts
413 * the entry function with the given argument.
416 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
419 struct trapframe *tf;
422 sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~(STACK_ALIGN - 1)) -
426 * Set the trap frame to point at the beginning of the uts
430 bzero(tf, sizeof(struct trapframe));
432 tf->pc = (register_t)(intptr_t)entry;
434 * MIPS ABI requires T9 to be the same as PC
435 * in subroutine entry point
437 tf->t9 = (register_t)(intptr_t)entry;
438 tf->a0 = (register_t)(intptr_t)arg;
441 * Keep interrupt mask
443 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
444 (mips_rd_status() & MIPS_SR_INT_MASK);
445 #if defined(__mips_n32)
446 td->td_frame->sr |= MIPS_SR_PX;
447 #elif defined(__mips_n64)
448 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
450 /* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
451 /**XXX the above may now be wrong -- mips2 implements this as panic */
453 * FREEBSD_DEVELOPERS_FIXME:
454 * Setup any other CPU-Specific registers (Not MIPS Standard)
460 * Implement the pre-zeroed page mechanism.
461 * This routine is called from the idle loop.
464 #define ZIDLE_LO(v) ((v) * 2 / 3)
465 #define ZIDLE_HI(v) ((v) * 4 / 5)
468 * Software interrupt handler for queued VM system processing.
474 if (busdma_swi_pending)
479 cpu_set_user_tls(struct thread *td, void *tls_base)
482 #if defined(__mips_n64) && defined(COMPAT_FREEBSD32)
483 if (td->td_proc && SV_PROC_FLAG(td->td_proc, SV_ILP32))
484 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE32;
487 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
488 td->td_md.md_tls = (char*)tls_base;
489 if (td == curthread && cpuinfo.userlocal_reg == true) {
490 mips_wr_userlocal((unsigned long)tls_base +
491 td->td_md.md_tls_tcb_offset);
500 #define DB_PRINT_REG(ptr, regname) \
501 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
503 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
504 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
507 dump_trapframe(struct trapframe *trapframe)
510 db_printf("Trapframe at %p\n", trapframe);
512 DB_PRINT_REG(trapframe, zero);
513 DB_PRINT_REG(trapframe, ast);
514 DB_PRINT_REG(trapframe, v0);
515 DB_PRINT_REG(trapframe, v1);
516 DB_PRINT_REG(trapframe, a0);
517 DB_PRINT_REG(trapframe, a1);
518 DB_PRINT_REG(trapframe, a2);
519 DB_PRINT_REG(trapframe, a3);
520 #if defined(__mips_n32) || defined(__mips_n64)
521 DB_PRINT_REG(trapframe, a4);
522 DB_PRINT_REG(trapframe, a5);
523 DB_PRINT_REG(trapframe, a6);
524 DB_PRINT_REG(trapframe, a7);
525 DB_PRINT_REG(trapframe, t0);
526 DB_PRINT_REG(trapframe, t1);
527 DB_PRINT_REG(trapframe, t2);
528 DB_PRINT_REG(trapframe, t3);
530 DB_PRINT_REG(trapframe, t0);
531 DB_PRINT_REG(trapframe, t1);
532 DB_PRINT_REG(trapframe, t2);
533 DB_PRINT_REG(trapframe, t3);
534 DB_PRINT_REG(trapframe, t4);
535 DB_PRINT_REG(trapframe, t5);
536 DB_PRINT_REG(trapframe, t6);
537 DB_PRINT_REG(trapframe, t7);
539 DB_PRINT_REG(trapframe, s0);
540 DB_PRINT_REG(trapframe, s1);
541 DB_PRINT_REG(trapframe, s2);
542 DB_PRINT_REG(trapframe, s3);
543 DB_PRINT_REG(trapframe, s4);
544 DB_PRINT_REG(trapframe, s5);
545 DB_PRINT_REG(trapframe, s6);
546 DB_PRINT_REG(trapframe, s7);
547 DB_PRINT_REG(trapframe, t8);
548 DB_PRINT_REG(trapframe, t9);
549 DB_PRINT_REG(trapframe, k0);
550 DB_PRINT_REG(trapframe, k1);
551 DB_PRINT_REG(trapframe, gp);
552 DB_PRINT_REG(trapframe, sp);
553 DB_PRINT_REG(trapframe, s8);
554 DB_PRINT_REG(trapframe, ra);
555 DB_PRINT_REG(trapframe, sr);
556 DB_PRINT_REG(trapframe, mullo);
557 DB_PRINT_REG(trapframe, mulhi);
558 DB_PRINT_REG(trapframe, badvaddr);
559 DB_PRINT_REG(trapframe, cause);
560 DB_PRINT_REG(trapframe, pc);
563 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
567 struct trapframe *trapframe;
569 /* Determine which thread to examine. */
571 td = db_lookup_thread(addr, true);
577 db_printf("Thread %d at %p\n", td->td_tid, td);
579 db_printf("PCB at %p\n", pcb);
581 trapframe = &pcb->pcb_regs;
582 dump_trapframe(trapframe);
584 db_printf("PCB Context:\n");
585 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
586 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
587 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
588 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
589 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
590 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
591 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
592 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
593 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
594 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
595 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
596 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
597 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
598 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
600 db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
601 db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
602 db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
604 if (td->td_frame != trapframe) {
605 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
606 td->td_frame, trapframe);
611 * Dump the trapframe beginning at address specified by first argument.
613 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
619 dump_trapframe((struct trapframe *)addr);