2 * Copyright (c) 1982, 1986 The Regents of the University of California.
3 * Copyright (c) 1989, 1990 William Jolitz
4 * Copyright (c) 1994 John Dyson
7 * This code is derived from software contributed to Berkeley by
8 * the Systems Programming Group of the University of Utah Computer
9 * Science Department, and William Jolitz.
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 4. Neither the name of the University nor the names of its contributors
20 * may be used to endorse or promote products derived from this software
21 * without specific prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * from: @(#)vm_machdep.c 7.3 (Berkeley) 5/13/91
36 * Utah $Hdr: vm_machdep.c 1.16.1.1 89/06/23$
37 * from: src/sys/i386/i386/vm_machdep.c,v 1.132.2.2 2000/08/26 04:19:26 yokota
38 * JNPR: vm_machdep.c,v 1.8.2.2 2007/08/16 15:59:17 girish
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
44 #include "opt_compat.h"
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/malloc.h>
51 #include <sys/syscall.h>
52 #include <sys/sysent.h>
54 #include <sys/vnode.h>
55 #include <sys/vmmeter.h>
56 #include <sys/kernel.h>
57 #include <sys/sysctl.h>
58 #include <sys/unistd.h>
60 #include <machine/cache.h>
61 #include <machine/clock.h>
62 #include <machine/cpu.h>
63 #include <machine/cpufunc.h>
64 #include <machine/cpuinfo.h>
65 #include <machine/md_var.h>
66 #include <machine/pcb.h>
67 #include <machine/tls.h>
70 #include <vm/vm_extern.h>
72 #include <vm/vm_kern.h>
73 #include <vm/vm_map.h>
74 #include <vm/vm_page.h>
75 #include <vm/vm_pageout.h>
76 #include <vm/vm_param.h>
78 #include <vm/uma_int.h>
83 /* Duplicated from asm.h */
84 #if defined(__mips_o32)
89 #if defined(__mips_o32) || defined(__mips_o64)
90 #define CALLFRAME_SIZ (SZREG * (4 + 2))
91 #elif defined(__mips_n32) || defined(__mips_n64)
92 #define CALLFRAME_SIZ (SZREG * 4)
96 * Finish a fork operation, with process p2 nearly set up.
97 * Copy and update the pcb, set up the stack so that the child
98 * ready to run and return to user mode.
101 cpu_fork(register struct thread *td1,register struct proc *p2,
102 struct thread *td2,int flags)
104 register struct proc *p1;
108 if ((flags & RFPROC) == 0)
110 /* It is assumed that the vm_thread_alloc called
111 * cpu_thread_alloc() before cpu_fork is called.
114 /* Point the pcb to the top of the stack */
117 /* Copy p1's pcb, note that in this case
118 * our pcb also includes the td_frame being copied
119 * too. The older mips2 code did an additional copy
120 * of the td_frame, for us that's not needed any
121 * longer (this copy does them both)
123 bcopy(td1->td_pcb, pcb2, sizeof(*pcb2));
125 /* Point mdproc and then copy over td1's contents
126 * md_proc is empty for MIPS
128 td2->td_md.md_flags = td1->td_md.md_flags & MDTD_FPUSED;
131 * Set up return-value registers as fork() libc stub expects.
133 td2->td_frame->v0 = 0;
134 td2->td_frame->v1 = 1;
135 td2->td_frame->a3 = 0;
137 if (td1 == PCPU_GET(fpcurthread))
138 MipsSaveCurFPState(td1);
140 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
141 /* Make sp 64-bit aligned */
142 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
143 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
144 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
145 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td2;
146 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td2->td_frame;
147 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
148 (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
150 * FREEBSD_DEVELOPERS_FIXME:
151 * Setup any other CPU-Specific registers (Not MIPS Standard)
152 * and/or bits in other standard MIPS registers (if CPU-Specific)
156 td2->td_md.md_tls = td1->td_md.md_tls;
157 td2->td_md.md_tls_tcb_offset = td1->td_md.md_tls_tcb_offset;
158 td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
159 td2->td_md.md_spinlock_count = 1;
161 if (td1->td_md.md_flags & MDTD_COP2USED) {
162 if (td1->td_md.md_cop2owner == COP2_OWNER_USERLAND) {
163 if (td1->td_md.md_ucop2)
164 octeon_cop2_save(td1->td_md.md_ucop2);
166 panic("cpu_fork: ucop2 is NULL but COP2 is enabled");
169 if (td1->td_md.md_cop2)
170 octeon_cop2_save(td1->td_md.md_cop2);
172 panic("cpu_fork: cop2 is NULL but COP2 is enabled");
176 if (td1->td_md.md_cop2) {
177 td2->td_md.md_cop2 = octeon_cop2_alloc_ctx();
178 memcpy(td2->td_md.md_cop2, td1->td_md.md_cop2,
179 sizeof(*td1->td_md.md_cop2));
181 if (td1->td_md.md_ucop2) {
182 td2->td_md.md_ucop2 = octeon_cop2_alloc_ctx();
183 memcpy(td2->td_md.md_ucop2, td1->td_md.md_ucop2,
184 sizeof(*td1->td_md.md_ucop2));
186 td2->td_md.md_cop2owner = td1->td_md.md_cop2owner;
187 pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
188 /* Clear COP2 bits for userland & kernel */
189 td2->td_frame->sr &= ~MIPS_SR_COP_2_BIT;
190 pcb2->pcb_context[PCB_REG_SR] &= ~MIPS_SR_COP_2_BIT;
195 * Intercept the return address from a freshly forked process that has NOT
196 * been scheduled yet.
198 * This is needed to make kernel threads stay in kernel mode.
201 cpu_fork_kthread_handler(struct thread *td, void (*func)(void *), void *arg)
204 * Note that the trap frame follows the args, so the function
205 * is really called like this: func(arg, frame);
207 td->td_pcb->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)func;
208 td->td_pcb->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)arg;
212 cpu_exit(struct thread *td)
217 cpu_thread_exit(struct thread *td)
220 if (PCPU_GET(fpcurthread) == td)
221 PCPU_GET(fpcurthread) = (struct thread *)0;
223 if (td->td_md.md_cop2)
224 memset(td->td_md.md_cop2, 0,
225 sizeof(*td->td_md.md_cop2));
226 if (td->td_md.md_ucop2)
227 memset(td->td_md.md_ucop2, 0,
228 sizeof(*td->td_md.md_ucop2));
233 cpu_thread_free(struct thread *td)
236 if (td->td_md.md_cop2)
237 octeon_cop2_free_ctx(td->td_md.md_cop2);
238 if (td->td_md.md_ucop2)
239 octeon_cop2_free_ctx(td->td_md.md_ucop2);
240 td->td_md.md_cop2 = NULL;
241 td->td_md.md_ucop2 = NULL;
246 cpu_thread_clean(struct thread *td)
251 cpu_thread_swapin(struct thread *td)
257 * The kstack may be at a different physical address now.
258 * Cache the PTEs for the Kernel stack in the machine dependent
259 * part of the thread struct so cpu_switch() can quickly map in
260 * the pcb struct and kernel stack.
262 for (i = 0; i < KSTACK_PAGES; i++) {
263 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
264 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
269 cpu_thread_swapout(struct thread *td)
274 cpu_thread_alloc(struct thread *td)
279 KASSERT((td->td_kstack & (1 << PAGE_SHIFT)) == 0, ("kernel stack must be aligned."));
280 td->td_pcb = (struct pcb *)(td->td_kstack +
281 td->td_kstack_pages * PAGE_SIZE) - 1;
282 td->td_frame = &td->td_pcb->pcb_regs;
284 for (i = 0; i < KSTACK_PAGES; i++) {
285 pte = pmap_pte(kernel_pmap, td->td_kstack + i * PAGE_SIZE);
286 td->td_md.md_upte[i] = *pte & ~TLBLO_SWBITS_MASK;
291 cpu_set_syscall_retval(struct thread *td, int error)
293 struct trapframe *locr0 = td->td_frame;
299 #if defined(__mips_n32) || defined(__mips_n64)
300 #ifdef COMPAT_FREEBSD32
301 if (code == SYS___syscall && SV_PROC_FLAG(td->td_proc, SV_ILP32))
305 if (code == SYS___syscall)
309 if (code == SYS_syscall)
311 else if (code == SYS___syscall) {
313 code = _QUAD_LOWWORD ? locr0->a1 : locr0->a0;
320 if (quad_syscall && code != SYS_lseek) {
322 * System call invoked through the
323 * SYS___syscall interface but the
324 * return value is really just 32
327 locr0->v0 = td->td_retval[0];
329 locr0->v1 = td->td_retval[0];
332 locr0->v0 = td->td_retval[0];
333 locr0->v1 = td->td_retval[1];
339 locr0->pc = td->td_pcb->pcb_tpc;
343 break; /* nothing to do */
346 if (quad_syscall && code != SYS_lseek) {
359 * Initialize machine state, mostly pcb and trap frame for a new
360 * thread, about to return to userspace. Put enough state in the new
361 * thread's PCB to get it to go back to the fork_return(), which
362 * finalizes the thread state and handles peculiarities of the first
363 * return to userspace for the new thread.
366 cpu_copy_thread(struct thread *td, struct thread *td0)
370 /* Point the pcb to the top of the stack. */
374 * Copy the upcall pcb. This loads kernel regs.
375 * Those not loaded individually below get their default
378 * XXXKSE It might be a good idea to simply skip this as
379 * the values of the other registers may be unimportant.
380 * This would remove any requirement for knowing the KSE
381 * at this time (see the matching comment below for
382 * more analysis) (need a good safe default).
383 * In MIPS, the trapframe is the first element of the PCB
384 * and gets copied when we copy the PCB. No separate copy
387 bcopy(td0->td_pcb, pcb2, sizeof(*pcb2));
390 * Set registers for trampoline to user mode.
393 pcb2->pcb_context[PCB_REG_RA] = (register_t)(intptr_t)fork_trampoline;
394 /* Make sp 64-bit aligned */
395 pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
396 ~(sizeof(__int64_t) - 1)) - CALLFRAME_SIZ);
397 pcb2->pcb_context[PCB_REG_S0] = (register_t)(intptr_t)fork_return;
398 pcb2->pcb_context[PCB_REG_S1] = (register_t)(intptr_t)td;
399 pcb2->pcb_context[PCB_REG_S2] = (register_t)(intptr_t)td->td_frame;
400 /* Dont set IE bit in SR. sched lock release will take care of it */
401 pcb2->pcb_context[PCB_REG_SR] = mips_rd_status() &
402 (MIPS_SR_PX | MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_INT_MASK);
405 * FREEBSD_DEVELOPERS_FIXME:
406 * Setup any other CPU-Specific registers (Not MIPS Standard)
410 /* Setup to release spin count in in fork_exit(). */
411 td->td_md.md_spinlock_count = 1;
412 td->td_md.md_saved_intr = MIPS_SR_INT_IE;
414 /* Maybe we need to fix this? */
415 td->td_md.md_saved_sr = ( (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT) |
416 (MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX) |
417 (MIPS_SR_INT_IE | MIPS_HARD_INT_MASK));
422 * Set that machine state for performing an upcall that starts
423 * the entry function with the given argument.
426 cpu_set_upcall(struct thread *td, void (*entry)(void *), void *arg,
429 struct trapframe *tf;
433 * At the point where a function is called, sp must be 8
434 * byte aligned[for compatibility with 64-bit CPUs]
435 * in ``See MIPS Run'' by D. Sweetman, p. 269
438 sp = (((intptr_t)stack->ss_sp + stack->ss_size) & ~0x7) -
442 * Set the trap frame to point at the beginning of the uts
446 bzero(tf, sizeof(struct trapframe));
448 tf->pc = (register_t)(intptr_t)entry;
450 * MIPS ABI requires T9 to be the same as PC
451 * in subroutine entry point
453 tf->t9 = (register_t)(intptr_t)entry;
454 tf->a0 = (register_t)(intptr_t)arg;
457 * Keep interrupt mask
459 td->td_frame->sr = MIPS_SR_KSU_USER | MIPS_SR_EXL | MIPS_SR_INT_IE |
460 (mips_rd_status() & MIPS_SR_INT_MASK);
461 #if defined(__mips_n32)
462 td->td_frame->sr |= MIPS_SR_PX;
463 #elif defined(__mips_n64)
464 td->td_frame->sr |= MIPS_SR_PX | MIPS_SR_UX | MIPS_SR_KX;
466 /* tf->sr |= (ALL_INT_MASK & idle_mask) | SR_INT_ENAB; */
467 /**XXX the above may now be wrong -- mips2 implements this as panic */
469 * FREEBSD_DEVELOPERS_FIXME:
470 * Setup any other CPU-Specific registers (Not MIPS Standard)
476 * Implement the pre-zeroed page mechanism.
477 * This routine is called from the idle loop.
480 #define ZIDLE_LO(v) ((v) * 2 / 3)
481 #define ZIDLE_HI(v) ((v) * 4 / 5)
484 * Software interrupt handler for queued VM system processing.
490 if (busdma_swi_pending)
495 cpu_set_user_tls(struct thread *td, void *tls_base)
498 #if defined(__mips_n64) && defined(COMPAT_FREEBSD32)
499 if (td->td_proc && SV_PROC_FLAG(td->td_proc, SV_ILP32))
500 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE32;
503 td->td_md.md_tls_tcb_offset = TLS_TP_OFFSET + TLS_TCB_SIZE;
504 td->td_md.md_tls = (char*)tls_base;
505 if (td == curthread && cpuinfo.userlocal_reg == true) {
506 mips_wr_userlocal((unsigned long)tls_base +
507 td->td_md.md_tls_tcb_offset);
516 #define DB_PRINT_REG(ptr, regname) \
517 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->regname))
519 #define DB_PRINT_REG_ARRAY(ptr, arrname, regname) \
520 db_printf(" %-12s %p\n", #regname, (void *)(intptr_t)((ptr)->arrname[regname]))
523 dump_trapframe(struct trapframe *trapframe)
526 db_printf("Trapframe at %p\n", trapframe);
528 DB_PRINT_REG(trapframe, zero);
529 DB_PRINT_REG(trapframe, ast);
530 DB_PRINT_REG(trapframe, v0);
531 DB_PRINT_REG(trapframe, v1);
532 DB_PRINT_REG(trapframe, a0);
533 DB_PRINT_REG(trapframe, a1);
534 DB_PRINT_REG(trapframe, a2);
535 DB_PRINT_REG(trapframe, a3);
536 #if defined(__mips_n32) || defined(__mips_n64)
537 DB_PRINT_REG(trapframe, a4);
538 DB_PRINT_REG(trapframe, a5);
539 DB_PRINT_REG(trapframe, a6);
540 DB_PRINT_REG(trapframe, a7);
541 DB_PRINT_REG(trapframe, t0);
542 DB_PRINT_REG(trapframe, t1);
543 DB_PRINT_REG(trapframe, t2);
544 DB_PRINT_REG(trapframe, t3);
546 DB_PRINT_REG(trapframe, t0);
547 DB_PRINT_REG(trapframe, t1);
548 DB_PRINT_REG(trapframe, t2);
549 DB_PRINT_REG(trapframe, t3);
550 DB_PRINT_REG(trapframe, t4);
551 DB_PRINT_REG(trapframe, t5);
552 DB_PRINT_REG(trapframe, t6);
553 DB_PRINT_REG(trapframe, t7);
555 DB_PRINT_REG(trapframe, s0);
556 DB_PRINT_REG(trapframe, s1);
557 DB_PRINT_REG(trapframe, s2);
558 DB_PRINT_REG(trapframe, s3);
559 DB_PRINT_REG(trapframe, s4);
560 DB_PRINT_REG(trapframe, s5);
561 DB_PRINT_REG(trapframe, s6);
562 DB_PRINT_REG(trapframe, s7);
563 DB_PRINT_REG(trapframe, t8);
564 DB_PRINT_REG(trapframe, t9);
565 DB_PRINT_REG(trapframe, k0);
566 DB_PRINT_REG(trapframe, k1);
567 DB_PRINT_REG(trapframe, gp);
568 DB_PRINT_REG(trapframe, sp);
569 DB_PRINT_REG(trapframe, s8);
570 DB_PRINT_REG(trapframe, ra);
571 DB_PRINT_REG(trapframe, sr);
572 DB_PRINT_REG(trapframe, mullo);
573 DB_PRINT_REG(trapframe, mulhi);
574 DB_PRINT_REG(trapframe, badvaddr);
575 DB_PRINT_REG(trapframe, cause);
576 DB_PRINT_REG(trapframe, pc);
579 DB_SHOW_COMMAND(pcb, ddb_dump_pcb)
583 struct trapframe *trapframe;
585 /* Determine which thread to examine. */
587 td = db_lookup_thread(addr, true);
593 db_printf("Thread %d at %p\n", td->td_tid, td);
595 db_printf("PCB at %p\n", pcb);
597 trapframe = &pcb->pcb_regs;
598 dump_trapframe(trapframe);
600 db_printf("PCB Context:\n");
601 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S0);
602 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S1);
603 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S2);
604 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S3);
605 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S4);
606 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S5);
607 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S6);
608 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S7);
609 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SP);
610 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_S8);
611 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_RA);
612 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_SR);
613 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_GP);
614 DB_PRINT_REG_ARRAY(pcb, pcb_context, PCB_REG_PC);
616 db_printf("PCB onfault = %p\n", pcb->pcb_onfault);
617 db_printf("md_saved_intr = 0x%0lx\n", (long)td->td_md.md_saved_intr);
618 db_printf("md_spinlock_count = %d\n", td->td_md.md_spinlock_count);
620 if (td->td_frame != trapframe) {
621 db_printf("td->td_frame %p is not the same as pcb_regs %p\n",
622 td->td_frame, trapframe);
627 * Dump the trapframe beginning at address specified by first argument.
629 DB_SHOW_COMMAND(trapframe, ddb_dump_trapframe)
635 dump_trapframe((struct trapframe *)addr);