2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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28 * THE POSSIBILITY OF SUCH DAMAGE.
34 #ifndef __NLM_BOARD_H__
35 #define __NLM_BOARD_H__
37 #define XLP_NAE_NBLOCKS 5
38 #define XLP_NAE_NPORTS 4
41 * EVP board EEPROM info
43 #define EEPROM_I2CBUS 1
44 #define EEPROM_I2CADDR 0xAE
45 #define EEPROM_SIZE 48
46 #define EEPROM_MACADDR_OFFSET 2
48 /* used if there is no FDT */
49 #define BOARD_CONSOLE_SPEED 115200
50 #define BOARD_CONSOLE_UART 0
53 * EVP board CPLD chip select and daughter card info field
55 #define XLP_EVB_CPLD_CHIPSELECT 2
57 #define DCARD_ILAKEN 0x0
58 #define DCARD_SGMII 0x1
59 #define DCARD_XAUI 0x2
60 #define DCARD_NOT_PRSNT 0x3
62 #if !defined(LOCORE) && !defined(__ASSEMBLY__)
67 struct xlp_port_ivars {
97 int stg2_frout_credit;
100 u_int ieee1588_inc_intg;
101 u_int ieee1588_inc_den;
102 u_int ieee1588_inc_num;
103 uint64_t ieee1588_userval;
104 uint64_t ieee1588_ptpoff;
105 uint64_t ieee1588_tmr1;
106 uint64_t ieee1588_tmr2;
107 uint64_t ieee1588_tmr3;
110 struct xlp_block_ivars {
114 struct xlp_port_ivars port_ivars[XLP_NAE_NPORTS];
117 struct xlp_nae_ivars {
128 u_int prepad_size; /* size in 16 byte units */
130 struct xlp_block_ivars block_ivars[XLP_NAE_NBLOCKS];
133 struct xlp_board_info {
135 struct xlp_node_info {
136 struct xlp_nae_ivars nae_ivars;
137 } nodes[XLP_MAX_NODES];
140 extern struct xlp_board_info xlp_board_info;
142 /* Network configuration */
143 int nlm_get_vfbid_mapping(int);
144 int nlm_get_poe_distvec(int vec, uint32_t *distvec);
145 void xlpge_get_macaddr(uint8_t *macaddr);
147 int nlm_board_info_setup(void);
150 int nlm_board_eeprom_read(int node, int i2cbus, int addr, int offs,
151 uint8_t *buf,int sz);
152 uint64_t nlm_board_cpld_base(int node, int chipselect);
153 int nlm_board_cpld_majorversion(uint64_t cpldbase);
154 int nlm_board_cpld_minorversion(uint64_t cpldbase);
155 void nlm_board_cpld_reset(uint64_t cpldbase);
156 int nlm_board_cpld_dboard_type(uint64_t cpldbase, int slot);