2 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
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6 * modification, are permitted provided that the following conditions are
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32 #ifndef __NLM_HAL_COP2_H__
33 #define __NLM_HAL_COP2_H__
37 #define COP2_TXMSGSTATUS 2
38 #define COP2_RXMSGSTATUS 3
39 #define COP2_MSGSTATUS1 4
40 #define COP2_MSGCONFIG 5
41 #define COP2_MSGERROR 6
43 #define CROSSTHR_POPQ_EN 0x01
44 #define VC0_POPQ_EN 0x02
45 #define VC1_POPQ_EN 0x04
46 #define VC2_POPQ_EN 0x08
47 #define VC3_POPQ_EN 0x10
48 #define ALL_VC_POPQ_EN 0x1E
49 #define ALL_VC_CT_POPQ_EN 0x1F
55 #define NLM_DEFINE_COP2_ACCESSORS32(name, reg, sel) \
56 static inline uint32_t nlm_read_c2_##name(void) \
59 __asm__ __volatile__ ( \
63 "mfc2 %0, $%1, %2\n" \
66 : "i" (reg), "i" (sel)); \
70 static inline void nlm_write_c2_##name(uint32_t val) \
72 __asm__ __volatile__( \
76 "mtc2 %0, $%1, %2\n" \
78 : : "r" (val), "i" (reg), "i" (sel)); \
82 #define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \
83 static inline uint64_t nlm_read_c2_##name(void) \
86 __asm__ __volatile__ ( \
90 "dmfc2 %0, $%1, %2\n" \
93 : "i" (reg), "i" (sel)); \
97 static inline void nlm_write_c2_##name(uint64_t val) \
99 __asm__ __volatile__ ( \
103 "dmtc2 %0, $%1, %2\n" \
105 : : "r" (val), "i" (reg), "i" (sel)); \
110 #define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \
111 static inline uint64_t nlm_read_c2_##name(void) \
113 uint32_t __high, __low; \
114 __asm__ __volatile__ ( \
118 "dmfc2 $8, $%2, %3\n" \
119 "dsra32 %0, $8, 0\n" \
122 : "=r"(__high), "=r"(__low) \
123 : "i"(reg), "i"(sel) \
126 return ((uint64_t)__high << 32) | __low; \
129 static inline void nlm_write_c2_##name(uint64_t val) \
131 uint32_t __high = val >> 32; \
132 uint32_t __low = val & 0xffffffff; \
133 __asm__ __volatile__ ( \
137 "dsll32 $8, %1, 0\n" \
138 "dsll32 $9, %0, 0\n" \
139 "dsrl32 $8, $8, 0\n" \
141 "dmtc2 $8, $%2, %3\n" \
143 : : "r"(__high), "r"(__low), "i"(reg), "i"(sel) \
149 NLM_DEFINE_COP2_ACCESSORS64(txbuf0, COP2_TX_BUF, 0);
150 NLM_DEFINE_COP2_ACCESSORS64(txbuf1, COP2_TX_BUF, 1);
151 NLM_DEFINE_COP2_ACCESSORS64(txbuf2, COP2_TX_BUF, 2);
152 NLM_DEFINE_COP2_ACCESSORS64(txbuf3, COP2_TX_BUF, 3);
154 NLM_DEFINE_COP2_ACCESSORS64(rxbuf0, COP2_RX_BUF, 0);
155 NLM_DEFINE_COP2_ACCESSORS64(rxbuf1, COP2_RX_BUF, 1);
156 NLM_DEFINE_COP2_ACCESSORS64(rxbuf2, COP2_RX_BUF, 2);
157 NLM_DEFINE_COP2_ACCESSORS64(rxbuf3, COP2_RX_BUF, 3);
159 NLM_DEFINE_COP2_ACCESSORS32(txmsgstatus, COP2_TXMSGSTATUS, 0);
160 NLM_DEFINE_COP2_ACCESSORS32(rxmsgstatus, COP2_RXMSGSTATUS, 0);
161 NLM_DEFINE_COP2_ACCESSORS32(msgstatus1, COP2_MSGSTATUS1, 0);
162 NLM_DEFINE_COP2_ACCESSORS32(msgconfig, COP2_MSGCONFIG, 0);
163 NLM_DEFINE_COP2_ACCESSORS32(msgerror0, COP2_MSGERROR, 0);
164 NLM_DEFINE_COP2_ACCESSORS32(msgerror1, COP2_MSGERROR, 1);
165 NLM_DEFINE_COP2_ACCESSORS32(msgerror2, COP2_MSGERROR, 2);
166 NLM_DEFINE_COP2_ACCESSORS32(msgerror3, COP2_MSGERROR, 3);
168 /* successful completion returns 1, else 0 */
179 "/* msgsnds $9, $8 */\n"
198 "/* msgld $9, $8 */\n"
224 nlm_fmn_msgsend(int dstid, int size, int swcode, struct nlm_fmn_msg *m)
226 uint32_t flags, status;
230 flags = nlm_save_flags_cop2();
233 nlm_write_c2_txbuf3(m->msg[3]);
235 nlm_write_c2_txbuf2(m->msg[2]);
237 nlm_write_c2_txbuf1(m->msg[1]);
239 nlm_write_c2_txbuf0(m->msg[0]);
242 dstid |= ((swcode << 24) | (size << 16));
243 status = nlm_msgsend(dstid);
246 rv = nlm_read_c2_txmsgstatus();
247 nlm_restore_flags(flags);
253 nlm_fmn_msgrcv(int vc, int *srcid, int *size, int *code, struct nlm_fmn_msg *m)
256 uint32_t msg_status, flags;
259 flags = nlm_save_flags_cop2();
260 status = nlm_msgld(vc); /* will return 0, if error */
263 msg_status = nlm_read_c2_rxmsgstatus();
264 *size = ((msg_status >> 26) & 0x3) + 1;
265 *code = (msg_status >> 18) & 0xff;
266 *srcid = (msg_status >> 4) & 0xfff;
270 m->msg[3] = nlm_read_c2_rxbuf3();
272 m->msg[2] = nlm_read_c2_rxbuf2();
274 m->msg[1] = nlm_read_c2_rxbuf1();
276 m->msg[0] = nlm_read_c2_rxbuf0();
279 nlm_restore_flags(flags);
285 nlm_fmn_cpu_init(int int_vec, int ecc_en, int v0pe, int v1pe, int v2pe, int v3pe)
287 uint32_t val = nlm_read_c2_msgconfig();
289 /* Note: in XLP PRM 0.8.1, the int_vec bits are un-documented
290 * in msgconfig register of cop2.
291 * As per chip/cpu RTL, [16:20] bits consist of int_vec.
293 val |= (((int_vec & 0x1f) << 16) |
294 ((ecc_en & 0x1) << 8) |
295 ((v3pe & 0x1) << 4) |
296 ((v2pe & 0x1) << 3) |
297 ((v1pe & 0x1) << 2) |
298 ((v0pe & 0x1) << 1));
300 nlm_write_c2_msgconfig(val);