1 /*********************************************************************
3 * Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
17 * THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27 * THE POSSIBILITY OF SUCH DAMAGE.
29 * *****************************RMI_2**********************************/
30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
33 #include <sys/systm.h>
35 #include <sys/kernel.h>
37 #include <sys/mutex.h>
39 #include <machine/cpufunc.h>
40 #include <mips/rmi/msgring.h>
41 #include <mips/rmi/board.h>
42 #include <mips/rmi/pic.h>
43 #include <mips/rmi/shared_structs.h>
45 static int xlr_rxstn_to_txstn_map[128] = {
46 [0 ... 7] = TX_STN_CPU_0,
47 [8 ... 15] = TX_STN_CPU_1,
48 [16 ... 23] = TX_STN_CPU_2,
49 [24 ... 31] = TX_STN_CPU_3,
50 [32 ... 39] = TX_STN_CPU_4,
51 [40 ... 47] = TX_STN_CPU_5,
52 [48 ... 55] = TX_STN_CPU_6,
53 [56 ... 63] = TX_STN_CPU_7,
54 [64 ... 95] = TX_STN_INVALID,
55 [96 ... 103] = TX_STN_GMAC,
56 [104 ... 107] = TX_STN_DMA,
57 [108 ... 111] = TX_STN_INVALID,
58 [112 ... 113] = TX_STN_XGS_0,
59 [114 ... 115] = TX_STN_XGS_1,
60 [116 ... 119] = TX_STN_INVALID,
61 [120 ... 127] = TX_STN_SAE
64 static int xls_rxstn_to_txstn_map[128] = {
65 [0 ... 7] = TX_STN_CPU_0,
66 [8 ... 15] = TX_STN_CPU_1,
67 [16 ... 23] = TX_STN_CPU_2,
68 [24 ... 31] = TX_STN_CPU_3,
69 [32 ... 63] = TX_STN_INVALID,
70 [64 ... 71] = TX_STN_PCIE,
71 [72 ... 79] = TX_STN_INVALID,
72 [80 ... 87] = TX_STN_GMAC1,
73 [88 ... 95] = TX_STN_INVALID,
74 [96 ... 103] = TX_STN_GMAC0,
75 [104 ... 107] = TX_STN_DMA,
76 [108 ... 111] = TX_STN_CDE,
77 [112 ... 119] = TX_STN_INVALID,
78 [120 ... 127] = TX_STN_SAE
81 struct stn_cc *xlr_core_cc_configs[] = {&cc_table_cpu_0, &cc_table_cpu_1,
82 &cc_table_cpu_2, &cc_table_cpu_3,
83 &cc_table_cpu_4, &cc_table_cpu_5,
84 &cc_table_cpu_6, &cc_table_cpu_7};
86 struct stn_cc *xls_core_cc_configs[] = {&xls_cc_table_cpu_0, &xls_cc_table_cpu_1,
87 &xls_cc_table_cpu_2, &xls_cc_table_cpu_3};
89 struct xlr_board_info xlr_board_info;
92 * All our knowledge of chip and board that cannot be detected by probing
93 * at run-time goes here
96 xlr_board_info_setup()
100 xlr_board_info.is_xls = 1;
101 xlr_board_info.nr_cpus = 8;
102 xlr_board_info.usb = 1;
103 /* Board version 8 has NAND flash */
105 (xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII);
106 xlr_board_info.pci_irq = 0;
107 xlr_board_info.credit_configs = xls_core_cc_configs;
108 xlr_board_info.bucket_sizes = &xls_bucket_sizes;
109 xlr_board_info.msgmap = xls_rxstn_to_txstn_map;
110 xlr_board_info.gmacports = 8;
112 /* network block 0 */
113 xlr_board_info.gmac_block[0].type = XLR_GMAC;
114 xlr_board_info.gmac_block[0].enabled = 0xf;
115 xlr_board_info.gmac_block[0].credit_config = &xls_cc_table_gmac0;
116 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
117 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
118 if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI ||
119 xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XI ||
120 xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_XII)
121 xlr_board_info.gmac_block[0].mode = XLR_PORT0_RGMII;
123 xlr_board_info.gmac_block[0].mode = XLR_SGMII;
124 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
125 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
126 xlr_board_info.gmac_block[0].baseinst = 0;
128 /* network block 1 */
129 xlr_board_info.gmac_block[1].type = XLR_GMAC;
130 xlr_board_info.gmac_block[1].enabled = xlr_is_xls1xx() ? 0 : 0xf;
131 if (xlr_is_xls4xx_lite()) {
132 xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
135 /* some ports are not enabled on the condor 4xx, figure this
136 out from the GPIO fuse bank */
137 tmp = xlr_read_reg(mmio, 35);
139 xlr_board_info.gmac_block[1].enabled &= ~0x8;
141 xlr_board_info.gmac_block[1].enabled &= ~0x4;
143 xlr_board_info.gmac_block[1].credit_config = &xls_cc_table_gmac1;
144 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_GMAC1_TX0;
145 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_GMAC1_FR_0;
146 xlr_board_info.gmac_block[1].mode = XLR_SGMII;
147 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_GMAC_4_OFFSET;
148 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
149 xlr_board_info.gmac_block[1].baseinst = 4;
151 /* network block 2 */
152 xlr_board_info.gmac_block[2].enabled = 0; /* disabled on XLS */
154 xlr_board_info.is_xls = 0;
155 xlr_board_info.nr_cpus = 32;
156 xlr_board_info.usb = 0;
157 xlr_board_info.cfi = 1;
158 xlr_board_info.pci_irq = 0;
159 xlr_board_info.credit_configs = xlr_core_cc_configs;
160 xlr_board_info.bucket_sizes = &bucket_sizes;
161 xlr_board_info.msgmap = xlr_rxstn_to_txstn_map;
162 xlr_board_info.gmacports = 4;
165 xlr_board_info.gmac_block[0].type = XLR_GMAC;
166 xlr_board_info.gmac_block[0].enabled = 0xf;
167 xlr_board_info.gmac_block[0].credit_config = &cc_table_gmac;
168 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
169 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
170 xlr_board_info.gmac_block[0].mode = XLR_RGMII;
171 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
172 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
173 xlr_board_info.gmac_block[0].baseinst = 0;
176 xlr_board_info.gmac_block[1].type = XLR_XGMAC;
177 xlr_board_info.gmac_block[1].enabled = 1;
178 xlr_board_info.gmac_block[1].credit_config = &cc_table_xgs_0;
179 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_XGS0_TX;
180 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_XGS0FR;
181 xlr_board_info.gmac_block[1].mode = -1;
182 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_XGMAC_0_OFFSET;
183 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
184 xlr_board_info.gmac_block[1].baseinst = 4;
187 xlr_board_info.gmac_block[2].type = XLR_XGMAC;
188 xlr_board_info.gmac_block[2].enabled = 1;
189 xlr_board_info.gmac_block[2].credit_config = &cc_table_xgs_1;
190 xlr_board_info.gmac_block[2].station_txbase = MSGRNG_STNID_XGS1_TX;
191 xlr_board_info.gmac_block[2].station_rfr = MSGRNG_STNID_XGS1FR;
192 xlr_board_info.gmac_block[2].mode = -1;
193 xlr_board_info.gmac_block[2].baseaddr = XLR_IO_XGMAC_1_OFFSET;
194 xlr_board_info.gmac_block[2].baseirq = PIC_XGS_1_IRQ;
195 xlr_board_info.gmac_block[2].baseinst = 5;