sys/mips/rmi/board.c

   1 /*********************************************************************
   2  *
   3  * Copyright 2003-2006 Raza Microelectronics, Inc. (RMI). All rights
   4  * reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright
  11  * notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  * notice, this list of conditions and the following disclaimer in
  14  * the documentation and/or other materials provided with the
  15  * distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY Raza Microelectronics, Inc. ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  20  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL RMI OR CONTRIBUTORS BE LIABLE
  21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  22  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  23  * SUBSTITUTE GOODS OR SERVICES, LOSS OF USE, DATA, OR PROFITS, OR BUSINESS
  24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  25  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
  27  * THE POSSIBILITY OF SUCH DAMAGE.
  28  *
  29  * *****************************RMI_2**********************************/
  30 #include <sys/cdefs.h>          /* RCS ID & Copyright macro defns */
  31 __FBSDID("$FreeBSD$");
  32 #include <sys/param.h>
  33 #include <sys/systm.h>
  34 #include <sys/bus.h>
  35 #include <sys/kernel.h>
  36 #include <sys/lock.h>
  37 #include <sys/mutex.h>
  38
  39 #include <machine/cpufunc.h>
  40 #include <mips/rmi/msgring.h>
  41 #include <mips/rmi/board.h>
  42 #include <mips/rmi/pic.h>
  43 #include <mips/rmi/shared_structs.h>
  44
  45 static int xlr_rxstn_to_txstn_map[128] = {
  46         [0 ... 7] = TX_STN_CPU_0,
  47         [8 ... 15] = TX_STN_CPU_1,
  48         [16 ... 23] = TX_STN_CPU_2,
  49         [24 ... 31] = TX_STN_CPU_3,
  50         [32 ... 39] = TX_STN_CPU_4,
  51         [40 ... 47] = TX_STN_CPU_5,
  52         [48 ... 55] = TX_STN_CPU_6,
  53         [56 ... 63] = TX_STN_CPU_7,
  54         [64 ... 95] = TX_STN_INVALID,
  55         [96 ... 103] = TX_STN_GMAC,
  56         [104 ... 107] = TX_STN_DMA,
  57         [108 ... 111] = TX_STN_INVALID,
  58         [112 ... 113] = TX_STN_XGS_0,
  59         [114 ... 115] = TX_STN_XGS_1,
  60         [116 ... 119] = TX_STN_INVALID,
  61         [120 ... 127] = TX_STN_SAE
  62 };
  63
  64 static int xls_rxstn_to_txstn_map[128] = {
  65         [0 ... 7] = TX_STN_CPU_0,
  66         [8 ... 15] = TX_STN_CPU_1,
  67         [16 ... 23] = TX_STN_CPU_2,
  68         [24 ... 31] = TX_STN_CPU_3,
  69         [32 ... 63] = TX_STN_INVALID,
  70         [64 ... 71] = TX_STN_PCIE,
  71         [72 ... 79] = TX_STN_INVALID,
  72         [80 ... 87] = TX_STN_GMAC1,
  73         [88 ... 95] = TX_STN_INVALID,
  74         [96 ... 103] = TX_STN_GMAC0,
  75         [104 ... 107] = TX_STN_DMA,
  76         [108 ... 111] = TX_STN_CDE,
  77         [112 ... 119] = TX_STN_INVALID,
  78         [120 ... 127] = TX_STN_SAE
  79 };
  80
  81 struct stn_cc *xlr_core_cc_configs[] = {&cc_table_cpu_0, &cc_table_cpu_1,
  82         &cc_table_cpu_2, &cc_table_cpu_3,
  83         &cc_table_cpu_4, &cc_table_cpu_5,
  84 &cc_table_cpu_6, &cc_table_cpu_7};
  85
  86 struct stn_cc *xls_core_cc_configs[] = {&xls_cc_table_cpu_0, &xls_cc_table_cpu_1,
  87 &xls_cc_table_cpu_2, &xls_cc_table_cpu_3};
  88
  89 struct xlr_board_info xlr_board_info;
  90
  91 /*
  92  * All our knowledge of chip and board that cannot be detected by probing
  93  * at run-time goes here
  94  */
  95 int
  96 xlr_board_info_setup()
  97 {
  98
  99         if (xlr_is_xls()) {
 100                 xlr_board_info.is_xls = 1;
 101                 xlr_board_info.nr_cpus = 8;
 102                 xlr_board_info.usb = 1;
 103                 xlr_board_info.cfi =
 104                     (xlr_boot1_info.board_major_version != RMI_XLR_BOARD_ARIZONA_VIII);
 105                 xlr_board_info.pci_irq = 0;
 106                 xlr_board_info.credit_configs = xls_core_cc_configs;
 107                 xlr_board_info.bucket_sizes = &xls_bucket_sizes;
 108                 xlr_board_info.msgmap = xls_rxstn_to_txstn_map;
 109                 xlr_board_info.gmacports = 8;
 110
 111                 /* network block 0 */
 112                 xlr_board_info.gmac_block[0].type = XLR_GMAC;
 113                 xlr_board_info.gmac_block[0].enabled = 0xf;
 114                 xlr_board_info.gmac_block[0].credit_config = &xls_cc_table_gmac0;
 115                 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
 116                 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
 117                 if (xlr_boot1_info.board_major_version == RMI_XLR_BOARD_ARIZONA_VI)
 118                         xlr_board_info.gmac_block[0].mode = XLR_PORT0_RGMII;
 119                 else
 120                         xlr_board_info.gmac_block[0].mode = XLR_SGMII;
 121                 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
 122                 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
 123                 xlr_board_info.gmac_block[0].baseinst = 0;
 124
 125                 /* network block 1 */
 126                 xlr_board_info.gmac_block[1].type = XLR_GMAC;
 127                 xlr_board_info.gmac_block[1].enabled = 0xf;
 128                 if (xlr_is_xls4xx()) {
 129                         xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_GPIO_OFFSET);
 130                         uint32_t tmp;
 131
 132                         /* some ports are not enabled on 4xx, figure this out
 133                            from the GPIO fuse bank */
 134                         tmp = xlr_read_reg(mmio, 35);
 135                         if (tmp & (1<<28))
 136                                 xlr_board_info.gmac_block[1].enabled &= ~0x8;
 137                         if (tmp & (1<<29))
 138                                 xlr_board_info.gmac_block[1].enabled &= ~0x4;
 139                 }
 140                 xlr_board_info.gmac_block[1].credit_config = &xls_cc_table_gmac1;
 141                 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_GMAC1_TX0;
 142                 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_GMAC1_FR_0;
 143                 xlr_board_info.gmac_block[1].mode = XLR_SGMII;
 144                 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_GMAC_4_OFFSET;
 145                 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
 146                 xlr_board_info.gmac_block[1].baseinst = 4;
 147
 148                 /* network block 2 */
 149                 xlr_board_info.gmac_block[2].enabled = 0;       /* disabled on XLS */
 150         } else {
 151                 xlr_board_info.is_xls = 0;
 152                 xlr_board_info.nr_cpus = 32;
 153                 xlr_board_info.usb = 0;
 154                 xlr_board_info.cfi = 1;
 155                 xlr_board_info.pci_irq = 0;
 156                 xlr_board_info.credit_configs = xlr_core_cc_configs;
 157                 xlr_board_info.bucket_sizes = &bucket_sizes;
 158                 xlr_board_info.msgmap = xlr_rxstn_to_txstn_map;
 159                 xlr_board_info.gmacports = 4;
 160
 161                 /* GMAC0 */
 162                 xlr_board_info.gmac_block[0].type = XLR_GMAC;
 163                 xlr_board_info.gmac_block[0].enabled = 0xf;
 164                 xlr_board_info.gmac_block[0].credit_config = &cc_table_gmac;
 165                 xlr_board_info.gmac_block[0].station_txbase = MSGRNG_STNID_GMACTX0;
 166                 xlr_board_info.gmac_block[0].station_rfr = MSGRNG_STNID_GMACRFR_0;
 167                 xlr_board_info.gmac_block[0].mode = XLR_RGMII;
 168                 xlr_board_info.gmac_block[0].baseaddr = XLR_IO_GMAC_0_OFFSET;
 169                 xlr_board_info.gmac_block[0].baseirq = PIC_GMAC_0_IRQ;
 170                 xlr_board_info.gmac_block[0].baseinst = 0;
 171
 172                 /* XGMAC0  */
 173                 xlr_board_info.gmac_block[1].type = XLR_XGMAC;
 174                 xlr_board_info.gmac_block[1].enabled = 1;
 175                 xlr_board_info.gmac_block[1].credit_config = &cc_table_xgs_0;
 176                 xlr_board_info.gmac_block[1].station_txbase = MSGRNG_STNID_XGS0_TX;
 177                 xlr_board_info.gmac_block[1].station_rfr = MSGRNG_STNID_XGS0FR;
 178                 xlr_board_info.gmac_block[1].mode = -1;
 179                 xlr_board_info.gmac_block[1].baseaddr = XLR_IO_XGMAC_0_OFFSET;
 180                 xlr_board_info.gmac_block[1].baseirq = PIC_XGS_0_IRQ;
 181                 xlr_board_info.gmac_block[1].baseinst = 4;
 182
 183                 /* XGMAC1 */
 184                 xlr_board_info.gmac_block[2].type = XLR_XGMAC;
 185                 xlr_board_info.gmac_block[2].enabled = 1;
 186                 xlr_board_info.gmac_block[2].credit_config = &cc_table_xgs_1;
 187                 xlr_board_info.gmac_block[2].station_txbase = MSGRNG_STNID_XGS1_TX;
 188                 xlr_board_info.gmac_block[2].station_rfr = MSGRNG_STNID_XGS1FR;
 189                 xlr_board_info.gmac_block[2].mode = -1;
 190                 xlr_board_info.gmac_block[2].baseaddr = XLR_IO_XGMAC_1_OFFSET;
 191                 xlr_board_info.gmac_block[2].baseirq = PIC_XGS_1_IRQ;
 192                 xlr_board_info.gmac_block[2].baseinst = 5;
 193         }
 194         return 0;
 195 }