2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2003-2009 RMI Corporation
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. Neither the name of RMI Corporation, nor the names of its contributors,
16 * may be used to endorse or promote products derived from this software
17 * without specific prior written permission.
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * Engineering boards have a major/minor number in their EEPROM to
39 * identify their configuration
41 #define RMI_XLR_BOARD_ARIZONA_I 1
42 #define RMI_XLR_BOARD_ARIZONA_II 2
43 #define RMI_XLR_BOARD_ARIZONA_III 3
44 #define RMI_XLR_BOARD_ARIZONA_IV 4
45 #define RMI_XLR_BOARD_ARIZONA_V 5
46 #define RMI_XLR_BOARD_ARIZONA_VI 6
47 #define RMI_XLR_BOARD_ARIZONA_VII 7
48 #define RMI_XLR_BOARD_ARIZONA_VIII 8
49 #define RMI_XLR_BOARD_ARIZONA_XI 11
50 #define RMI_XLR_BOARD_ARIZONA_XII 12
53 * RMI Chips - Values in Processor ID field
55 #define RMI_CHIP_XLR732 0x00
56 #define RMI_CHIP_XLR716 0x02
57 #define RMI_CHIP_XLR308 0x06
58 #define RMI_CHIP_XLR532 0x09
63 #define RMI_CHIP_XLR308_C 0x0F
64 #define RMI_CHIP_XLR508_C 0x0b
65 #define RMI_CHIP_XLR516_C 0x0a
66 #define RMI_CHIP_XLR532_C 0x08
71 #define RMI_CHIP_XLS408 0x88 /* Lite "Condor" */
72 #define RMI_CHIP_XLS608 0x80 /* Internal */
73 #define RMI_CHIP_XLS404 0x8c /* Lite "Condor" */
74 #define RMI_CHIP_XLS208 0x8e
75 #define RMI_CHIP_XLS204 0x8f
76 #define RMI_CHIP_XLS108 0xce
77 #define RMI_CHIP_XLS104 0xcf
80 * XLS B revision chips
82 #define RMI_CHIP_XLS616_B0 0x40
83 #define RMI_CHIP_XLS608_B0 0x4a
84 #define RMI_CHIP_XLS416_B0 0x44
85 #define RMI_CHIP_XLS412_B0 0x4c
86 #define RMI_CHIP_XLS408_B0 0x4e
87 #define RMI_CHIP_XLS404_B0 0x4f
90 * The XLS product line has chip versions 0x4x and 0x8x
92 static __inline unsigned int
95 uint32_t prid = mips_rd_prid();
97 return ((prid & 0xf000) == 0x8000 || (prid & 0xf000) == 0x4000 ||
98 (prid & 0xf000) == 0xc000);
102 * The last byte of the processor id field is revision
104 static __inline unsigned int
108 return (mips_rd_prid() & 0xff);
112 * The 15:8 byte of the PR Id register is the Processor ID
114 static __inline unsigned int
115 xlr_processor_id(void)
118 return ((mips_rd_prid() & 0xff00) >> 8);
122 * The processor is XLR and C-Series
124 static __inline unsigned int
125 xlr_is_c_revision(void)
127 int processor_id = xlr_processor_id();
128 int revision_id = xlr_revision();
130 switch (processor_id) {
132 * These are the relevant PIDs for XLR
133 * steppings (hawk and above). For these,
134 * PIDs, Rev-Ids of [5-9] indicate 'C'.
136 case RMI_CHIP_XLR308_C:
137 case RMI_CHIP_XLR508_C:
138 case RMI_CHIP_XLR516_C:
139 case RMI_CHIP_XLR532_C:
140 case RMI_CHIP_XLR716:
141 case RMI_CHIP_XLR732:
142 if (revision_id >= 5 && revision_id <= 9)
151 * RMI Engineering boards which are PCI cards
152 * These should come up in PCI device mode (not yet)
155 xlr_board_pci(int board_major)
158 return ((board_major == RMI_XLR_BOARD_ARIZONA_III) ||
159 (board_major == RMI_XLR_BOARD_ARIZONA_V));
165 uint32_t chipid = xlr_processor_id();
167 return (chipid == 0xce || chipid == 0xcf);
173 uint32_t chipid = xlr_processor_id();
175 return (chipid == 0x8e || chipid == 0x8f);
179 xlr_is_xls4xx_lite(void)
181 uint32_t chipid = xlr_processor_id();
183 return (chipid == 0x88 || chipid == 0x8c);
186 static __inline unsigned int
189 uint32_t chipid = xlr_processor_id();
191 return (chipid >= 0x40 && chipid <= 0x4f);
194 /* SPI-4 --> 8 ports, 1G MAC --> 4 ports and 10G MAC --> 1 port */
195 #define MAX_NA_PORTS 8
197 /* all our knowledge of chip and board that cannot be detected run-time goes here */
198 enum gmac_block_types { XLR_GMAC, XLR_XGMAC, XLR_SPI4};
199 enum gmac_port_types { XLR_RGMII, XLR_SGMII, XLR_PORT0_RGMII, XLR_XGMII, XLR_XAUI };
200 enum i2c_dev_types { I2C_RTC, I2C_THERMAL, I2C_EEPROM };
202 struct xlr_board_info {
205 int usb; /* usb enabled ? */
206 int cfi; /* compact flash driver for NOR? */
207 int ata; /* ata driver */
209 struct stn_cc **credit_configs; /* pointer to Core station credits */
210 struct bucket_size *bucket_sizes; /* pointer to Core station bucket */
211 int *msgmap; /* mapping of message station to devices */
212 int gmacports; /* number of gmac ports on the board */
213 struct xlr_i2c_dev_t {
215 unsigned int enabled; /* mask of devs enabled */
220 struct xlr_gmac_block_t { /* refers to the set of GMACs controlled by a
221 network accelarator */
222 int type; /* see enum gmac_block_types */
223 unsigned int enabled; /* mask of ports enabled */
224 struct stn_cc *credit_config; /* credit configuration */
225 int station_id; /* station id for sending msgs */
226 int station_txbase; /* station id for tx */
227 int station_rfr; /* free desc bucket */
228 int mode; /* see gmac_block_modes */
229 uint32_t baseaddr; /* IO base */
230 int baseirq; /* first irq for this block, the rest are in sequence */
231 int baseinst; /* the first rge unit for this block */
233 struct xlr_gmac_port {
235 int type; /* see enum gmac_port_types */
236 uint32_t instance; /* identifies the GMAC to which
237 this port is bound to. */
242 uint32_t serdes_addr;
243 uint32_t tx_bucket_id;
245 } gmac_port[MAX_NA_PORTS];
249 extern struct xlr_board_info xlr_board_info;
250 int xlr_board_info_setup(void);