2 * Copyright (c) 2003-2009 RMI Corporation
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9 * notice, this list of conditions and the following disclaimer.
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13 * 3. Neither the name of RMI Corporation, nor the names of its contributors,
14 * may be used to endorse or promote products derived from this software
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33 #include <sys/types.h>
34 #include <mips/rmi/shared_structs.h>
35 #include <mips/rmi/shared_structs_func.h>
37 #define read_c0_register32(reg, sel) \
38 ({ unsigned int __rv; \
39 __asm__ __volatile__( \
42 "mfc0\t%0,$%1,%2\n\t" \
44 : "=r" (__rv) : "i" (reg), "i" (sel) ); \
47 #define write_c0_register32(reg, sel, value) \
48 __asm__ __volatile__( \
51 "mtc0\t%0,$%1,%2\n\t" \
53 : : "r" (value), "i" (reg), "i" (sel) );
55 #define read_c0_register64(reg, sel) \
56 ({ unsigned int __high, __low; \
57 __asm__ __volatile__( \
60 "dmfc0\t $8, $%2, %3\n\t" \
61 "dsrl32\t%0, $8, 0\n\t" \
62 "dsll32\t$8, $8, 0\n\t" \
63 "dsrl32\t%1, $8, 0\n\t" \
65 : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel): "$8" );\
66 (((unsigned long long)__high << 32) | __low);})
68 #define write_c0_register64(reg, sel, value) \
70 unsigned int __high = val>>32; \
71 unsigned int __low = val & 0xffffffff; \
72 __asm__ __volatile__( \
75 "dsll32\t$8, %1, 0\n\t" \
76 "dsll32\t$9, %0, 0\n\t" \
77 "or\t $8, $8, $9\n\t" \
78 "dmtc0\t $8, $%2, %3\n\t" \
80 :: "r"(high), "r"(low), "i"(reg), "i"(sel):"$8", "$9");\
83 #define read_c2_register32(reg, sel) \
84 ({ unsigned int __rv; \
85 __asm__ __volatile__( \
88 "mfc2\t%0,$%1,%2\n\t" \
90 : "=r" (__rv) : "i" (reg), "i" (sel) ); \
93 #define write_c2_register32(reg, sel, value) \
94 __asm__ __volatile__( \
97 "mtc2\t%0,$%1,%2\n\t" \
99 : : "r" (value), "i" (reg), "i" (sel) );
101 #define read_c2_register64(reg, sel) \
102 ({ unsigned int __high, __low; \
103 __asm__ __volatile__( \
105 "dmfc2\t $8, $%2, %3\n\t" \
106 "dsrl32\t%0, $8, 0\n\t" \
107 "dsll32\t$8, $8, 0\n\t" \
108 "dsrl32\t%1, $8, 0\n\t" \
110 : "=r"(__high), "=r"(__low): "i"(reg), "i"(sel): "$8" );\
111 (((unsigned long long)__high << 32) | __low);})
113 #define write_c2_register64(reg, sel, value) \
115 unsigned int __high = value>>32; \
116 unsigned int __low = value & 0xffffffff; \
117 __asm__ __volatile__( \
119 "dsll32\t$8, %1, 0\n\t" \
120 "dsll32\t$9, %0, 0\n\t" \
121 "dsrl32\t$8, $8, 0\n\t" \
122 "or\t $8, $8, $9\n\t" \
123 "dmtc2\t $8, $%2, %3\n\t" \
125 :: "r"(__high), "r"(__low), \
131 #define xlr_processor_id() \
133 __asm__ __volatile__ ( \
136 ".word 0x40088007\n" \
138 "andi %0, $8, 0x3f\n" \
140 : "=r" (__id) : : "$8"); \
144 #define xlr_cpu_id() \
146 __asm__ __volatile__ ( \
149 ".word 0x40088007\n" \
151 "andi %0, $8, 0x7\n" \
153 : "=r" (__id) : : "$8"); \
156 #define xlr_thr_id() \
158 __asm__ __volatile__ ( \
161 ".word 0x40088007\n" \
162 "andi %0, $8, 0x03\n" \
164 : "=r" (__id) : : "$8"); \
168 /* Additional registers on the XLR */
169 #define MIPS_COP_0_OSSCRATCH 22
171 #define XLR_CACHELINE_SIZE 32
173 #define XLR_MAX_CORES 8
175 /* functions to write to and read from the extended
177 * EIRR : Extended Interrupt Request Register
178 * cp0 register 9 sel 6
179 * bits 0...7 are same as cause register 8...15
180 * EIMR : Extended Interrupt Mask Register
181 * cp0 register 9 sel 7
182 * bits 0...7 are same as status register 8...15
185 static inline uint64_t
188 __uint32_t high, low;
190 __asm__ __volatile__(
196 ".word 0x40214806 \n\t"
198 "dsra32 %0, $1, 0 \n\t"
203 : "=r"(high), "=r"(low)
206 return (((__uint64_t) high) << 32) | low;
209 static inline __uint64_t
212 __uint32_t high, low;
214 __asm__ __volatile__(
220 ".word 0x40214807 \n\t"
222 "dsra32 %0, $1, 0 \n\t"
227 : "=r"(high), "=r"(low)
230 return (((__uint64_t) high) << 32) | low;
234 write_c0_eirr64(__uint64_t value)
236 __uint32_t low, high;
239 low = value & 0xffffffff;
241 __asm__ __volatile__(
247 "dsll32 $2, %1, 0 \n\t"
248 "dsll32 $1, %0, 0 \n\t"
249 "dsrl32 $2, $2, 0 \n\t"
251 ".word 0x40a14806 \n\t"
257 : "r"(high), "r"(low)
262 write_c0_eimr64(__uint64_t value)
264 __uint32_t low, high;
267 low = value & 0xffffffff;
269 __asm__ __volatile__(
275 "dsll32 $2, %1, 0 \n\t"
276 "dsll32 $1, %0, 0 \n\t"
277 "dsrl32 $2, $2, 0 \n\t"
279 ".word 0x40a14807 \n\t"
285 : "r"(high), "r"(low)
289 static __inline__ int
290 xlr_test_and_set(int *lock)
294 __asm__ __volatile__(".set push\n"
302 : "+m"(*lock), "=r"(oldval)
303 : "r"((unsigned long)lock)
307 return (oldval == 0 ? 1 /* success */ : 0 /* failure */ );
310 static __inline__ uint32_t
311 xlr_mfcr(uint32_t reg)
315 __asm__ __volatile__(
320 : "r"(reg):"$8", "$9");
325 static __inline__ void
326 xlr_mtcr(uint32_t reg, uint32_t val)
328 __asm__ __volatile__(
332 :: "r"(val), "r"(reg)