2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
41 #include "opt_atalk.h"
42 #include "opt_compat.h"
48 #include "opt_maxmem.h"
49 #include "opt_msgbuf.h"
51 #include "opt_perfmon.h"
52 #include "opt_kstack_pages.h"
54 #include <sys/param.h>
55 #include <sys/systm.h>
56 #include <sys/sysproto.h>
57 #include <sys/signalvar.h>
58 #include <sys/imgact.h>
59 #include <sys/kernel.h>
61 #include <sys/linker.h>
63 #include <sys/malloc.h>
64 #include <sys/mutex.h>
69 #include <sys/reboot.h>
70 #include <sys/callout.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sched.h>
73 #include <sys/sysent.h>
74 #include <sys/sysctl.h>
75 #include <sys/ucontext.h>
76 #include <sys/vmmeter.h>
78 #include <sys/eventhandler.h>
81 #include <vm/vm_param.h>
82 #include <vm/vm_kern.h>
83 #include <vm/vm_object.h>
84 #include <vm/vm_page.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_pager.h>
87 #include <vm/vm_extern.h>
95 #include <net/netisr.h>
97 #include <machine/cpu.h>
98 #include <machine/cputypes.h>
99 #include <machine/reg.h>
100 #include <machine/clock.h>
101 #include <machine/specialreg.h>
102 #include <machine/bootinfo.h>
103 #include <machine/md_var.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/proc.h>
108 #include <machine/perfmon.h>
111 #include <machine/privatespace.h>
112 #include <machine/smp.h>
115 #include <i386/isa/icu.h>
116 #include <i386/isa/intr_machdep.h>
118 #include <pc98/pc98/pc98_machdep.h>
119 #include <pc98/pc98/pc98.h>
123 #include <machine/vm86.h>
124 #include <sys/ptrace.h>
125 #include <machine/sigframe.h>
127 extern void init386(int first);
128 extern void dblfault_handler(void);
130 extern void printcpuinfo(void); /* XXX header file */
131 extern void finishidentcpu(void);
132 extern void panicifcpuunsupported(void);
133 extern void initializecpu(void);
135 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
136 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
138 #if !defined(CPU_ENABLE_SSE) && defined(I686_CPU)
139 #define CPU_ENABLE_SSE
141 #if defined(CPU_DISABLE_SSE)
142 #undef CPU_ENABLE_SSE
145 static void cpu_startup(void *);
146 static void fpstate_drop(struct thread *td);
147 static void get_fpcontext(struct thread *td, mcontext_t *mcp);
148 static int set_fpcontext(struct thread *td, const mcontext_t *mcp);
149 #ifdef CPU_ENABLE_SSE
150 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
151 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
152 #endif /* CPU_ENABLE_SSE */
153 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
156 int need_pre_dma_flush; /* If 1, use wbinvd befor DMA transfer. */
157 int need_post_dma_flush; /* If 1, use invd after DMA transfer. */
160 int _udatasel, _ucodesel;
164 static int ispc98 = 1;
166 static int ispc98 = 0;
168 SYSCTL_INT(_machdep, OID_AUTO, ispc98, CTLFLAG_RD, &ispc98, 0, "");
173 static void osendsig(sig_t catcher, int sig, sigset_t *mask, u_long code);
175 #ifdef COMPAT_FREEBSD4
176 static void freebsd4_sendsig(sig_t catcher, int sig, sigset_t *mask,
182 int Maxmem_under16M = 0;
185 vm_paddr_t phys_avail[10];
187 /* must be 2 less so 0 0 can signal end of chunks */
188 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(vm_offset_t)) - 2)
190 struct kva_md_info kmi;
192 static struct trapframe proc0_tf;
194 static struct pcpu __pcpu;
204 * Good {morning,afternoon,evening,night}.
208 panicifcpuunsupported();
212 printf("real memory = %ju (%ju MB)\n", ptoa((uintmax_t)Maxmem),
213 ptoa((uintmax_t)Maxmem) / 1048576);
215 * Display any holes after the first chunk of extended memory.
220 printf("Physical memory chunk(s):\n");
221 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
224 size = phys_avail[indx + 1] - phys_avail[indx];
226 "0x%016jx - 0x%016jx, %ju bytes (%ju pages)\n",
227 (uintmax_t)phys_avail[indx],
228 (uintmax_t)phys_avail[indx + 1] - 1,
229 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
233 vm_ksubmap_init(&kmi);
235 printf("avail memory = %ju (%ju MB)\n",
236 ptoa((uintmax_t)cnt.v_free_count),
237 ptoa((uintmax_t)cnt.v_free_count) / 1048576);
240 * Set up buffers, so they can be used to read disk labels.
243 vm_pager_bufferinit();
246 /* For SMP, we delay the cpu_setregs() until after SMP startup. */
252 * Send an interrupt to process.
254 * Stack is set up to allow sigcode stored
255 * at top to call routine, followed by kcall
256 * to sigreturn routine below. After sigreturn
257 * resets the signal mask, the stack, and the
258 * frame pointer, it returns to the user
263 osendsig(catcher, sig, mask, code)
269 struct osigframe sf, *fp;
273 struct trapframe *regs;
278 PROC_LOCK_ASSERT(p, MA_OWNED);
280 mtx_assert(&psp->ps_mtx, MA_OWNED);
282 oonstack = sigonstack(regs->tf_esp);
284 /* Allocate space for the signal handler context. */
285 if ((p->p_flag & P_ALTSTACK) && !oonstack &&
286 SIGISMEMBER(psp->ps_sigonstack, sig)) {
287 fp = (struct osigframe *)(p->p_sigstk.ss_sp +
288 p->p_sigstk.ss_size - sizeof(struct osigframe));
289 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
290 p->p_sigstk.ss_flags |= SS_ONSTACK;
293 fp = (struct osigframe *)regs->tf_esp - 1;
295 /* Translate the signal if appropriate. */
296 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
297 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
299 /* Build the argument list for the signal handler. */
301 sf.sf_scp = (register_t)&fp->sf_siginfo.si_sc;
302 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
303 /* Signal handler installed with SA_SIGINFO. */
304 sf.sf_arg2 = (register_t)&fp->sf_siginfo;
305 sf.sf_siginfo.si_signo = sig;
306 sf.sf_siginfo.si_code = code;
307 sf.sf_ahu.sf_action = (__osiginfohandler_t *)catcher;
309 /* Old FreeBSD-style arguments. */
311 sf.sf_addr = regs->tf_err;
312 sf.sf_ahu.sf_handler = catcher;
314 mtx_unlock(&psp->ps_mtx);
317 /* Save most if not all of trap frame. */
318 sf.sf_siginfo.si_sc.sc_eax = regs->tf_eax;
319 sf.sf_siginfo.si_sc.sc_ebx = regs->tf_ebx;
320 sf.sf_siginfo.si_sc.sc_ecx = regs->tf_ecx;
321 sf.sf_siginfo.si_sc.sc_edx = regs->tf_edx;
322 sf.sf_siginfo.si_sc.sc_esi = regs->tf_esi;
323 sf.sf_siginfo.si_sc.sc_edi = regs->tf_edi;
324 sf.sf_siginfo.si_sc.sc_cs = regs->tf_cs;
325 sf.sf_siginfo.si_sc.sc_ds = regs->tf_ds;
326 sf.sf_siginfo.si_sc.sc_ss = regs->tf_ss;
327 sf.sf_siginfo.si_sc.sc_es = regs->tf_es;
328 sf.sf_siginfo.si_sc.sc_fs = regs->tf_fs;
329 sf.sf_siginfo.si_sc.sc_gs = rgs();
330 sf.sf_siginfo.si_sc.sc_isp = regs->tf_isp;
332 /* Build the signal context to be used by osigreturn(). */
333 sf.sf_siginfo.si_sc.sc_onstack = (oonstack) ? 1 : 0;
334 SIG2OSIG(*mask, sf.sf_siginfo.si_sc.sc_mask);
335 sf.sf_siginfo.si_sc.sc_sp = regs->tf_esp;
336 sf.sf_siginfo.si_sc.sc_fp = regs->tf_ebp;
337 sf.sf_siginfo.si_sc.sc_pc = regs->tf_eip;
338 sf.sf_siginfo.si_sc.sc_ps = regs->tf_eflags;
339 sf.sf_siginfo.si_sc.sc_trapno = regs->tf_trapno;
340 sf.sf_siginfo.si_sc.sc_err = regs->tf_err;
343 * If we're a vm86 process, we want to save the segment registers.
344 * We also change eflags to be our emulated eflags, not the actual
347 if (regs->tf_eflags & PSL_VM) {
348 /* XXX confusing names: `tf' isn't a trapframe; `regs' is. */
349 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
350 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
352 sf.sf_siginfo.si_sc.sc_gs = tf->tf_vm86_gs;
353 sf.sf_siginfo.si_sc.sc_fs = tf->tf_vm86_fs;
354 sf.sf_siginfo.si_sc.sc_es = tf->tf_vm86_es;
355 sf.sf_siginfo.si_sc.sc_ds = tf->tf_vm86_ds;
357 if (vm86->vm86_has_vme == 0)
358 sf.sf_siginfo.si_sc.sc_ps =
359 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
360 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
362 /* See sendsig() for comments. */
363 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
367 * Copy the sigframe out to the user's stack.
369 if (copyout(&sf, fp, sizeof(*fp)) != 0) {
371 printf("process %ld has trashed its stack\n", (long)p->p_pid);
377 regs->tf_esp = (int)fp;
378 regs->tf_eip = PS_STRINGS - szosigcode;
379 regs->tf_eflags &= ~PSL_T;
380 regs->tf_cs = _ucodesel;
381 regs->tf_ds = _udatasel;
382 regs->tf_es = _udatasel;
383 regs->tf_fs = _udatasel;
385 regs->tf_ss = _udatasel;
387 mtx_lock(&psp->ps_mtx);
389 #endif /* COMPAT_43 */
391 #ifdef COMPAT_FREEBSD4
393 freebsd4_sendsig(catcher, sig, mask, code)
399 struct sigframe4 sf, *sfp;
403 struct trapframe *regs;
408 PROC_LOCK_ASSERT(p, MA_OWNED);
410 mtx_assert(&psp->ps_mtx, MA_OWNED);
412 oonstack = sigonstack(regs->tf_esp);
414 /* Save user context. */
415 bzero(&sf, sizeof(sf));
416 sf.sf_uc.uc_sigmask = *mask;
417 sf.sf_uc.uc_stack = p->p_sigstk;
418 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK)
419 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
420 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
421 sf.sf_uc.uc_mcontext.mc_gs = rgs();
422 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
424 /* Allocate space for the signal handler context. */
425 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
426 SIGISMEMBER(psp->ps_sigonstack, sig)) {
427 sfp = (struct sigframe4 *)(p->p_sigstk.ss_sp +
428 p->p_sigstk.ss_size - sizeof(struct sigframe4));
429 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
430 p->p_sigstk.ss_flags |= SS_ONSTACK;
433 sfp = (struct sigframe4 *)regs->tf_esp - 1;
435 /* Translate the signal if appropriate. */
436 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
437 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
439 /* Build the argument list for the signal handler. */
441 sf.sf_ucontext = (register_t)&sfp->sf_uc;
442 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
443 /* Signal handler installed with SA_SIGINFO. */
444 sf.sf_siginfo = (register_t)&sfp->sf_si;
445 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
447 /* Fill in POSIX parts */
448 sf.sf_si.si_signo = sig;
449 sf.sf_si.si_code = code;
450 sf.sf_si.si_addr = (void *)regs->tf_err;
452 /* Old FreeBSD-style arguments. */
453 sf.sf_siginfo = code;
454 sf.sf_addr = regs->tf_err;
455 sf.sf_ahu.sf_handler = catcher;
457 mtx_unlock(&psp->ps_mtx);
461 * If we're a vm86 process, we want to save the segment registers.
462 * We also change eflags to be our emulated eflags, not the actual
465 if (regs->tf_eflags & PSL_VM) {
466 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
467 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
469 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
470 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
471 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
472 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
474 if (vm86->vm86_has_vme == 0)
475 sf.sf_uc.uc_mcontext.mc_eflags =
476 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
477 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
480 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
481 * syscalls made by the signal handler. This just avoids
482 * wasting time for our lazy fixup of such faults. PSL_NT
483 * does nothing in vm86 mode, but vm86 programs can set it
484 * almost legitimately in probes for old cpu types.
486 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
490 * Copy the sigframe out to the user's stack.
492 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
494 printf("process %ld has trashed its stack\n", (long)p->p_pid);
500 regs->tf_esp = (int)sfp;
501 regs->tf_eip = PS_STRINGS - szfreebsd4_sigcode;
502 regs->tf_eflags &= ~PSL_T;
503 regs->tf_cs = _ucodesel;
504 regs->tf_ds = _udatasel;
505 regs->tf_es = _udatasel;
506 regs->tf_fs = _udatasel;
507 regs->tf_ss = _udatasel;
509 mtx_lock(&psp->ps_mtx);
511 #endif /* COMPAT_FREEBSD4 */
514 sendsig(catcher, sig, mask, code)
520 struct sigframe sf, *sfp;
525 struct trapframe *regs;
530 PROC_LOCK_ASSERT(p, MA_OWNED);
532 mtx_assert(&psp->ps_mtx, MA_OWNED);
533 #ifdef COMPAT_FREEBSD4
534 if (SIGISMEMBER(psp->ps_freebsd4, sig)) {
535 freebsd4_sendsig(catcher, sig, mask, code);
540 if (SIGISMEMBER(psp->ps_osigset, sig)) {
541 osendsig(catcher, sig, mask, code);
546 oonstack = sigonstack(regs->tf_esp);
548 /* Save user context. */
549 bzero(&sf, sizeof(sf));
550 sf.sf_uc.uc_sigmask = *mask;
551 sf.sf_uc.uc_stack = p->p_sigstk;
552 sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK)
553 ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE;
554 sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0;
555 sf.sf_uc.uc_mcontext.mc_gs = rgs();
556 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_fs, sizeof(*regs));
557 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext); /* magic */
558 get_fpcontext(td, &sf.sf_uc.uc_mcontext);
561 /* Allocate space for the signal handler context. */
562 if ((p->p_flag & P_ALTSTACK) != 0 && !oonstack &&
563 SIGISMEMBER(psp->ps_sigonstack, sig)) {
564 sp = p->p_sigstk.ss_sp +
565 p->p_sigstk.ss_size - sizeof(struct sigframe);
566 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
567 p->p_sigstk.ss_flags |= SS_ONSTACK;
570 sp = (char *)regs->tf_esp - sizeof(struct sigframe);
571 /* Align to 16 bytes. */
572 sfp = (struct sigframe *)((unsigned int)sp & ~0xF);
574 /* Translate the signal if appropriate. */
575 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
576 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
578 /* Build the argument list for the signal handler. */
580 sf.sf_ucontext = (register_t)&sfp->sf_uc;
581 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
582 /* Signal handler installed with SA_SIGINFO. */
583 sf.sf_siginfo = (register_t)&sfp->sf_si;
584 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
586 /* Fill in POSIX parts */
587 sf.sf_si.si_signo = sig;
588 sf.sf_si.si_code = code;
589 sf.sf_si.si_addr = (void *)regs->tf_err;
591 /* Old FreeBSD-style arguments. */
592 sf.sf_siginfo = code;
593 sf.sf_addr = regs->tf_err;
594 sf.sf_ahu.sf_handler = catcher;
596 mtx_unlock(&psp->ps_mtx);
600 * If we're a vm86 process, we want to save the segment registers.
601 * We also change eflags to be our emulated eflags, not the actual
604 if (regs->tf_eflags & PSL_VM) {
605 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
606 struct vm86_kernel *vm86 = &td->td_pcb->pcb_ext->ext_vm86;
608 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
609 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
610 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
611 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
613 if (vm86->vm86_has_vme == 0)
614 sf.sf_uc.uc_mcontext.mc_eflags =
615 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
616 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
619 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
620 * syscalls made by the signal handler. This just avoids
621 * wasting time for our lazy fixup of such faults. PSL_NT
622 * does nothing in vm86 mode, but vm86 programs can set it
623 * almost legitimately in probes for old cpu types.
625 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
629 * Copy the sigframe out to the user's stack.
631 if (copyout(&sf, sfp, sizeof(*sfp)) != 0) {
633 printf("process %ld has trashed its stack\n", (long)p->p_pid);
639 regs->tf_esp = (int)sfp;
640 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
641 regs->tf_eflags &= ~PSL_T;
642 regs->tf_cs = _ucodesel;
643 regs->tf_ds = _udatasel;
644 regs->tf_es = _udatasel;
645 regs->tf_fs = _udatasel;
646 regs->tf_ss = _udatasel;
648 mtx_lock(&psp->ps_mtx);
652 * Build siginfo_t for SA thread
655 thread_siginfo(int sig, u_long code, siginfo_t *si)
662 PROC_LOCK_ASSERT(p, MA_OWNED);
664 bzero(si, sizeof(*si));
667 si->si_addr = (void *)td->td_frame->tf_err;
668 /* XXXKSE fill other fields */
672 * System call to cleanup state after a signal
673 * has been taken. Reset signal mask and
674 * stack state from context left by sendsig (above).
675 * Return to previous pc and psl as specified by
676 * context left by sendsig. Check carefully to
677 * make sure that the user has not modified the
678 * state to gain improper privileges.
686 struct osigreturn_args /* {
687 struct osigcontext *sigcntxp;
690 struct osigcontext sc;
691 struct trapframe *regs;
692 struct osigcontext *scp;
693 struct proc *p = td->td_proc;
697 error = copyin(uap->sigcntxp, &sc, sizeof(sc));
702 if (eflags & PSL_VM) {
703 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
704 struct vm86_kernel *vm86;
707 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
708 * set up the vm86 area, and we can't enter vm86 mode.
710 if (td->td_pcb->pcb_ext == 0)
712 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
713 if (vm86->vm86_inited == 0)
716 /* Go back to user mode if both flags are set. */
717 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
718 trapsignal(td, SIGBUS, 0);
720 if (vm86->vm86_has_vme) {
721 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
722 (eflags & VME_USERCHANGE) | PSL_VM;
724 vm86->vm86_eflags = eflags; /* save VIF, VIP */
725 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
726 (eflags & VM_USERCHANGE) | PSL_VM;
728 tf->tf_vm86_ds = scp->sc_ds;
729 tf->tf_vm86_es = scp->sc_es;
730 tf->tf_vm86_fs = scp->sc_fs;
731 tf->tf_vm86_gs = scp->sc_gs;
732 tf->tf_ds = _udatasel;
733 tf->tf_es = _udatasel;
734 tf->tf_fs = _udatasel;
737 * Don't allow users to change privileged or reserved flags.
740 * XXX do allow users to change the privileged flag PSL_RF.
741 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
742 * should sometimes set it there too. tf_eflags is kept in
743 * the signal context during signal handling and there is no
744 * other place to remember it, so the PSL_RF bit may be
745 * corrupted by the signal handler without us knowing.
746 * Corruption of the PSL_RF bit at worst causes one more or
747 * one less debugger trap, so allowing it is fairly harmless.
749 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
754 * Don't allow users to load a valid privileged %cs. Let the
755 * hardware check for invalid selectors, excess privilege in
756 * other selectors, invalid %eip's and invalid %esp's.
758 if (!CS_SECURE(scp->sc_cs)) {
759 trapsignal(td, SIGBUS, T_PROTFLT);
762 regs->tf_ds = scp->sc_ds;
763 regs->tf_es = scp->sc_es;
764 regs->tf_fs = scp->sc_fs;
767 /* Restore remaining registers. */
768 regs->tf_eax = scp->sc_eax;
769 regs->tf_ebx = scp->sc_ebx;
770 regs->tf_ecx = scp->sc_ecx;
771 regs->tf_edx = scp->sc_edx;
772 regs->tf_esi = scp->sc_esi;
773 regs->tf_edi = scp->sc_edi;
774 regs->tf_cs = scp->sc_cs;
775 regs->tf_ss = scp->sc_ss;
776 regs->tf_isp = scp->sc_isp;
777 regs->tf_ebp = scp->sc_fp;
778 regs->tf_esp = scp->sc_sp;
779 regs->tf_eip = scp->sc_pc;
780 regs->tf_eflags = eflags;
783 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
784 if (scp->sc_onstack & 1)
785 p->p_sigstk.ss_flags |= SS_ONSTACK;
787 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
789 SIGSETOLD(td->td_sigmask, scp->sc_mask);
790 SIG_CANTMASK(td->td_sigmask);
793 return (EJUSTRETURN);
795 #endif /* COMPAT_43 */
797 #ifdef COMPAT_FREEBSD4
802 freebsd4_sigreturn(td, uap)
804 struct freebsd4_sigreturn_args /* {
805 const ucontext4 *sigcntxp;
809 struct proc *p = td->td_proc;
810 struct trapframe *regs;
811 const struct ucontext4 *ucp;
812 int cs, eflags, error;
814 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
819 eflags = ucp->uc_mcontext.mc_eflags;
820 if (eflags & PSL_VM) {
821 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
822 struct vm86_kernel *vm86;
825 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
826 * set up the vm86 area, and we can't enter vm86 mode.
828 if (td->td_pcb->pcb_ext == 0)
830 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
831 if (vm86->vm86_inited == 0)
834 /* Go back to user mode if both flags are set. */
835 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
836 trapsignal(td, SIGBUS, 0);
838 if (vm86->vm86_has_vme) {
839 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
840 (eflags & VME_USERCHANGE) | PSL_VM;
842 vm86->vm86_eflags = eflags; /* save VIF, VIP */
843 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
844 (eflags & VM_USERCHANGE) | PSL_VM;
846 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
847 tf->tf_eflags = eflags;
848 tf->tf_vm86_ds = tf->tf_ds;
849 tf->tf_vm86_es = tf->tf_es;
850 tf->tf_vm86_fs = tf->tf_fs;
851 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
852 tf->tf_ds = _udatasel;
853 tf->tf_es = _udatasel;
854 tf->tf_fs = _udatasel;
857 * Don't allow users to change privileged or reserved flags.
860 * XXX do allow users to change the privileged flag PSL_RF.
861 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
862 * should sometimes set it there too. tf_eflags is kept in
863 * the signal context during signal handling and there is no
864 * other place to remember it, so the PSL_RF bit may be
865 * corrupted by the signal handler without us knowing.
866 * Corruption of the PSL_RF bit at worst causes one more or
867 * one less debugger trap, so allowing it is fairly harmless.
869 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
870 printf("freebsd4_sigreturn: eflags = 0x%x\n", eflags);
875 * Don't allow users to load a valid privileged %cs. Let the
876 * hardware check for invalid selectors, excess privilege in
877 * other selectors, invalid %eip's and invalid %esp's.
879 cs = ucp->uc_mcontext.mc_cs;
880 if (!CS_SECURE(cs)) {
881 printf("freebsd4_sigreturn: cs = 0x%x\n", cs);
882 trapsignal(td, SIGBUS, T_PROTFLT);
886 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
890 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
891 if (ucp->uc_mcontext.mc_onstack & 1)
892 p->p_sigstk.ss_flags |= SS_ONSTACK;
894 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
897 td->td_sigmask = ucp->uc_sigmask;
898 SIG_CANTMASK(td->td_sigmask);
901 return (EJUSTRETURN);
903 #endif /* COMPAT_FREEBSD4 */
911 struct sigreturn_args /* {
912 const __ucontext *sigcntxp;
916 struct proc *p = td->td_proc;
917 struct trapframe *regs;
918 const ucontext_t *ucp;
919 int cs, eflags, error, ret;
921 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
926 eflags = ucp->uc_mcontext.mc_eflags;
927 if (eflags & PSL_VM) {
928 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
929 struct vm86_kernel *vm86;
932 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
933 * set up the vm86 area, and we can't enter vm86 mode.
935 if (td->td_pcb->pcb_ext == 0)
937 vm86 = &td->td_pcb->pcb_ext->ext_vm86;
938 if (vm86->vm86_inited == 0)
941 /* Go back to user mode if both flags are set. */
942 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
943 trapsignal(td, SIGBUS, 0);
945 if (vm86->vm86_has_vme) {
946 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
947 (eflags & VME_USERCHANGE) | PSL_VM;
949 vm86->vm86_eflags = eflags; /* save VIF, VIP */
950 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
951 (eflags & VM_USERCHANGE) | PSL_VM;
953 bcopy(&ucp->uc_mcontext.mc_fs, tf, sizeof(struct trapframe));
954 tf->tf_eflags = eflags;
955 tf->tf_vm86_ds = tf->tf_ds;
956 tf->tf_vm86_es = tf->tf_es;
957 tf->tf_vm86_fs = tf->tf_fs;
958 tf->tf_vm86_gs = ucp->uc_mcontext.mc_gs;
959 tf->tf_ds = _udatasel;
960 tf->tf_es = _udatasel;
961 tf->tf_fs = _udatasel;
964 * Don't allow users to change privileged or reserved flags.
967 * XXX do allow users to change the privileged flag PSL_RF.
968 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
969 * should sometimes set it there too. tf_eflags is kept in
970 * the signal context during signal handling and there is no
971 * other place to remember it, so the PSL_RF bit may be
972 * corrupted by the signal handler without us knowing.
973 * Corruption of the PSL_RF bit at worst causes one more or
974 * one less debugger trap, so allowing it is fairly harmless.
976 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
977 printf("sigreturn: eflags = 0x%x\n", eflags);
982 * Don't allow users to load a valid privileged %cs. Let the
983 * hardware check for invalid selectors, excess privilege in
984 * other selectors, invalid %eip's and invalid %esp's.
986 cs = ucp->uc_mcontext.mc_cs;
987 if (!CS_SECURE(cs)) {
988 printf("sigreturn: cs = 0x%x\n", cs);
989 trapsignal(td, SIGBUS, T_PROTFLT);
993 ret = set_fpcontext(td, &ucp->uc_mcontext);
996 bcopy(&ucp->uc_mcontext.mc_fs, regs, sizeof(*regs));
1000 #if defined(COMPAT_43) || defined(COMPAT_SUNOS)
1001 if (ucp->uc_mcontext.mc_onstack & 1)
1002 p->p_sigstk.ss_flags |= SS_ONSTACK;
1004 p->p_sigstk.ss_flags &= ~SS_ONSTACK;
1007 td->td_sigmask = ucp->uc_sigmask;
1008 SIG_CANTMASK(td->td_sigmask);
1011 return (EJUSTRETURN);
1015 * Machine dependent boot() routine
1017 * I haven't seen anything to put here yet
1018 * Possibly some stuff might be grafted back here from boot()
1026 * Shutdown the CPU as much as possible
1036 * Hook to idle the CPU when possible. In the SMP case we default to
1037 * off because a halted cpu will not currently pick up a new thread in the
1038 * run queue until the next timer tick. If turned on this will result in
1039 * approximately a 4.2% loss in real time performance in buildworld tests
1040 * (but improves user and sys times oddly enough), and saves approximately
1041 * 5% in power consumption on an idle machine (tests w/2xCPU 1.1GHz P3).
1043 * XXX we need to have a cpu mask of idle cpus and generate an IPI or
1044 * otherwise generate some sort of interrupt to wake up cpus sitting in HLT.
1045 * Then we can have our cake and eat it too.
1047 * XXX I'm turning it on for SMP as well by default for now. It seems to
1048 * help lock contention somewhat, and this is critical for HTT. -Peter
1050 static int cpu_idle_hlt = 1;
1051 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
1052 &cpu_idle_hlt, 0, "Idle loop HLT enable");
1055 * Note that we have to be careful here to avoid a race between checking
1056 * sched_runnable() and actually halting. If we don't do this, we may waste
1057 * the time between calling hlt and the next interrupt even though there
1058 * is a runnable process.
1065 if (mp_grab_cpu_hlt())
1071 if (sched_runnable()) {
1075 * we must absolutely guarentee that hlt is the
1076 * absolute next instruction after sti or we
1077 * introduce a timing window.
1079 __asm __volatile("sti; hlt");
1085 * Clear registers on exec
1088 exec_setregs(td, entry, stack, ps_strings)
1094 struct trapframe *regs = td->td_frame;
1095 struct pcb *pcb = td->td_pcb;
1097 /* Reset pc->pcb_gs and %gs before possibly invalidating it. */
1098 pcb->pcb_gs = _udatasel;
1101 if (td->td_proc->p_md.md_ldt)
1104 bzero((char *)regs, sizeof(struct trapframe));
1105 regs->tf_eip = entry;
1106 regs->tf_esp = stack;
1107 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1108 regs->tf_ss = _udatasel;
1109 regs->tf_ds = _udatasel;
1110 regs->tf_es = _udatasel;
1111 regs->tf_fs = _udatasel;
1112 regs->tf_cs = _ucodesel;
1114 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1115 regs->tf_ebx = ps_strings;
1118 * Reset the hardware debug registers if they were in use.
1119 * They won't have any meaning for the newly exec'd process.
1121 if (pcb->pcb_flags & PCB_DBREGS) {
1128 if (pcb == PCPU_GET(curpcb)) {
1130 * Clear the debug registers on the running
1131 * CPU, otherwise they will end up affecting
1132 * the next process we switch to.
1136 pcb->pcb_flags &= ~PCB_DBREGS;
1140 * Initialize the math emulator (if any) for the current process.
1141 * Actually, just clear the bit that says that the emulator has
1142 * been initialized. Initialization is delayed until the process
1143 * traps to the emulator (if it is done at all) mainly because
1144 * emulators don't provide an entry point for initialization.
1146 td->td_pcb->pcb_flags &= ~FP_SOFTFP;
1149 * Arrange to trap the next npx or `fwait' instruction (see npx.c
1150 * for why fwait must be trapped at least if there is an npx or an
1151 * emulator). This is mainly to handle the case where npx0 is not
1152 * configured, since the npx routines normally set up the trap
1153 * otherwise. It should be done only at boot time, but doing it
1154 * here allows modifying `npx_exists' for testing the emulator on
1155 * systems with an npx.
1157 load_cr0(rcr0() | CR0_MP | CR0_TS);
1159 /* Initialize the npx (if any) for the current process. */
1161 * XXX the above load_cr0() also initializes it and is a layering
1162 * violation if NPX is configured. It drops the npx partially
1163 * and this would be fatal if we were interrupted now, and decided
1164 * to force the state to the pcb, and checked the invariant
1165 * (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL).
1166 * ALL of this can happen except the check. The check used to
1167 * happen and be fatal later when we didn't complete the drop
1168 * before returning to user mode. This should be fixed properly
1174 * XXX - Linux emulator
1175 * Make sure sure edx is 0x0 on entry. Linux binaries depend
1178 td->td_retval[1] = 0;
1188 cr0 |= CR0_NE; /* Done by npxinit() */
1190 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1192 cr0 |= CR0_WP | CR0_AM;
1199 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1202 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1204 if (!error && req->newptr)
1209 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1210 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1212 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1213 CTLFLAG_RW, &disable_rtc_set, 0, "");
1215 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1216 CTLFLAG_RD, &bootinfo, bootinfo, "");
1218 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1219 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1221 u_long bootdev; /* not a dev_t - encoding is different */
1222 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1223 CTLFLAG_RD, &bootdev, 0, "Maybe the Boot device (not in dev_t format)");
1226 * Initialize 386 and configure to run kernel
1230 * Initialize segments & interrupt table
1234 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1235 static struct gate_descriptor idt0[NIDT];
1236 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1237 union descriptor ldt[NLDT]; /* local descriptor table */
1239 /* table descriptors - used to load tables by microp */
1240 struct region_descriptor r_gdt, r_idt;
1243 int private_tss; /* flag indicating private tss */
1245 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1246 extern int has_f00f_bug;
1249 static struct i386tss dblfault_tss;
1250 static char dblfault_stack[PAGE_SIZE];
1252 extern struct user *proc0uarea;
1253 extern vm_offset_t proc0kstack;
1256 /* software prototypes -- in more palatable form */
1257 struct soft_segment_descriptor gdt_segs[] = {
1258 /* GNULL_SEL 0 Null Descriptor */
1259 { 0x0, /* segment base address */
1261 0, /* segment type */
1262 0, /* segment descriptor priority level */
1263 0, /* segment descriptor present */
1265 0, /* default 32 vs 16 bit size */
1266 0 /* limit granularity (byte/page units)*/ },
1267 /* GCODE_SEL 1 Code Descriptor for kernel */
1268 { 0x0, /* segment base address */
1269 0xfffff, /* length - all address space */
1270 SDT_MEMERA, /* segment type */
1271 0, /* segment descriptor priority level */
1272 1, /* segment descriptor present */
1274 1, /* default 32 vs 16 bit size */
1275 1 /* limit granularity (byte/page units)*/ },
1276 /* GDATA_SEL 2 Data Descriptor for kernel */
1277 { 0x0, /* segment base address */
1278 0xfffff, /* length - all address space */
1279 SDT_MEMRWA, /* segment type */
1280 0, /* segment descriptor priority level */
1281 1, /* segment descriptor present */
1283 1, /* default 32 vs 16 bit size */
1284 1 /* limit granularity (byte/page units)*/ },
1285 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1286 { 0x0, /* segment base address */
1287 0xfffff, /* length - all address space */
1288 SDT_MEMRWA, /* segment type */
1289 0, /* segment descriptor priority level */
1290 1, /* segment descriptor present */
1292 1, /* default 32 vs 16 bit size */
1293 1 /* limit granularity (byte/page units)*/ },
1294 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1296 0x0, /* segment base address */
1297 sizeof(struct i386tss)-1,/* length - all address space */
1298 SDT_SYS386TSS, /* segment type */
1299 0, /* segment descriptor priority level */
1300 1, /* segment descriptor present */
1302 0, /* unused - default 32 vs 16 bit size */
1303 0 /* limit granularity (byte/page units)*/ },
1304 /* GLDT_SEL 5 LDT Descriptor */
1305 { (int) ldt, /* segment base address */
1306 sizeof(ldt)-1, /* length - all address space */
1307 SDT_SYSLDT, /* segment type */
1308 SEL_UPL, /* segment descriptor priority level */
1309 1, /* segment descriptor present */
1311 0, /* unused - default 32 vs 16 bit size */
1312 0 /* limit granularity (byte/page units)*/ },
1313 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1314 { (int) ldt, /* segment base address */
1315 (512 * sizeof(union descriptor)-1), /* length */
1316 SDT_SYSLDT, /* segment type */
1317 0, /* segment descriptor priority level */
1318 1, /* segment descriptor present */
1320 0, /* unused - default 32 vs 16 bit size */
1321 0 /* limit granularity (byte/page units)*/ },
1322 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1323 { 0x0, /* segment base address */
1324 0x0, /* length - all address space */
1325 0, /* segment type */
1326 0, /* segment descriptor priority level */
1327 0, /* segment descriptor present */
1329 0, /* default 32 vs 16 bit size */
1330 0 /* limit granularity (byte/page units)*/ },
1331 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1332 { 0x400, /* segment base address */
1333 0xfffff, /* length */
1334 SDT_MEMRWA, /* segment type */
1335 0, /* segment descriptor priority level */
1336 1, /* segment descriptor present */
1338 1, /* default 32 vs 16 bit size */
1339 1 /* limit granularity (byte/page units)*/ },
1340 /* GPANIC_SEL 9 Panic Tss Descriptor */
1341 { (int) &dblfault_tss, /* segment base address */
1342 sizeof(struct i386tss)-1,/* length - all address space */
1343 SDT_SYS386TSS, /* segment type */
1344 0, /* segment descriptor priority level */
1345 1, /* segment descriptor present */
1347 0, /* unused - default 32 vs 16 bit size */
1348 0 /* limit granularity (byte/page units)*/ },
1349 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1350 { 0, /* segment base address (overwritten) */
1351 0xfffff, /* length */
1352 SDT_MEMERA, /* segment type */
1353 0, /* segment descriptor priority level */
1354 1, /* segment descriptor present */
1356 0, /* default 32 vs 16 bit size */
1357 1 /* limit granularity (byte/page units)*/ },
1358 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1359 { 0, /* segment base address (overwritten) */
1360 0xfffff, /* length */
1361 SDT_MEMERA, /* segment type */
1362 0, /* segment descriptor priority level */
1363 1, /* segment descriptor present */
1365 0, /* default 32 vs 16 bit size */
1366 1 /* limit granularity (byte/page units)*/ },
1367 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1368 { 0, /* segment base address (overwritten) */
1369 0xfffff, /* length */
1370 SDT_MEMRWA, /* segment type */
1371 0, /* segment descriptor priority level */
1372 1, /* segment descriptor present */
1374 1, /* default 32 vs 16 bit size */
1375 1 /* limit granularity (byte/page units)*/ },
1376 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1377 { 0, /* segment base address (overwritten) */
1378 0xfffff, /* length */
1379 SDT_MEMRWA, /* segment type */
1380 0, /* segment descriptor priority level */
1381 1, /* segment descriptor present */
1383 0, /* default 32 vs 16 bit size */
1384 1 /* limit granularity (byte/page units)*/ },
1385 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1386 { 0, /* segment base address (overwritten) */
1387 0xfffff, /* length */
1388 SDT_MEMRWA, /* segment type */
1389 0, /* segment descriptor priority level */
1390 1, /* segment descriptor present */
1392 0, /* default 32 vs 16 bit size */
1393 1 /* limit granularity (byte/page units)*/ },
1396 static struct soft_segment_descriptor ldt_segs[] = {
1397 /* Null Descriptor - overwritten by call gate */
1398 { 0x0, /* segment base address */
1399 0x0, /* length - all address space */
1400 0, /* segment type */
1401 0, /* segment descriptor priority level */
1402 0, /* segment descriptor present */
1404 0, /* default 32 vs 16 bit size */
1405 0 /* limit granularity (byte/page units)*/ },
1406 /* Null Descriptor - overwritten by call gate */
1407 { 0x0, /* segment base address */
1408 0x0, /* length - all address space */
1409 0, /* segment type */
1410 0, /* segment descriptor priority level */
1411 0, /* segment descriptor present */
1413 0, /* default 32 vs 16 bit size */
1414 0 /* limit granularity (byte/page units)*/ },
1415 /* Null Descriptor - overwritten by call gate */
1416 { 0x0, /* segment base address */
1417 0x0, /* length - all address space */
1418 0, /* segment type */
1419 0, /* segment descriptor priority level */
1420 0, /* segment descriptor present */
1422 0, /* default 32 vs 16 bit size */
1423 0 /* limit granularity (byte/page units)*/ },
1424 /* Code Descriptor for user */
1425 { 0x0, /* segment base address */
1426 0xfffff, /* length - all address space */
1427 SDT_MEMERA, /* segment type */
1428 SEL_UPL, /* segment descriptor priority level */
1429 1, /* segment descriptor present */
1431 1, /* default 32 vs 16 bit size */
1432 1 /* limit granularity (byte/page units)*/ },
1433 /* Null Descriptor - overwritten by call gate */
1434 { 0x0, /* segment base address */
1435 0x0, /* length - all address space */
1436 0, /* segment type */
1437 0, /* segment descriptor priority level */
1438 0, /* segment descriptor present */
1440 0, /* default 32 vs 16 bit size */
1441 0 /* limit granularity (byte/page units)*/ },
1442 /* Data Descriptor for user */
1443 { 0x0, /* segment base address */
1444 0xfffff, /* length - all address space */
1445 SDT_MEMRWA, /* segment type */
1446 SEL_UPL, /* segment descriptor priority level */
1447 1, /* segment descriptor present */
1449 1, /* default 32 vs 16 bit size */
1450 1 /* limit granularity (byte/page units)*/ },
1454 setidt(idx, func, typ, dpl, selec)
1461 struct gate_descriptor *ip;
1464 ip->gd_looffset = (int)func;
1465 ip->gd_selector = selec;
1471 ip->gd_hioffset = ((int)func)>>16 ;
1474 #define IDTVEC(name) __CONCAT(X,name)
1477 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1478 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1479 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1480 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1481 IDTVEC(xmm), IDTVEC(lcall_syscall), IDTVEC(int0x80_syscall);
1485 struct segment_descriptor *sd;
1486 struct soft_segment_descriptor *ssd;
1488 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1489 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1490 ssd->ssd_type = sd->sd_type;
1491 ssd->ssd_dpl = sd->sd_dpl;
1492 ssd->ssd_p = sd->sd_p;
1493 ssd->ssd_def32 = sd->sd_def32;
1494 ssd->ssd_gran = sd->sd_gran;
1497 #define PHYSMAP_SIZE (2 * 8)
1500 * Populate the (physmap) array with base/bound pairs describing the
1501 * available physical memory in the system, then test this memory and
1502 * build the phys_avail array describing the actually-available memory.
1504 * If we cannot accurately determine the physical memory map, then use
1505 * value from the 0xE801 call, and failing that, the RTC.
1507 * Total memory size may be set by the kernel environment variable
1508 * hw.physmem or the compile-time define MAXMEM.
1510 * XXX first should be vm_paddr_t.
1513 getmemsize(int first)
1516 int i, physmap_idx, pa_indx, pg_n;
1517 u_int basemem, extmem, under16;
1518 vm_offset_t pa, physmap[PHYSMAP_SIZE];
1522 int i, physmap_idx, pa_indx;
1523 u_int basemem, extmem;
1524 struct vm86frame vmf;
1525 struct vm86context vmc;
1526 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1529 struct bios_smap *smap;
1533 /* XXX - some of EPSON machines can't use PG_N */
1535 if (pc98_machine_type & M_EPSON_PC98) {
1536 switch (epson_machine_id) {
1540 case 0x34: /* PC-486HX */
1541 case 0x35: /* PC-486HG */
1542 case 0x3B: /* PC-486HA */
1547 bzero(physmap, sizeof(physmap));
1550 * Perform "base memory" related probes & setup
1552 under16 = pc98_getmemsize(&basemem, &extmem);
1553 if (basemem > 640) {
1554 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1560 * XXX if biosbasemem is now < 640, there is a `hole'
1561 * between the end of base memory and the start of
1562 * ISA memory. The hole may be empty or it may
1563 * contain BIOS code or data. Map it read/write so
1564 * that the BIOS can write to it. (Memory from 0 to
1565 * the physical end of the kernel is mapped read-only
1566 * to begin with and then parts of it are remapped.
1567 * The parts that aren't remapped form holes that
1568 * remain read-only and are unused by the kernel.
1569 * The base memory area is below the physical end of
1570 * the kernel and right now forms a read-only hole.
1571 * The part of it from PAGE_SIZE to
1572 * (trunc_page(biosbasemem * 1024) - 1) will be
1573 * remapped and used by the kernel later.)
1575 * This code is similar to the code used in
1576 * pmap_mapdev, but since no memory needs to be
1577 * allocated we simply change the mapping.
1579 for (pa = trunc_page(basemem * 1024);
1580 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1581 pmap_kenter(KERNBASE + pa, pa);
1584 * if basemem != 640, map pages r/w into vm86 page table so
1585 * that the bios can scribble on it.
1587 pte = (pt_entry_t *)vm86paddr;
1588 for (i = basemem / 4; i < 160; i++)
1589 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1593 bzero(&vmf, sizeof(struct vm86frame));
1594 bzero(physmap, sizeof(physmap));
1598 * map page 1 R/W into the kernel page table so we can use it
1599 * as a buffer. The kernel will unmap this page later.
1601 pmap_kenter(KERNBASE + (1 << PAGE_SHIFT), 1 << PAGE_SHIFT);
1604 * get memory map with INT 15:E820
1607 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1608 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1613 vmf.vmf_eax = 0xE820;
1614 vmf.vmf_edx = SMAP_SIG;
1615 vmf.vmf_ecx = sizeof(struct bios_smap);
1616 i = vm86_datacall(0x15, &vmf, &vmc);
1617 if (i || vmf.vmf_eax != SMAP_SIG)
1619 if (boothowto & RB_VERBOSE)
1620 printf("SMAP type=%02x base=%016llx len=%016llx\n",
1621 smap->type, smap->base, smap->length);
1623 if (smap->type != 0x01)
1626 if (smap->length == 0)
1629 if (smap->base >= 0xffffffff) {
1630 printf("%uK of memory above 4GB ignored\n",
1631 (u_int)(smap->length / 1024));
1635 for (i = 0; i <= physmap_idx; i += 2) {
1636 if (smap->base < physmap[i + 1]) {
1637 if (boothowto & RB_VERBOSE)
1639 "Overlapping or non-montonic memory region, ignoring second region\n");
1644 if (smap->base == physmap[physmap_idx + 1]) {
1645 physmap[physmap_idx + 1] += smap->length;
1650 if (physmap_idx == PHYSMAP_SIZE) {
1652 "Too many segments in the physical address map, giving up\n");
1655 physmap[physmap_idx] = smap->base;
1656 physmap[physmap_idx + 1] = smap->base + smap->length;
1658 } while (vmf.vmf_ebx != 0);
1661 * Perform "base memory" related probes & setup
1663 for (i = 0; i <= physmap_idx; i += 2) {
1664 if (physmap[i] == 0x00000000) {
1665 basemem = physmap[i + 1] / 1024;
1670 /* Fall back to the old compatibility function for base memory */
1672 vm86_intcall(0x12, &vmf);
1673 basemem = vmf.vmf_ax;
1676 if (basemem > 640) {
1677 printf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1683 * XXX if biosbasemem is now < 640, there is a `hole'
1684 * between the end of base memory and the start of
1685 * ISA memory. The hole may be empty or it may
1686 * contain BIOS code or data. Map it read/write so
1687 * that the BIOS can write to it. (Memory from 0 to
1688 * the physical end of the kernel is mapped read-only
1689 * to begin with and then parts of it are remapped.
1690 * The parts that aren't remapped form holes that
1691 * remain read-only and are unused by the kernel.
1692 * The base memory area is below the physical end of
1693 * the kernel and right now forms a read-only hole.
1694 * The part of it from PAGE_SIZE to
1695 * (trunc_page(biosbasemem * 1024) - 1) will be
1696 * remapped and used by the kernel later.)
1698 * This code is similar to the code used in
1699 * pmap_mapdev, but since no memory needs to be
1700 * allocated we simply change the mapping.
1702 for (pa = trunc_page(basemem * 1024);
1703 pa < ISA_HOLE_START; pa += PAGE_SIZE)
1704 pmap_kenter(KERNBASE + pa, pa);
1707 * if basemem != 640, map pages r/w into vm86 page table so
1708 * that the bios can scribble on it.
1710 pte = (pt_entry_t *)vm86paddr;
1711 for (i = basemem / 4; i < 160; i++)
1712 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1714 if (physmap[1] != 0)
1718 * If we failed above, try memory map with INT 15:E801
1720 vmf.vmf_ax = 0xE801;
1721 if (vm86_intcall(0x15, &vmf) == 0) {
1722 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1726 vm86_intcall(0x15, &vmf);
1727 extmem = vmf.vmf_ax;
1730 * Prefer the RTC value for extended memory.
1732 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1737 * Special hack for chipsets that still remap the 384k hole when
1738 * there's 16MB of memory - this really confuses people that
1739 * are trying to use bus mastering ISA controllers with the
1740 * "16MB limit"; they only have 16MB, but the remapping puts
1741 * them beyond the limit.
1743 * If extended memory is between 15-16MB (16-17MB phys address range),
1746 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1751 physmap[1] = basemem * 1024;
1753 physmap[physmap_idx] = 0x100000;
1754 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1757 if ((under16 != 16 * 1024) && (extmem > 15 * 1024)) {
1758 /* 15M - 16M region is cut off, so need to divide chunk */
1759 physmap[physmap_idx + 1] = under16 * 1024;
1761 physmap[physmap_idx] = 0x1000000;
1762 physmap[physmap_idx + 1] = physmap[2] + extmem * 1024;
1768 * Now, physmap contains a map of physical memory.
1772 /* make hole for AP bootstrap code */
1773 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1775 /* look for the MP hardware - needed for apic addresses */
1780 * Maxmem isn't the "maximum memory", it's one larger than the
1781 * highest page of the physical address space. It should be
1782 * called something like "Maxphyspage". We may adjust this
1783 * based on ``hw.physmem'' and the results of the memory test.
1785 Maxmem = atop(physmap[physmap_idx + 1]);
1788 Maxmem = MAXMEM / 4;
1792 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1793 * for the appropriate modifiers. This overrides MAXMEM.
1795 if ((cp = getenv("hw.physmem")) != NULL) {
1796 u_int64_t AllowMem, sanity;
1799 sanity = AllowMem = strtouq(cp, &ep, 0);
1800 if ((ep != cp) && (*ep != 0)) {
1813 AllowMem = sanity = 0;
1815 if (AllowMem < sanity)
1819 printf("Ignoring invalid memory size of '%s'\n", cp);
1821 Maxmem = atop(AllowMem);
1825 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1826 (boothowto & RB_VERBOSE))
1827 printf("Physical memory use set to %ldK\n", Maxmem * 4);
1830 * If Maxmem has been increased beyond what the system has detected,
1831 * extend the last memory segment to the new limit.
1833 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1834 physmap[physmap_idx + 1] = ptoa((vm_paddr_t)Maxmem);
1836 /* call pmap initialization to make new kernel address space */
1837 pmap_bootstrap(first, 0);
1840 * Size up each available chunk of physical memory.
1842 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1844 phys_avail[pa_indx++] = physmap[0];
1845 phys_avail[pa_indx] = physmap[0];
1849 * physmap is in bytes, so when converting to page boundaries,
1850 * round up the start address and round down the end address.
1852 for (i = 0; i <= physmap_idx; i += 2) {
1855 end = ptoa((vm_paddr_t)Maxmem);
1856 if (physmap[i + 1] < end)
1857 end = trunc_page(physmap[i + 1]);
1858 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1860 int *ptr = (int *)CADDR1;
1863 * block out kernel memory as not available.
1865 if (pa >= 0x100000 && pa < first)
1871 * map page into kernel: valid, read/write,non-cacheable
1874 *pte = pa | PG_V | PG_RW | pg_n;
1876 *pte = pa | PG_V | PG_RW | PG_N;
1882 * Test for alternating 1's and 0's
1884 *(volatile int *)ptr = 0xaaaaaaaa;
1885 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1889 * Test for alternating 0's and 1's
1891 *(volatile int *)ptr = 0x55555555;
1892 if (*(volatile int *)ptr != 0x55555555) {
1898 *(volatile int *)ptr = 0xffffffff;
1899 if (*(volatile int *)ptr != 0xffffffff) {
1905 *(volatile int *)ptr = 0x0;
1906 if (*(volatile int *)ptr != 0x0) {
1910 * Restore original value.
1915 * Adjust array of valid/good pages.
1917 if (page_bad == TRUE) {
1921 * If this good page is a continuation of the
1922 * previous set of good pages, then just increase
1923 * the end pointer. Otherwise start a new chunk.
1924 * Note that "end" points one higher than end,
1925 * making the range >= start and < end.
1926 * If we're also doing a speculative memory
1927 * test and we at or past the end, bump up Maxmem
1928 * so that we keep going. The first bad page
1929 * will terminate the loop.
1931 if (phys_avail[pa_indx] == pa) {
1932 phys_avail[pa_indx] += PAGE_SIZE;
1935 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1937 "Too many holes in the physical address space, giving up\n");
1941 phys_avail[pa_indx++] = pa; /* start */
1942 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1952 * The last chunk must contain at least one page plus the message
1953 * buffer to avoid complicating other code (message buffer address
1954 * calculation, etc.).
1956 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1957 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1958 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1959 phys_avail[pa_indx--] = 0;
1960 phys_avail[pa_indx--] = 0;
1963 Maxmem = atop(phys_avail[pa_indx]);
1965 /* Trim off space for the message buffer. */
1966 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1968 avail_end = phys_avail[pa_indx];
1975 struct gate_descriptor *gdp;
1976 int gsel_tss, metadata_missing, off, x;
1978 /* table descriptors - used to load tables by microp */
1979 struct region_descriptor r_gdt, r_idt;
1983 proc0.p_uarea = proc0uarea;
1984 thread0.td_kstack = proc0kstack;
1985 thread0.td_pcb = (struct pcb *)
1986 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1987 atdevbase = ISA_HOLE_START + KERNBASE;
1990 * This may be done better later if it gets more high level
1991 * components in it. If so just link td->td_proc here.
1993 proc_linkup(&proc0, &ksegrp0, &kse0, &thread0);
2002 metadata_missing = 0;
2003 if (bootinfo.bi_modulep) {
2004 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
2005 preload_bootstrap_relocate(KERNBASE);
2007 metadata_missing = 1;
2010 kern_envp = static_env;
2011 else if (bootinfo.bi_envp)
2012 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
2014 /* Init basic tunables, hz etc */
2018 * make gdt memory segments, the code segment goes up to end of the
2019 * page with etext in it, the data segment goes to the end of
2023 * XXX text protection is temporarily (?) disabled. The limit was
2024 * i386_btop(round_page(etext)) - 1.
2026 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
2027 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
2029 pc = &SMP_prvspace[0].pcpu;
2030 gdt_segs[GPRIV_SEL].ssd_limit =
2031 atop(sizeof(struct privatespace) - 1);
2034 gdt_segs[GPRIV_SEL].ssd_limit =
2035 atop(sizeof(struct pcpu) - 1);
2037 gdt_segs[GPRIV_SEL].ssd_base = (int) pc;
2038 gdt_segs[GPROC0_SEL].ssd_base = (int) &pc->pc_common_tss;
2040 for (x = 0; x < NGDT; x++)
2041 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2043 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2044 r_gdt.rd_base = (int) gdt;
2047 pcpu_init(pc, 0, sizeof(struct pcpu));
2048 PCPU_SET(prvspace, pc);
2049 PCPU_SET(curthread, &thread0);
2052 * Initialize mutexes.
2054 * icu_lock: in order to allow an interrupt to occur in a critical
2055 * section, to set pcpu->ipending (etc...) properly, we
2056 * must be able to get the icu lock, so it can't be
2060 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_RECURSE);
2061 mtx_init(&icu_lock, "icu", NULL, MTX_SPIN | MTX_NOWITNESS);
2063 /* make ldt memory segments */
2065 * XXX - VM_MAXUSER_ADDRESS is an end address, not a max. And it
2066 * should be spelled ...MAX_USER...
2068 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
2069 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAXUSER_ADDRESS - 1);
2070 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2071 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2073 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2075 PCPU_SET(currentldt, _default_ldt);
2078 for (x = 0; x < NIDT; x++)
2079 setidt(x, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2080 GSEL(GCODE_SEL, SEL_KPL));
2081 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL,
2082 GSEL(GCODE_SEL, SEL_KPL));
2083 setidt(1, &IDTVEC(dbg), SDT_SYS386IGT, SEL_KPL,
2084 GSEL(GCODE_SEL, SEL_KPL));
2085 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL,
2086 GSEL(GCODE_SEL, SEL_KPL));
2087 setidt(3, &IDTVEC(bpt), SDT_SYS386IGT, SEL_UPL,
2088 GSEL(GCODE_SEL, SEL_KPL));
2089 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL,
2090 GSEL(GCODE_SEL, SEL_KPL));
2091 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL,
2092 GSEL(GCODE_SEL, SEL_KPL));
2093 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2094 GSEL(GCODE_SEL, SEL_KPL));
2095 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL
2096 , GSEL(GCODE_SEL, SEL_KPL));
2097 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2098 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL,
2099 GSEL(GCODE_SEL, SEL_KPL));
2100 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL,
2101 GSEL(GCODE_SEL, SEL_KPL));
2102 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL,
2103 GSEL(GCODE_SEL, SEL_KPL));
2104 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL,
2105 GSEL(GCODE_SEL, SEL_KPL));
2106 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2107 GSEL(GCODE_SEL, SEL_KPL));
2108 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL,
2109 GSEL(GCODE_SEL, SEL_KPL));
2110 setidt(15, &IDTVEC(rsvd), SDT_SYS386TGT, SEL_KPL,
2111 GSEL(GCODE_SEL, SEL_KPL));
2112 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL,
2113 GSEL(GCODE_SEL, SEL_KPL));
2114 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL,
2115 GSEL(GCODE_SEL, SEL_KPL));
2116 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL,
2117 GSEL(GCODE_SEL, SEL_KPL));
2118 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL,
2119 GSEL(GCODE_SEL, SEL_KPL));
2120 setidt(0x80, &IDTVEC(int0x80_syscall), SDT_SYS386TGT, SEL_UPL,
2121 GSEL(GCODE_SEL, SEL_KPL));
2123 r_idt.rd_limit = sizeof(idt0) - 1;
2124 r_idt.rd_base = (int) idt;
2128 * Initialize the console before we print anything out.
2132 if (metadata_missing)
2133 printf("WARNING: loader(8) metadata is missing!\n");
2141 if (boothowto & RB_KDB)
2142 Debugger("Boot flags requested debugger");
2145 finishidentcpu(); /* Final stage of CPU initialization */
2146 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL,
2147 GSEL(GCODE_SEL, SEL_KPL));
2148 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL,
2149 GSEL(GCODE_SEL, SEL_KPL));
2150 initializecpu(); /* Initialize CPU registers */
2152 /* make an initial tss so cpu can get interrupt stack on syscall! */
2153 /* Note: -16 is so we can grow the trapframe if we came from vm86 */
2154 PCPU_SET(common_tss.tss_esp0, thread0.td_kstack +
2155 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb) - 16);
2156 PCPU_SET(common_tss.tss_ss0, GSEL(GDATA_SEL, SEL_KPL));
2157 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2159 PCPU_SET(tss_gdt, &gdt[GPROC0_SEL].sd);
2160 PCPU_SET(common_tssd, *PCPU_GET(tss_gdt));
2161 PCPU_SET(common_tss.tss_ioopt, (sizeof (struct i386tss)) << 16);
2164 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2165 dblfault_tss.tss_esp2 = (int)&dblfault_stack[sizeof(dblfault_stack)];
2166 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2167 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2168 dblfault_tss.tss_cr3 = (int)IdlePTD;
2169 dblfault_tss.tss_eip = (int)dblfault_handler;
2170 dblfault_tss.tss_eflags = PSL_KERNEL;
2171 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2172 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2173 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2174 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2175 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2179 init_param2(physmem);
2181 /* now running on new page tables, configured,and u/iom is accessible */
2183 /* Map the message buffer. */
2184 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2185 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2187 msgbufinit(msgbufp, MSGBUF_SIZE);
2189 /* make a call gate to reenter kernel with */
2190 gdp = &ldt[LSYS5CALLS_SEL].gd;
2192 x = (int) &IDTVEC(lcall_syscall);
2193 gdp->gd_looffset = x;
2194 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2196 gdp->gd_type = SDT_SYS386CGT;
2197 gdp->gd_dpl = SEL_UPL;
2199 gdp->gd_hioffset = x >> 16;
2201 /* XXX does this work? */
2202 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2203 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2205 /* transfer to user mode */
2207 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2208 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2210 /* setup proc 0's pcb */
2211 thread0.td_pcb->pcb_flags = 0; /* XXXKSE */
2212 thread0.td_pcb->pcb_cr3 = (int)IdlePTD;
2213 thread0.td_pcb->pcb_ext = 0;
2214 thread0.td_frame = &proc0_tf;
2218 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
2222 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2223 static void f00f_hack(void *unused);
2224 SYSINIT(f00f_hack, SI_SUB_INTRINSIC, SI_ORDER_FIRST, f00f_hack, NULL);
2227 f00f_hack(void *unused) {
2228 struct gate_descriptor *new_idt;
2230 struct region_descriptor r_idt;
2239 printf("Intel Pentium detected, installing workaround for F00F bug\n");
2241 r_idt.rd_limit = sizeof(idt0) - 1;
2243 tmp = kmem_alloc(kernel_map, PAGE_SIZE * 2);
2245 panic("kmem_alloc returned 0");
2246 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2247 panic("kmem_alloc returned non-page-aligned memory");
2248 /* Put the first seven entries in the lower page */
2249 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2250 bcopy(idt, new_idt, sizeof(idt0));
2251 r_idt.rd_base = (int)new_idt;
2254 if (vm_map_protect(kernel_map, tmp, tmp + PAGE_SIZE,
2255 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2256 panic("vm_map_protect failed");
2259 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2262 ptrace_set_pc(struct thread *td, unsigned long addr)
2264 td->td_frame->tf_eip = addr;
2269 ptrace_single_step(struct thread *td)
2271 td->td_frame->tf_eflags |= PSL_T;
2276 fill_regs(struct thread *td, struct reg *regs)
2279 struct trapframe *tp;
2282 regs->r_fs = tp->tf_fs;
2283 regs->r_es = tp->tf_es;
2284 regs->r_ds = tp->tf_ds;
2285 regs->r_edi = tp->tf_edi;
2286 regs->r_esi = tp->tf_esi;
2287 regs->r_ebp = tp->tf_ebp;
2288 regs->r_ebx = tp->tf_ebx;
2289 regs->r_edx = tp->tf_edx;
2290 regs->r_ecx = tp->tf_ecx;
2291 regs->r_eax = tp->tf_eax;
2292 regs->r_eip = tp->tf_eip;
2293 regs->r_cs = tp->tf_cs;
2294 regs->r_eflags = tp->tf_eflags;
2295 regs->r_esp = tp->tf_esp;
2296 regs->r_ss = tp->tf_ss;
2298 regs->r_gs = pcb->pcb_gs;
2303 set_regs(struct thread *td, struct reg *regs)
2306 struct trapframe *tp;
2309 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2310 !CS_SECURE(regs->r_cs))
2312 tp->tf_fs = regs->r_fs;
2313 tp->tf_es = regs->r_es;
2314 tp->tf_ds = regs->r_ds;
2315 tp->tf_edi = regs->r_edi;
2316 tp->tf_esi = regs->r_esi;
2317 tp->tf_ebp = regs->r_ebp;
2318 tp->tf_ebx = regs->r_ebx;
2319 tp->tf_edx = regs->r_edx;
2320 tp->tf_ecx = regs->r_ecx;
2321 tp->tf_eax = regs->r_eax;
2322 tp->tf_eip = regs->r_eip;
2323 tp->tf_cs = regs->r_cs;
2324 tp->tf_eflags = regs->r_eflags;
2325 tp->tf_esp = regs->r_esp;
2326 tp->tf_ss = regs->r_ss;
2328 pcb->pcb_gs = regs->r_gs;
2332 #ifdef CPU_ENABLE_SSE
2334 fill_fpregs_xmm(sv_xmm, sv_87)
2335 struct savexmm *sv_xmm;
2336 struct save87 *sv_87;
2338 register struct env87 *penv_87 = &sv_87->sv_env;
2339 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2342 bzero(sv_87, sizeof(*sv_87));
2344 /* FPU control/status */
2345 penv_87->en_cw = penv_xmm->en_cw;
2346 penv_87->en_sw = penv_xmm->en_sw;
2347 penv_87->en_tw = penv_xmm->en_tw;
2348 penv_87->en_fip = penv_xmm->en_fip;
2349 penv_87->en_fcs = penv_xmm->en_fcs;
2350 penv_87->en_opcode = penv_xmm->en_opcode;
2351 penv_87->en_foo = penv_xmm->en_foo;
2352 penv_87->en_fos = penv_xmm->en_fos;
2355 for (i = 0; i < 8; ++i)
2356 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2360 set_fpregs_xmm(sv_87, sv_xmm)
2361 struct save87 *sv_87;
2362 struct savexmm *sv_xmm;
2364 register struct env87 *penv_87 = &sv_87->sv_env;
2365 register struct envxmm *penv_xmm = &sv_xmm->sv_env;
2368 /* FPU control/status */
2369 penv_xmm->en_cw = penv_87->en_cw;
2370 penv_xmm->en_sw = penv_87->en_sw;
2371 penv_xmm->en_tw = penv_87->en_tw;
2372 penv_xmm->en_fip = penv_87->en_fip;
2373 penv_xmm->en_fcs = penv_87->en_fcs;
2374 penv_xmm->en_opcode = penv_87->en_opcode;
2375 penv_xmm->en_foo = penv_87->en_foo;
2376 penv_xmm->en_fos = penv_87->en_fos;
2379 for (i = 0; i < 8; ++i)
2380 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2382 #endif /* CPU_ENABLE_SSE */
2385 fill_fpregs(struct thread *td, struct fpreg *fpregs)
2387 #ifdef CPU_ENABLE_SSE
2389 fill_fpregs_xmm(&td->td_pcb->pcb_save.sv_xmm,
2390 (struct save87 *)fpregs);
2393 #endif /* CPU_ENABLE_SSE */
2394 bcopy(&td->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2399 set_fpregs(struct thread *td, struct fpreg *fpregs)
2401 #ifdef CPU_ENABLE_SSE
2403 set_fpregs_xmm((struct save87 *)fpregs,
2404 &td->td_pcb->pcb_save.sv_xmm);
2407 #endif /* CPU_ENABLE_SSE */
2408 bcopy(fpregs, &td->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2413 * Get machine context.
2416 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
2418 struct trapframe *tp;
2422 PROC_LOCK(curthread->td_proc);
2423 mcp->mc_onstack = sigonstack(tp->tf_esp);
2424 PROC_UNLOCK(curthread->td_proc);
2425 mcp->mc_gs = td->td_pcb->pcb_gs;
2426 mcp->mc_fs = tp->tf_fs;
2427 mcp->mc_es = tp->tf_es;
2428 mcp->mc_ds = tp->tf_ds;
2429 mcp->mc_edi = tp->tf_edi;
2430 mcp->mc_esi = tp->tf_esi;
2431 mcp->mc_ebp = tp->tf_ebp;
2432 mcp->mc_isp = tp->tf_isp;
2433 mcp->mc_ebx = tp->tf_ebx;
2434 if (clear_ret != 0) {
2438 mcp->mc_eax = tp->tf_eax;
2439 mcp->mc_edx = tp->tf_edx;
2441 mcp->mc_ecx = tp->tf_ecx;
2442 mcp->mc_eip = tp->tf_eip;
2443 mcp->mc_cs = tp->tf_cs;
2444 mcp->mc_eflags = tp->tf_eflags;
2445 mcp->mc_esp = tp->tf_esp;
2446 mcp->mc_ss = tp->tf_ss;
2447 mcp->mc_len = sizeof(*mcp);
2448 get_fpcontext(td, mcp);
2453 * Set machine context.
2455 * However, we don't set any but the user modifiable flags, and we won't
2456 * touch the cs selector.
2459 set_mcontext(struct thread *td, const mcontext_t *mcp)
2461 struct trapframe *tp;
2465 if (mcp->mc_len != sizeof(*mcp))
2467 eflags = (mcp->mc_eflags & PSL_USERCHANGE) |
2468 (tp->tf_eflags & ~PSL_USERCHANGE);
2469 if ((ret = set_fpcontext(td, mcp)) == 0) {
2470 tp->tf_fs = mcp->mc_fs;
2471 tp->tf_es = mcp->mc_es;
2472 tp->tf_ds = mcp->mc_ds;
2473 tp->tf_edi = mcp->mc_edi;
2474 tp->tf_esi = mcp->mc_esi;
2475 tp->tf_ebp = mcp->mc_ebp;
2476 tp->tf_ebx = mcp->mc_ebx;
2477 tp->tf_edx = mcp->mc_edx;
2478 tp->tf_ecx = mcp->mc_ecx;
2479 tp->tf_eax = mcp->mc_eax;
2480 tp->tf_eip = mcp->mc_eip;
2481 tp->tf_eflags = eflags;
2482 tp->tf_esp = mcp->mc_esp;
2483 tp->tf_ss = mcp->mc_ss;
2484 td->td_pcb->pcb_gs = mcp->mc_gs;
2491 get_fpcontext(struct thread *td, mcontext_t *mcp)
2494 mcp->mc_fpformat = _MC_FPFMT_NODEV;
2495 mcp->mc_ownedfp = _MC_FPOWNED_NONE;
2497 union savefpu *addr;
2500 * XXX mc_fpstate might be misaligned, since its declaration is not
2501 * unportabilized using __attribute__((aligned(16))) like the
2502 * declaration of struct savemm, and anyway, alignment doesn't work
2503 * for auto variables since we don't use gcc's pessimal stack
2504 * alignment. Work around this by abusing the spare fields after
2507 * XXX unpessimize most cases by only aligning when fxsave might be
2508 * called, although this requires knowing too much about
2509 * npxgetregs()'s internals.
2511 addr = (union savefpu *)&mcp->mc_fpstate;
2512 if (td == PCPU_GET(fpcurthread) &&
2513 #ifdef CPU_ENABLE_SSE
2516 ((uintptr_t)(void *)addr & 0xF)) {
2518 addr = (void *)((char *)addr + 4);
2519 while ((uintptr_t)(void *)addr & 0xF);
2521 mcp->mc_ownedfp = npxgetregs(td, addr);
2522 if (addr != (union savefpu *)&mcp->mc_fpstate) {
2523 bcopy(addr, &mcp->mc_fpstate, sizeof(mcp->mc_fpstate));
2524 bzero(&mcp->mc_spare2, sizeof(mcp->mc_spare2));
2526 mcp->mc_fpformat = npxformat();
2531 set_fpcontext(struct thread *td, const mcontext_t *mcp)
2533 union savefpu *addr;
2535 if (mcp->mc_fpformat == _MC_FPFMT_NODEV)
2537 else if (mcp->mc_fpformat != _MC_FPFMT_387 &&
2538 mcp->mc_fpformat != _MC_FPFMT_XMM)
2540 else if (mcp->mc_ownedfp == _MC_FPOWNED_NONE)
2541 /* We don't care what state is left in the FPU or PCB. */
2543 else if (mcp->mc_ownedfp == _MC_FPOWNED_FPU ||
2544 mcp->mc_ownedfp == _MC_FPOWNED_PCB) {
2545 /* XXX align as above. */
2546 addr = (union savefpu *)&mcp->mc_fpstate;
2547 if (td == PCPU_GET(fpcurthread) &&
2548 #ifdef CPU_ENABLE_SSE
2551 ((uintptr_t)(void *)addr & 0xF)) {
2553 addr = (void *)((char *)addr + 4);
2554 while ((uintptr_t)(void *)addr & 0xF);
2555 bcopy(&mcp->mc_fpstate, addr, sizeof(mcp->mc_fpstate));
2559 * XXX we violate the dubious requirement that npxsetregs()
2560 * be called with interrupts disabled.
2562 npxsetregs(td, addr);
2565 * Don't bother putting things back where they were in the
2566 * misaligned case, since we know that the caller won't use
2575 fpstate_drop(struct thread *td)
2581 if (PCPU_GET(fpcurthread) == td)
2585 * XXX force a full drop of the npx. The above only drops it if we
2586 * owned it. npxgetregs() has the same bug in the !cpu_fxsr case.
2588 * XXX I don't much like npxgetregs()'s semantics of doing a full
2589 * drop. Dropping only to the pcb matches fnsave's behaviour.
2590 * We only need to drop to !PCB_INITDONE in sendsig(). But
2591 * sendsig() is the only caller of npxgetregs()... perhaps we just
2592 * have too many layers.
2594 curthread->td_pcb->pcb_flags &= ~PCB_NPXINITDONE;
2599 fill_dbregs(struct thread *td, struct dbreg *dbregs)
2604 dbregs->dr[0] = rdr0();
2605 dbregs->dr[1] = rdr1();
2606 dbregs->dr[2] = rdr2();
2607 dbregs->dr[3] = rdr3();
2608 dbregs->dr[4] = rdr4();
2609 dbregs->dr[5] = rdr5();
2610 dbregs->dr[6] = rdr6();
2611 dbregs->dr[7] = rdr7();
2614 dbregs->dr[0] = pcb->pcb_dr0;
2615 dbregs->dr[1] = pcb->pcb_dr1;
2616 dbregs->dr[2] = pcb->pcb_dr2;
2617 dbregs->dr[3] = pcb->pcb_dr3;
2620 dbregs->dr[6] = pcb->pcb_dr6;
2621 dbregs->dr[7] = pcb->pcb_dr7;
2627 set_dbregs(struct thread *td, struct dbreg *dbregs)
2631 u_int32_t mask1, mask2;
2634 load_dr0(dbregs->dr[0]);
2635 load_dr1(dbregs->dr[1]);
2636 load_dr2(dbregs->dr[2]);
2637 load_dr3(dbregs->dr[3]);
2638 load_dr4(dbregs->dr[4]);
2639 load_dr5(dbregs->dr[5]);
2640 load_dr6(dbregs->dr[6]);
2641 load_dr7(dbregs->dr[7]);
2644 * Don't let an illegal value for dr7 get set. Specifically,
2645 * check for undefined settings. Setting these bit patterns
2646 * result in undefined behaviour and can lead to an unexpected
2649 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2650 i++, mask1 <<= 2, mask2 <<= 2)
2651 if ((dbregs->dr[7] & mask1) == mask2)
2657 * Don't let a process set a breakpoint that is not within the
2658 * process's address space. If a process could do this, it
2659 * could halt the system by setting a breakpoint in the kernel
2660 * (if ddb was enabled). Thus, we need to check to make sure
2661 * that no breakpoints are being enabled for addresses outside
2662 * process's address space, unless, perhaps, we were called by
2665 * XXX - what about when the watched area of the user's
2666 * address space is written into from within the kernel
2667 * ... wouldn't that still cause a breakpoint to be generated
2668 * from within kernel mode?
2671 if (suser(td) != 0) {
2672 if (dbregs->dr[7] & 0x3) {
2673 /* dr0 is enabled */
2674 if (dbregs->dr[0] >= VM_MAXUSER_ADDRESS)
2678 if (dbregs->dr[7] & (0x3<<2)) {
2679 /* dr1 is enabled */
2680 if (dbregs->dr[1] >= VM_MAXUSER_ADDRESS)
2684 if (dbregs->dr[7] & (0x3<<4)) {
2685 /* dr2 is enabled */
2686 if (dbregs->dr[2] >= VM_MAXUSER_ADDRESS)
2690 if (dbregs->dr[7] & (0x3<<6)) {
2691 /* dr3 is enabled */
2692 if (dbregs->dr[3] >= VM_MAXUSER_ADDRESS)
2697 pcb->pcb_dr0 = dbregs->dr[0];
2698 pcb->pcb_dr1 = dbregs->dr[1];
2699 pcb->pcb_dr2 = dbregs->dr[2];
2700 pcb->pcb_dr3 = dbregs->dr[3];
2701 pcb->pcb_dr6 = dbregs->dr[6];
2702 pcb->pcb_dr7 = dbregs->dr[7];
2704 pcb->pcb_flags |= PCB_DBREGS;
2711 * Return > 0 if a hardware breakpoint has been hit, and the
2712 * breakpoint was in user space. Return 0, otherwise.
2715 user_dbreg_trap(void)
2717 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2718 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2719 int nbp; /* number of breakpoints that triggered */
2720 caddr_t addr[4]; /* breakpoint addresses */
2724 if ((dr7 & 0x000000ff) == 0) {
2726 * all GE and LE bits in the dr7 register are zero,
2727 * thus the trap couldn't have been caused by the
2728 * hardware debug registers
2735 bp = dr6 & 0x0000000f;
2739 * None of the breakpoint bits are set meaning this
2740 * trap was not caused by any of the debug registers
2746 * at least one of the breakpoints were hit, check to see
2747 * which ones and if any of them are user space addresses
2751 addr[nbp++] = (caddr_t)rdr0();
2754 addr[nbp++] = (caddr_t)rdr1();
2757 addr[nbp++] = (caddr_t)rdr2();
2760 addr[nbp++] = (caddr_t)rdr3();
2763 for (i=0; i<nbp; i++) {
2765 (caddr_t)VM_MAXUSER_ADDRESS) {
2767 * addr[i] is in user space
2774 * None of the breakpoints are in user space.
2782 Debugger(const char *msg)
2784 printf("Debugger(\"%s\") called.\n", msg);
2791 * Provide inb() and outb() as functions. They are normally only
2792 * available as macros calling inlined functions, thus cannot be
2793 * called inside DDB.
2795 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2801 /* silence compiler warnings */
2803 void outb(u_int, u_char);
2810 * We use %%dx and not %1 here because i/o is done at %dx and not at
2811 * %edx, while gcc generates inferior code (movw instead of movl)
2812 * if we tell it to load (u_short) port.
2814 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2819 outb(u_int port, u_char data)
2823 * Use an unnecessary assignment to help gcc's register allocator.
2824 * This make a large difference for gcc-1.40 and a tiny difference
2825 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2826 * best results. gcc-2.6.0 can't handle this.
2829 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));