2 * Copyright (c) 1995, David Greenman
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
32 * adapters. By David Greenman, 29-April-1993
34 * Currently supports the Western Digital/SMC 8003 and 8013 series,
35 * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000,
36 * and a variety of similar clones.
41 * FreeBSD(98) supports:
43 * Allied Telesis CenterCom LA-98-T, SIC-98
44 * D-Link DE-298P, DE-298
45 * ELECOM LANEED LD-BDN
46 * ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF_2711ET
47 * IO-DATA PCLA/T, LA/T-98
50 * MELCO LPC-TJ, LPC-TS, LGY-98, LGH-98, IND-SP, IND-SS, EGY-98
51 * PLANET SMART COM CREDITCARD/2000 PCMCIA, EN-2298
52 * Contec C-NET(98), C-NET(98)E, C-NET(98)L, C-NET(98)E-A, C-NET(98)L-A
57 * Modified for FreeBSD(98) 2.2 by KATO T. of Nagoya University.
59 * LPC-T support routine was contributed by Chikun.
61 * SIC-98 support routine was derived from the code by A. Kojima of
62 * Kyoto University Microcomputer Club (KMC).
67 #include <sys/param.h>
68 #include <sys/systm.h>
69 #include <sys/kernel.h>
70 #include <sys/sockio.h>
71 #include <sys/malloc.h>
73 #include <sys/socket.h>
74 #include <sys/syslog.h>
76 #include <sys/module.h>
79 #include <machine/bus.h>
81 #include <machine/resource.h>
83 #include <net/ethernet.h>
85 #include <net/if_arp.h>
86 #include <net/if_dl.h>
87 #include <net/if_mib.h>
92 #include <net/bridge.h>
95 #include <machine/clock.h>
96 #include <machine/md_var.h>
98 #include <i386/isa/isa_device.h>
99 #include <i386/isa/icu.h>
100 #include <dev/ed/if_edreg.h>
103 /* register offsets */
104 struct pc98_edregister {
113 * ed_softc: per line info and status
116 struct arpcom arpcom; /* ethernet common */
118 char *type_str; /* pointer to type string */
119 u_char vendor; /* interface vendor */
120 u_char type; /* interface type code */
121 u_char gone; /* HW missing, presumed having a good time */
123 u_short asic_addr; /* ASIC I/O bus address */
124 u_short nic_addr; /* NIC (DS8390) I/O bus address */
127 * The following 'proto' variable is part of a work-around for 8013EBT asics
128 * being write-only. It's sort of a prototype/shadow of the real thing.
130 u_char wd_laar_proto;
132 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
133 int is790; /* set by the probe code if the card is 790
137 * HP PC LAN PLUS card support.
140 u_short hpp_options; /* flags controlling behaviour of the HP card */
141 u_short hpp_id; /* software revision and other fields */
142 caddr_t hpp_mem_start; /* Memory-mapped IO register address */
144 caddr_t mem_start; /* NIC memory start address */
145 caddr_t mem_end; /* NIC memory end address */
146 u_long mem_size; /* total NIC memory size */
147 caddr_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
149 u_char mem_shared; /* NIC memory is shared with host */
150 u_char xmit_busy; /* transmitter is busy */
151 u_char txb_cnt; /* number of transmit buffers */
152 u_char txb_inuse; /* number of TX buffers currently in-use */
154 u_char txb_new; /* pointer to where new buffer will be added */
155 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
156 u_short txb_len[8]; /* buffered xmit buffer lengths */
157 u_char tx_page_start; /* first page of TX buffer area */
158 u_char rec_page_start; /* first page of RX ring-buffer */
159 u_char rec_page_stop; /* last page of RX ring-buffer */
160 u_char next_packet; /* pointer to next unread RX packet */
161 struct ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
163 struct pc98_edregister edreg; /* I/O port register offset info */
167 static struct ed_softc ed_softc[NED];
170 #include <pc98/pc98/if_ed98.h>
173 static int ed_attach __P((struct ed_softc *, int, int));
174 static int ed_attach_isa __P((struct isa_device *));
176 static void ed_init __P((void *));
177 static ointhand2_t edintr;
178 static int ed_ioctl __P((struct ifnet *, u_long, caddr_t));
179 static int ed_probe __P((struct isa_device *));
180 static void ed_start __P((struct ifnet *));
181 static void ed_reset __P((struct ifnet *));
182 static void ed_watchdog __P((struct ifnet *));
184 static void ed_stop __P((struct ed_softc *));
185 static int ed_probe_generic8390 __P((struct ed_softc *));
186 static int ed_probe_WD80x3 __P((struct isa_device *));
187 static int ed_probe_3Com __P((struct isa_device *));
188 static int ed_probe_Novell __P((struct isa_device *));
189 static int ed_probe_Novell_generic __P((struct ed_softc *, int, int, int));
190 static int ed_probe_HP_pclanp __P((struct isa_device *));
192 static int ed_shm_testmem __P((struct ed_softc *));
193 static int ed_probe_SIC98 __P((struct isa_device *));
194 static void ed_reset_CNET98 __P((int, int));
195 static void ed_winsel_CNET98 __P((struct ed_softc *, u_short));
196 static int ed_probe_CNET98 __P((struct isa_device *));
197 static int ed_probe_CNET98EL __P((struct isa_device *));
206 void *ed_attach_NE2000_pci __P((int, int));
211 static int ed_probe_pccard __P((struct isa_device *, u_char *));
214 static void ds_getmcaf __P((struct ed_softc *, u_long *));
216 static void ed_get_packet __P((struct ed_softc *, char *, /* u_short */ int, int));
218 static __inline void ed_rint __P((struct ed_softc *));
219 static __inline void ed_xmit __P((struct ed_softc *));
220 static __inline char * ed_ring_copy __P((struct ed_softc *, char *, char *,
222 static void ed_hpp_set_physical_link __P((struct ed_softc *));
223 static void ed_hpp_readmem __P((struct ed_softc *, int, unsigned char *,
225 static u_short ed_hpp_write_mbufs __P((struct ed_softc *, struct mbuf *,
228 static void ed_pio_readmem __P((struct ed_softc *, int, unsigned char *,
230 static void ed_pio_writemem __P((struct ed_softc *, char *,
231 /* u_short */ int, /* u_short */ int));
232 static u_short ed_pio_write_mbufs __P((struct ed_softc *, struct mbuf *,
234 void edintr_sc __P((struct ed_softc *));
236 static void ed_setrcr __P((struct ed_softc *));
238 static u_long ds_crc __P((u_char *ep));
241 #include <sys/select.h>
242 #include <sys/module.h>
243 #include <pccard/cardinfo.h>
244 #include <pccard/slot.h>
247 * PC-Card (PCMCIA) specific code.
249 static int edinit __P((struct pccard_devinfo *));
250 static void edunload __P((struct pccard_devinfo *));
251 static int card_intr __P((struct pccard_devinfo *));
253 PCCARD_MODULE(ed, edinit, edunload, card_intr, 0, net_imask);
256 * Initialize the device - called from Slot manager.
259 edinit(struct pccard_devinfo *devi)
263 struct ed_softc *sc = &ed_softc[devi->isahd.id_unit];
265 /* validate unit number. */
266 if (devi->isahd.id_unit >= NED)
269 * Probe the device. If a value is returned, the
270 * device was found at the location.
273 if (ed_probe_pccard(&devi->isahd, devi->misc) == 0)
276 for (i = 0; i < ETHER_ADDR_LEN; ++i)
279 for (i = 0; i < ETHER_ADDR_LEN; ++i)
280 sc->arpcom.ac_enaddr[i] = devi->misc[i];
281 if (ed_attach_isa(&devi->isahd) == 0)
288 * edunload - unload the driver and clear the table.
290 * This is usually called when the card is ejected, but
291 * can be caused by a modunload of a controller driver.
292 * The idea is to reset the driver's view of the device
293 * and ensure that any driver entry points such as
294 * read and write do not hang.
297 edunload(struct pccard_devinfo *devi)
299 struct ed_softc *sc = &ed_softc[devi->isahd.id_unit];
300 struct ifnet *ifp = &sc->arpcom.ac_if;
303 printf("ed%d: already unloaded\n", devi->isahd.id_unit);
306 ifp->if_flags &= ~IFF_RUNNING;
309 printf("ed%d: unload\n", devi->isahd.id_unit);
313 * card_intr - Shared interrupt called from
314 * front end of PC-Card handler.
317 card_intr(struct pccard_devinfo *devi)
319 edintr_sc(&ed_softc[devi->isahd.id_unit]);
322 #endif /* NCARD > 0 */
324 struct isa_driver eddriver = {
328 1 /* We are ultra sensitive */
332 * Interrupt conversion table for WD/SMC ASIC/83C584
333 * (IRQ* are defined in icu.h)
335 static unsigned short ed_intr_mask[] = {
347 * Interrupt conversion table for 83C790
349 static unsigned short ed_790_intr_mask[] = {
372 * Interrupt conversion table for the HP PC LAN+
375 static unsigned short ed_hpp_intr_mask[] = {
396 * Determine if the device is present
399 * a pointer to an isa_device struct
401 * NULL if device not found
402 * or # of i/o addresses used (if found)
406 struct isa_device *isa_dev;
408 int nports, nports98;
409 int type98 = ED_TYPE98(isa_dev->id_flags);
411 nports98 = pc98_set_register(isa_dev, type98);
414 * Generic probe routine
416 case ED_TYPE98_GENERIC:
420 nports = ed_probe_WD80x3(isa_dev);
424 #if 0 /* XXX - probably not used */
425 nports = ed_probe_3Com(isa_dev);
431 * Allied Telesis CenterCom LA-98-T
433 nports = ed_probe_Novell(isa_dev);
437 #if 0 /* XXX - PC98 has no board of this architechure */
438 nports = ed_probe_HP_pclanp(isa_dev);
445 * NE2000-like board probe routine
449 * ELECOM LANEED LD-BDN
450 * PLANET SMART COM 98 EN-2298
454 * MELCO LGY-98, IND-SP, IND-SS
459 * ICM DT-ET-25, DT-ET-T5, IF-2766ET, IF-2771ET
460 * D-Link DE-298P, DE-298
465 * Contec C-NET(98)E-A, C-NET(98)L-A
473 * NEC PC-9801-107,108
476 nports = ed_probe_Novell(isa_dev);
482 * other board with special probe routine
486 * Allied Telesis SIC-98
488 nports = ed_probe_SIC98(isa_dev);
493 case ED_TYPE98_CNET98EL:
495 * Contec C-NET(98)E/L
497 nports = ed_probe_CNET98EL(isa_dev);
502 case ED_TYPE98_CNET98:
506 nports = ed_probe_CNET98(isa_dev);
511 case ED_TYPE98_NW98X:
515 nports = ed_probe_NW98X(isa_dev);
525 * Generic probe routine for testing for the existance of a DS8390.
526 * Must be called after the NIC has just been reset. This routine
527 * works by looking at certain register values that are guaranteed
528 * to be initialized a certain way after power-up or reset. Seems
529 * not to currently work on the 83C690.
533 * Register reset bits set bits
534 * Command Register (CR) TXP, STA RD2, STP
535 * Interrupt Status (ISR) RST
536 * Interrupt Mask (IMR) All bits
537 * Data Control (DCR) LAS
538 * Transmit Config. (TCR) LB1, LB0
540 * XXX - We only check the CR register.
542 * Return 1 if 8390 was found, 0 if not.
546 ed_probe_generic8390(sc)
549 if ((inb(sc->nic_addr + ED_P0_CR) &
550 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
551 (ED_CR_RD2 | ED_CR_STP))
553 (void)inb(sc->nic_addr + ED_P0_ISR);
560 * Determine if the device is present
563 * a pointer to an isa_device struct
565 * NULL if device not found
566 * or # of i/o addresses used (if found)
570 struct isa_device *isa_dev;
574 nports = ed_probe_WD80x3(isa_dev);
578 nports = ed_probe_3Com(isa_dev);
582 nports = ed_probe_Novell(isa_dev);
586 nports = ed_probe_HP_pclanp(isa_dev);
594 * Generic probe routine for testing for the existance of a DS8390.
595 * Must be called after the NIC has just been reset. This routine
596 * works by looking at certain register values that are guaranteed
597 * to be initialized a certain way after power-up or reset. Seems
598 * not to currently work on the 83C690.
602 * Register reset bits set bits
603 * Command Register (CR) TXP, STA RD2, STP
604 * Interrupt Status (ISR) RST
605 * Interrupt Mask (IMR) All bits
606 * Data Control (DCR) LAS
607 * Transmit Config. (TCR) LB1, LB0
609 * We only look at the CR and ISR registers, however, because looking at
610 * the others would require changing register pages (which would be
611 * intrusive if this isn't an 8390).
613 * Return 1 if 8390 was found, 0 if not.
617 ed_probe_generic8390(sc)
620 if ((inb(sc->nic_addr + ED_P0_CR) &
621 (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
622 (ED_CR_RD2 | ED_CR_STP))
624 if ((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) != ED_ISR_RST)
632 * Probe and vendor-specific initialization routine for SMC/WD80x3 boards
635 ed_probe_WD80x3(isa_dev)
636 struct isa_device *isa_dev;
638 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
640 u_int memsize, maddr;
641 u_char iptr, isa16bit, sum;
643 sc->asic_addr = isa_dev->id_iobase;
644 sc->nic_addr = sc->asic_addr + ED_WD_NIC_OFFSET;
648 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_POW);
653 * Attempt to do a checksum over the station address PROM. If it
654 * fails, it's probably not a SMC/WD board. There is a problem with
655 * this, though: some clone WD boards don't pass the checksum test.
656 * Danpex boards for one.
658 for (sum = 0, i = 0; i < 8; ++i)
659 sum += inb(sc->asic_addr + ED_WD_PROM + i);
661 if (sum != ED_WD_ROM_CHECKSUM_TOTAL) {
664 * Checksum is invalid. This often happens with cheap WD8003E
665 * clones. In this case, the checksum byte (the eighth byte)
666 * seems to always be zero.
668 if (inb(sc->asic_addr + ED_WD_CARD_ID) != ED_TYPE_WD8003E ||
669 inb(sc->asic_addr + ED_WD_PROM + 7) != 0)
672 /* reset card to force it into a known state. */
674 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST | ED_WD_MSR_POW);
676 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_RST);
679 outb(sc->asic_addr + ED_WD_MSR, inb(sc->asic_addr + ED_WD_MSR) & ~ED_WD_MSR_RST);
680 /* wait in the case this card is reading its EEROM */
683 sc->vendor = ED_VENDOR_WD_SMC;
684 sc->type = inb(sc->asic_addr + ED_WD_CARD_ID);
687 * Set initial values for width/size.
692 case ED_TYPE_WD8003S:
693 sc->type_str = "WD8003S";
695 case ED_TYPE_WD8003E:
696 sc->type_str = "WD8003E";
698 case ED_TYPE_WD8003EB:
699 sc->type_str = "WD8003EB";
701 case ED_TYPE_WD8003W:
702 sc->type_str = "WD8003W";
704 case ED_TYPE_WD8013EBT:
705 sc->type_str = "WD8013EBT";
709 case ED_TYPE_WD8013W:
710 sc->type_str = "WD8013W";
714 case ED_TYPE_WD8013EP: /* also WD8003EP */
715 if (inb(sc->asic_addr + ED_WD_ICR)
719 sc->type_str = "WD8013EP";
721 sc->type_str = "WD8003EP";
724 case ED_TYPE_WD8013WC:
725 sc->type_str = "WD8013WC";
729 case ED_TYPE_WD8013EBP:
730 sc->type_str = "WD8013EBP";
734 case ED_TYPE_WD8013EPC:
735 sc->type_str = "WD8013EPC";
739 case ED_TYPE_SMC8216C: /* 8216 has 16K shared mem -- 8416 has 8K */
740 case ED_TYPE_SMC8216T:
741 if (sc->type == ED_TYPE_SMC8216C) {
742 sc->type_str = "SMC8216/SMC8216C";
744 sc->type_str = "SMC8216T";
747 outb(sc->asic_addr + ED_WD790_HWR,
748 inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH);
749 switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) {
750 case ED_WD790_RAR_SZ64:
753 case ED_WD790_RAR_SZ32:
756 case ED_WD790_RAR_SZ16:
759 case ED_WD790_RAR_SZ8:
760 /* 8216 has 16K shared mem -- 8416 has 8K */
761 if (sc->type == ED_TYPE_SMC8216C) {
762 sc->type_str = "SMC8416C/SMC8416BT";
764 sc->type_str = "SMC8416T";
769 outb(sc->asic_addr + ED_WD790_HWR,
770 inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
776 case ED_TYPE_TOSHIBA1:
777 sc->type_str = "Toshiba1";
781 case ED_TYPE_TOSHIBA4:
782 sc->type_str = "Toshiba4";
793 * Make some adjustments to initial values depending on what is found
796 if (isa16bit && (sc->type != ED_TYPE_WD8013EBT)
798 && (sc->type != ED_TYPE_TOSHIBA1) && (sc->type != ED_TYPE_TOSHIBA4)
800 && ((inb(sc->asic_addr + ED_WD_ICR) & ED_WD_ICR_16BIT) == 0)) {
806 printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n",
807 sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize);
808 for (i = 0; i < 8; i++)
809 printf("%x -> %x\n", i, inb(sc->asic_addr + i));
813 * Allow the user to override the autoconfiguration
815 if (isa_dev->id_msize)
816 memsize = isa_dev->id_msize;
818 maddr = (u_int) isa_dev->id_maddr & 0xffffff;
819 if (maddr < 0xa0000 || maddr + memsize > 0x1000000) {
820 printf("ed%d: Invalid ISA memory address range configured: 0x%x - 0x%x\n",
821 isa_dev->id_unit, maddr, maddr + memsize);
826 * (note that if the user specifies both of the following flags that
827 * '8bit' mode intentionally has precedence)
829 if (isa_dev->id_flags & ED_FLAGS_FORCE_16BIT_MODE)
831 if (isa_dev->id_flags & ED_FLAGS_FORCE_8BIT_MODE)
835 * If possible, get the assigned interrupt number from the card and
838 if ((sc->type & ED_WD_SOFTCONFIG) && (!sc->is790)) {
841 * Assemble together the encoded interrupt number.
843 iptr = (inb(isa_dev->id_iobase + ED_WD_ICR) & ED_WD_ICR_IR2) |
844 ((inb(isa_dev->id_iobase + ED_WD_IRR) &
845 (ED_WD_IRR_IR0 | ED_WD_IRR_IR1)) >> 5);
848 * If no interrupt specified (or "?"), use what the board tells us.
850 if (isa_dev->id_irq <= 0)
851 isa_dev->id_irq = ed_intr_mask[iptr];
854 * Enable the interrupt.
856 outb(isa_dev->id_iobase + ED_WD_IRR,
857 inb(isa_dev->id_iobase + ED_WD_IRR) | ED_WD_IRR_IEN);
860 outb(isa_dev->id_iobase + ED_WD790_HWR,
861 inb(isa_dev->id_iobase + ED_WD790_HWR) | ED_WD790_HWR_SWH);
862 iptr = (((inb(isa_dev->id_iobase + ED_WD790_GCR) & ED_WD790_GCR_IR2) >> 4) |
863 (inb(isa_dev->id_iobase + ED_WD790_GCR) &
864 (ED_WD790_GCR_IR1 | ED_WD790_GCR_IR0)) >> 2);
865 outb(isa_dev->id_iobase + ED_WD790_HWR,
866 inb(isa_dev->id_iobase + ED_WD790_HWR) & ~ED_WD790_HWR_SWH);
869 * If no interrupt specified (or "?"), use what the board tells us.
871 if (isa_dev->id_irq <= 0)
872 isa_dev->id_irq = ed_790_intr_mask[iptr];
877 outb(isa_dev->id_iobase + ED_WD790_ICR,
878 inb(isa_dev->id_iobase + ED_WD790_ICR) | ED_WD790_ICR_EIL);
880 if (isa_dev->id_irq <= 0) {
881 printf("ed%d: %s cards don't support auto-detected/assigned interrupts.\n",
882 isa_dev->id_unit, sc->type_str);
885 sc->isa16bit = isa16bit;
887 isa_dev->id_msize = memsize;
888 sc->mem_start = (caddr_t) isa_dev->id_maddr;
891 * allocate one xmit buffer if < 16k, two buffers otherwise
893 if ((memsize < 16384) ||
894 (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)) {
899 sc->tx_page_start = ED_WD_PAGE_OFFSET;
900 sc->rec_page_start = ED_WD_PAGE_OFFSET + ED_TXBUF_SIZE * sc->txb_cnt;
901 sc->rec_page_stop = ED_WD_PAGE_OFFSET + memsize / ED_PAGE_SIZE;
902 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * sc->rec_page_start);
903 sc->mem_size = memsize;
904 sc->mem_end = sc->mem_start + memsize;
907 * Get station address from on-board ROM
909 for (i = 0; i < ETHER_ADDR_LEN; ++i)
910 sc->arpcom.ac_enaddr[i] = inb(sc->asic_addr + ED_WD_PROM + i);
913 * Set upper address bits and 8/16 bit access to shared memory.
917 sc->wd_laar_proto = inb(sc->asic_addr + ED_WD_LAAR);
919 sc->wd_laar_proto = ED_WD_LAAR_L16EN |
920 ((kvtop(sc->mem_start) >> 19) & ED_WD_LAAR_ADDRHI);
923 * Enable 16bit access
925 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto |
928 if (((sc->type & ED_WD_SOFTCONFIG) ||
930 (sc->type == ED_TYPE_TOSHIBA1) || (sc->type == ED_TYPE_TOSHIBA4) ||
932 (sc->type == ED_TYPE_WD8013EBT)) && (!sc->is790)) {
933 sc->wd_laar_proto = (kvtop(sc->mem_start) >> 19) &
935 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto);
940 * Set address and enable interface shared memory.
944 outb(sc->asic_addr + ED_WD_MSR + 1, ((kvtop(sc->mem_start) >> 8) & 0xe0) | 4);
945 outb(sc->asic_addr + ED_WD_MSR + 2, ((kvtop(sc->mem_start) >> 16) & 0x0f));
946 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB | ED_WD_MSR_POW);
949 outb(sc->asic_addr + ED_WD_MSR, ((kvtop(sc->mem_start) >> 13) &
950 ED_WD_MSR_ADDR) | ED_WD_MSR_MENB);
952 sc->cr_proto = ED_CR_RD2;
954 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
955 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH));
956 outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) |
957 ((kvtop(sc->mem_start) >> 11) & 0x40) |
958 (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0));
959 outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH));
964 printf("starting memory performance test at 0x%x, size %d...\n",
965 sc->mem_start, memsize*16384);
966 for (i = 0; i < 16384; i++)
967 bzero(sc->mem_start, memsize);
968 printf("***DONE***\n");
972 * Now zero memory and verify that it is clear
974 bzero(sc->mem_start, memsize);
976 for (i = 0; i < memsize; ++i) {
977 if (sc->mem_start[i]) {
978 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
979 isa_dev->id_unit, kvtop(sc->mem_start + i));
982 * Disable 16 bit access to shared memory
986 outb(sc->asic_addr + ED_WD_MSR, 0x00);
988 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto &
996 * Disable 16bit access to shared memory - we leave it
997 * disabled so that 1) machines reboot properly when the board
998 * is set 16 bit mode and there are conflicting 8bit
999 * devices/ROMS in the same 128k address space as this boards
1000 * shared memory. and 2) so that other 8 bit devices with
1001 * shared memory can be used in this 128k region, too.
1005 outb(sc->asic_addr + ED_WD_MSR, 0x00);
1007 outb(sc->asic_addr + ED_WD_LAAR, sc->wd_laar_proto &
1010 return (ED_WD_IO_PORTS);
1014 * Probe and vendor-specific initialization routine for 3Com 3c503 boards
1017 ed_probe_3Com(isa_dev)
1018 struct isa_device *isa_dev;
1020 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1025 sc->asic_addr = isa_dev->id_iobase + ED_3COM_ASIC_OFFSET;
1026 sc->nic_addr = isa_dev->id_iobase + ED_3COM_NIC_OFFSET;
1029 * Verify that the kernel configured I/O address matches the board
1030 * configured address
1032 switch (inb(sc->asic_addr + ED_3COM_BCFR)) {
1033 case ED_3COM_BCFR_300:
1034 if (isa_dev->id_iobase != 0x300)
1037 case ED_3COM_BCFR_310:
1038 if (isa_dev->id_iobase != 0x310)
1041 case ED_3COM_BCFR_330:
1042 if (isa_dev->id_iobase != 0x330)
1045 case ED_3COM_BCFR_350:
1046 if (isa_dev->id_iobase != 0x350)
1049 case ED_3COM_BCFR_250:
1050 if (isa_dev->id_iobase != 0x250)
1053 case ED_3COM_BCFR_280:
1054 if (isa_dev->id_iobase != 0x280)
1057 case ED_3COM_BCFR_2A0:
1058 if (isa_dev->id_iobase != 0x2a0)
1061 case ED_3COM_BCFR_2E0:
1062 if (isa_dev->id_iobase != 0x2e0)
1070 * Verify that the kernel shared memory address matches the board
1071 * configured address.
1073 switch (inb(sc->asic_addr + ED_3COM_PCFR)) {
1074 case ED_3COM_PCFR_DC000:
1075 if (kvtop(isa_dev->id_maddr) != 0xdc000)
1078 case ED_3COM_PCFR_D8000:
1079 if (kvtop(isa_dev->id_maddr) != 0xd8000)
1082 case ED_3COM_PCFR_CC000:
1083 if (kvtop(isa_dev->id_maddr) != 0xcc000)
1086 case ED_3COM_PCFR_C8000:
1087 if (kvtop(isa_dev->id_maddr) != 0xc8000)
1096 * Reset NIC and ASIC. Enable on-board transceiver throughout reset
1097 * sequence because it'll lock up if the cable isn't connected if we
1100 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_RST | ED_3COM_CR_XSEL);
1103 * Wait for a while, then un-reset it
1108 * The 3Com ASIC defaults to rather strange settings for the CR after
1109 * a reset - it's important to set it again after the following outb
1110 * (this is done when we map the PROM below).
1112 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1115 * Wait a bit for the NIC to recover from the reset
1119 sc->vendor = ED_VENDOR_3COM;
1120 sc->type_str = "3c503";
1122 sc->cr_proto = ED_CR_RD2;
1125 * Hmmm...a 16bit 3Com board has 16k of memory, but only an 8k window
1131 * Get station address from on-board ROM
1135 * First, map ethernet address PROM over the top of where the NIC
1136 * registers normally appear.
1138 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_EALO | ED_3COM_CR_XSEL);
1140 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1141 sc->arpcom.ac_enaddr[i] = inb(sc->nic_addr + i);
1144 * Unmap PROM - select NIC registers. The proper setting of the
1145 * tranceiver is set in ed_init so that the attach code is given a
1146 * chance to set the default based on a compile-time config option
1148 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
1151 * Determine if this is an 8bit or 16bit board
1155 * select page 0 registers
1157 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
1160 * Attempt to clear WTS bit. If it doesn't clear, then this is a 16bit
1163 outb(sc->nic_addr + ED_P0_DCR, 0);
1166 * select page 2 registers
1168 outb(sc->nic_addr + ED_P0_CR, ED_CR_PAGE_2 | ED_CR_RD2 | ED_CR_STP);
1171 * The 3c503 forces the WTS bit to a one if this is a 16bit board
1173 if (inb(sc->nic_addr + ED_P2_DCR) & ED_DCR_WTS)
1179 * select page 0 registers
1181 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_STP);
1183 sc->mem_start = (caddr_t) isa_dev->id_maddr;
1184 sc->mem_size = memsize;
1185 sc->mem_end = sc->mem_start + memsize;
1188 * We have an entire 8k window to put the transmit buffers on the
1189 * 16bit boards. But since the 16bit 3c503's shared memory is only
1190 * fast enough to overlap the loading of one full-size packet, trying
1191 * to load more than 2 buffers can actually leave the transmitter idle
1192 * during the load. So 2 seems the best value. (Although a mix of
1193 * variable-sized packets might change this assumption. Nonetheless,
1194 * we optimize for linear transfers of same-size packets.)
1197 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
1202 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_16BIT;
1203 sc->rec_page_start = ED_3COM_RX_PAGE_OFFSET_16BIT;
1204 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1205 ED_3COM_RX_PAGE_OFFSET_16BIT;
1206 sc->mem_ring = sc->mem_start;
1209 sc->tx_page_start = ED_3COM_TX_PAGE_OFFSET_8BIT;
1210 sc->rec_page_start = ED_TXBUF_SIZE + ED_3COM_TX_PAGE_OFFSET_8BIT;
1211 sc->rec_page_stop = memsize / ED_PAGE_SIZE +
1212 ED_3COM_TX_PAGE_OFFSET_8BIT;
1213 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
1216 sc->isa16bit = isa16bit;
1219 * Initialize GA page start/stop registers. Probably only needed if
1220 * doing DMA, but what the hell.
1222 outb(sc->asic_addr + ED_3COM_PSTR, sc->rec_page_start);
1223 outb(sc->asic_addr + ED_3COM_PSPR, sc->rec_page_stop);
1226 * Set IRQ. 3c503 only allows a choice of irq 2-5.
1228 switch (isa_dev->id_irq) {
1230 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ2);
1233 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ3);
1236 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ4);
1239 outb(sc->asic_addr + ED_3COM_IDCFR, ED_3COM_IDCFR_IRQ5);
1242 printf("ed%d: Invalid irq configuration (%d) must be 3-5,9 for 3c503\n",
1243 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
1248 * Initialize GA configuration register. Set bank and enable shared
1251 outb(sc->asic_addr + ED_3COM_GACFR, ED_3COM_GACFR_RSEL |
1252 ED_3COM_GACFR_MBS0);
1255 * Initialize "Vector Pointer" registers. These gawd-awful things are
1256 * compared to 20 bits of the address on ISA, and if they match, the
1257 * shared memory is disabled. We set them to 0xffff0...allegedly the
1260 outb(sc->asic_addr + ED_3COM_VPTR2, 0xff);
1261 outb(sc->asic_addr + ED_3COM_VPTR1, 0xff);
1262 outb(sc->asic_addr + ED_3COM_VPTR0, 0x00);
1265 * Zero memory and verify that it is clear
1267 bzero(sc->mem_start, memsize);
1269 for (i = 0; i < memsize; ++i)
1270 if (sc->mem_start[i]) {
1271 printf("ed%d: failed to clear shared memory at %lx - check configuration\n",
1272 isa_dev->id_unit, kvtop(sc->mem_start + i));
1275 isa_dev->id_msize = memsize;
1276 return (ED_3COM_IO_PORTS);
1280 * Probe and vendor-specific initialization routine for NE1000/2000 boards
1283 ed_probe_Novell_generic(sc, port, unit, flags)
1284 struct ed_softc *sc;
1290 u_char romdata[16], tmp;
1291 static char test_pattern[32] = "THIS is A memory TEST pattern";
1292 char test_buffer[32];
1294 sc->asic_addr = port + ED_NOVELL_ASIC_OFFSET;
1295 sc->nic_addr = port + ED_NOVELL_NIC_OFFSET;
1297 /* XXX - do Novell-specific probe here */
1299 /* Reset the board */
1301 outb(sc->asic_addr + ED_NOVELL_RESET, 0);
1303 #endif /* GWETHER */
1304 tmp = inb(sc->asic_addr + ED_NOVELL_RESET);
1307 * I don't know if this is necessary; probably cruft leftover from
1308 * Clarkson packet driver code. Doesn't do a thing on the boards I've
1309 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
1310 * non-invasive...but some boards don't seem to reset and I don't have
1311 * complete documentation on what the 'right' thing to do is...so we
1312 * do the invasive thing for now. Yuck.]
1314 outb(sc->asic_addr + ED_NOVELL_RESET, tmp);
1318 * This is needed because some NE clones apparently don't reset the
1319 * NIC properly (or the NIC chip doesn't reset fully on power-up) XXX
1320 * - this makes the probe invasive! ...Done against my better
1323 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STP);
1327 /* Make sure that we really have an 8390 based board */
1328 if (!ed_probe_generic8390(sc))
1331 sc->vendor = ED_VENDOR_NOVELL;
1333 sc->cr_proto = ED_CR_RD2;
1336 * Test the ability to read and write to the NIC memory. This has the
1337 * side affect of determining if this is an NE1000 or an NE2000.
1341 * This prevents packets from being stored in the NIC memory when the
1342 * readmem routine turns on the start bit in the CR.
1344 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
1346 /* Temporarily initialize DCR for byte operations */
1347 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
1349 outb(sc->nic_addr + ED_P0_PSTART, 8192 / ED_PAGE_SIZE);
1350 outb(sc->nic_addr + ED_P0_PSTOP, 16384 / ED_PAGE_SIZE);
1355 * Write a test pattern in byte mode. If this fails, then there
1356 * probably isn't any memory at 8k - which likely means that the board
1359 ed_pio_writemem(sc, test_pattern, 8192, sizeof(test_pattern));
1360 ed_pio_readmem(sc, 8192, test_buffer, sizeof(test_pattern));
1362 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
1363 /* not an NE1000 - try NE2000 */
1365 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
1366 outb(sc->nic_addr + ED_P0_PSTART, 16384 / ED_PAGE_SIZE);
1367 outb(sc->nic_addr + ED_P0_PSTOP, 32768 / ED_PAGE_SIZE);
1372 * Write a test pattern in word mode. If this also fails, then
1373 * we don't know what this board is.
1375 ed_pio_writemem(sc, test_pattern, 16384, sizeof(test_pattern));
1376 ed_pio_readmem(sc, 16384, test_buffer, sizeof(test_pattern));
1378 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
1379 return (0); /* not an NE2000 either */
1382 sc->type = ED_TYPE_NE2000;
1383 sc->type_str = "NE2000";
1385 sc->type = ED_TYPE_NE1000;
1386 sc->type_str = "NE1000";
1390 case ED_TYPE98_GENERIC:
1391 sc->type_str = "NE2000";
1393 case ED_TYPE98_PCIC98:
1394 sc->type_str = "UE2212-PCIC98";
1397 sc->type_str = "LD-BDN";
1400 sc->type_str = "EGY-98";
1403 sc->type_str = "LGY-98";
1406 sc->type_str = "ICM";
1409 sc->type_str = "PC-9801-108";
1411 case ED_TYPE98_LA98:
1412 sc->type_str = "LA-98";
1414 case ED_TYPE98_NW98X:
1415 sc->type_str = "NW98X";
1418 sc->type_str = "Unknown";
1423 /* 8k of memory plus an additional 8k if 16bit */
1424 memsize = 8192 + sc->isa16bit * 8192;
1426 #if 0 /* probably not useful - NE boards only come two ways */
1427 /* allow kernel config file overrides */
1428 if (isa_dev->id_msize)
1429 memsize = isa_dev->id_msize;
1432 sc->mem_size = memsize;
1434 /* NIC memory doesn't start at zero on an NE board */
1435 /* The start address is tied to the bus width */
1436 sc->mem_start = (char *) 8192 + sc->isa16bit * 8192;
1437 sc->mem_end = sc->mem_start + memsize;
1438 sc->tx_page_start = memsize / ED_PAGE_SIZE;
1442 int x, i, mstart = 0, msize = 0;
1443 char pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], tbuf[ED_PAGE_SIZE];
1445 for (i = 0; i < ED_PAGE_SIZE; i++)
1448 /* Clear all the memory. */
1449 for (x = 1; x < 256; x++)
1450 ed_pio_writemem(sc, pbuf0, x * 256, ED_PAGE_SIZE);
1452 /* Search for the start of RAM. */
1453 for (x = 1; x < 256; x++) {
1454 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1455 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1456 for (i = 0; i < ED_PAGE_SIZE; i++)
1458 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1459 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1460 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
1461 mstart = x * ED_PAGE_SIZE;
1462 msize = ED_PAGE_SIZE;
1469 printf("ed%d: Cannot find start of RAM.\n", unit);
1472 /* Search for the start of RAM. */
1473 for (x = (mstart / ED_PAGE_SIZE) + 1; x < 256; x++) {
1474 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1475 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
1476 for (i = 0; i < ED_PAGE_SIZE; i++)
1478 ed_pio_writemem(sc, pbuf, x * 256, ED_PAGE_SIZE);
1479 ed_pio_readmem(sc, x * 256, tbuf, ED_PAGE_SIZE);
1480 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
1481 msize += ED_PAGE_SIZE;
1491 printf("ed%d: Cannot find any RAM, start : %d, x = %d.\n", unit, mstart, x);
1494 printf("ed%d: RAM start at %d, size : %d.\n", unit, mstart, msize);
1496 sc->mem_size = msize;
1497 sc->mem_start = (char *) mstart;
1498 sc->mem_end = (char *) (msize + mstart);
1499 sc->tx_page_start = mstart / ED_PAGE_SIZE;
1501 #endif /* GWETHER */
1504 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
1507 if ((memsize < 16384) || (flags & ED_FLAGS_NO_MULTI_BUFFERING))
1512 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
1513 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
1515 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
1517 ed_pio_readmem(sc, 0, romdata, 16);
1518 for (n = 0; n < ETHER_ADDR_LEN; n++)
1519 sc->arpcom.ac_enaddr[n] = romdata[n * (sc->isa16bit + 1)];
1522 if (sc->arpcom.ac_enaddr[2] == 0x86) {
1523 sc->type_str = "Gateway AT";
1525 #endif /* GWETHER */
1527 /* clear any pending interrupts that might have occurred above */
1528 outb(sc->nic_addr + ED_P0_ISR, 0xff);
1530 return (ED_NOVELL_IO_PORTS);
1534 ed_probe_Novell(isa_dev)
1535 struct isa_device *isa_dev;
1537 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1540 nports = ed_probe_Novell_generic(sc, isa_dev->id_iobase,
1541 isa_dev->id_unit, isa_dev->id_flags);
1543 isa_dev->id_maddr = 0;
1550 * Probe framework for pccards. Replicates the standard framework,
1551 * minus the pccard driver registration and ignores the ether address
1552 * supplied (from the CIS), relying on the probe to find it instead.
1555 ed_probe_pccard(isa_dev, ether)
1556 struct isa_device *isa_dev;
1563 /* NE2000 PCMCIA on old 98Note */
1564 nports98 = pc98_set_register(isa_dev, ED_TYPE98_PCIC98);
1565 nports = ed_probe_Novell(isa_dev);
1569 nports98 = pc98_set_register(isa_dev, ED_TYPE98_GENERIC);
1571 nports = ed_probe_WD80x3(isa_dev);
1575 nports = ed_probe_Novell(isa_dev);
1582 #endif /* NCARD > 0 */
1584 #define ED_HPP_TEST_SIZE 16
1587 * Probe and vendor specific initialization for the HP PC Lan+ Cards.
1588 * (HP Part nos: 27247B and 27252A).
1590 * The card has an asic wrapper around a DS8390 core. The asic handles
1591 * host accesses and offers both standard register IO and memory mapped
1592 * IO. Memory mapped I/O allows better performance at the expense of greater
1593 * chance of an incompatibility with existing ISA cards.
1595 * The card has a few caveats: it isn't tolerant of byte wide accesses, only
1596 * short (16 bit) or word (32 bit) accesses are allowed. Some card revisions
1597 * don't allow 32 bit accesses; these are indicated by a bit in the software
1598 * ID register (see if_edreg.h).
1600 * Other caveats are: we should read the MAC address only when the card
1603 * For more information; please consult the CRYNWR packet driver.
1605 * The AUI port is turned on using the "link2" option on the ifconfig
1609 ed_probe_HP_pclanp(isa_dev)
1610 struct isa_device *isa_dev;
1612 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1613 int n; /* temp var */
1614 int memsize; /* mem on board */
1615 u_char checksum; /* checksum of board address */
1616 u_char irq; /* board configured IRQ */
1617 char test_pattern[ED_HPP_TEST_SIZE]; /* read/write areas for */
1618 char test_buffer[ED_HPP_TEST_SIZE]; /* probing card */
1621 /* Fill in basic information */
1622 sc->asic_addr = isa_dev->id_iobase + ED_HPP_ASIC_OFFSET;
1623 sc->nic_addr = isa_dev->id_iobase + ED_HPP_NIC_OFFSET;
1625 sc->isa16bit = 0; /* the 8390 core needs to be in byte mode */
1628 * Look for the HP PCLAN+ signature: "0x50,0x48,0x00,0x53"
1631 if ((inb(sc->asic_addr + ED_HPP_ID) != 0x50) ||
1632 (inb(sc->asic_addr + ED_HPP_ID + 1) != 0x48) ||
1633 ((inb(sc->asic_addr + ED_HPP_ID + 2) & 0xF0) != 0) ||
1634 (inb(sc->asic_addr + ED_HPP_ID + 3) != 0x53))
1638 * Read the MAC address and verify checksum on the address.
1641 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_MAC);
1642 for (n = 0, checksum = 0; n < ETHER_ADDR_LEN; n++)
1643 checksum += (sc->arpcom.ac_enaddr[n] =
1644 inb(sc->asic_addr + ED_HPP_MAC_ADDR + n));
1646 checksum += inb(sc->asic_addr + ED_HPP_MAC_ADDR + ETHER_ADDR_LEN);
1648 if (checksum != 0xFF)
1652 * Verify that the software model number is 0.
1655 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_ID);
1656 if (((sc->hpp_id = inw(sc->asic_addr + ED_HPP_PAGE_4)) &
1657 ED_HPP_ID_SOFT_MODEL_MASK) != 0x0000)
1661 * Read in and save the current options configured on card.
1664 sc->hpp_options = inw(sc->asic_addr + ED_HPP_OPTION);
1666 sc->hpp_options |= (ED_HPP_OPTION_NIC_RESET |
1667 ED_HPP_OPTION_CHIP_RESET |
1668 ED_HPP_OPTION_ENABLE_IRQ);
1671 * Reset the chip. This requires writing to the option register
1672 * so take care to preserve the other bits.
1675 outw(sc->asic_addr + ED_HPP_OPTION,
1676 (sc->hpp_options & ~(ED_HPP_OPTION_NIC_RESET |
1677 ED_HPP_OPTION_CHIP_RESET)));
1679 DELAY(5000); /* wait for chip reset to complete */
1681 outw(sc->asic_addr + ED_HPP_OPTION,
1682 (sc->hpp_options | (ED_HPP_OPTION_NIC_RESET |
1683 ED_HPP_OPTION_CHIP_RESET |
1684 ED_HPP_OPTION_ENABLE_IRQ)));
1688 if (!(inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST))
1689 return 0; /* reset did not complete */
1692 * Read out configuration information.
1695 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_HW);
1697 irq = inb(sc->asic_addr + ED_HPP_HW_IRQ);
1700 * Check for impossible IRQ.
1703 if (irq >= (sizeof(ed_hpp_intr_mask) / sizeof(ed_hpp_intr_mask[0])))
1707 * If the kernel IRQ was specified with a '?' use the cards idea
1708 * of the IRQ. If the kernel IRQ was explicitly specified, it
1709 * should match that of the hardware.
1712 if (isa_dev->id_irq <= 0)
1713 isa_dev->id_irq = ed_hpp_intr_mask[irq];
1714 else if (isa_dev->id_irq != ed_hpp_intr_mask[irq])
1718 * Fill in softconfig info.
1721 sc->vendor = ED_VENDOR_HP;
1722 sc->type = ED_TYPE_HP_PCLANPLUS;
1723 sc->type_str = "HP-PCLAN+";
1725 sc->mem_shared = 0; /* we DON'T have dual ported RAM */
1726 sc->mem_start = 0; /* we use offsets inside the card RAM */
1728 sc->hpp_mem_start = NULL;/* no memory mapped I/O by default */
1731 * Check if memory mapping of the I/O registers possible.
1734 if (sc->hpp_options & ED_HPP_OPTION_MEM_ENABLE)
1739 * determine the memory address from the board.
1742 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_HW);
1743 mem_addr = (inw(sc->asic_addr + ED_HPP_HW_MEM_MAP) << 8);
1746 * Check that the kernel specified start of memory and
1747 * hardware's idea of it match.
1750 if (mem_addr != kvtop(isa_dev->id_maddr))
1753 sc->hpp_mem_start = isa_dev->id_maddr;
1757 * The board has 32KB of memory. Is there a way to determine
1758 * this programmatically?
1764 * Fill in the rest of the soft config structure.
1768 * The transmit page index.
1771 sc->tx_page_start = ED_HPP_TX_PAGE_OFFSET;
1773 if (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING)
1779 * Memory description
1782 sc->mem_size = memsize;
1783 sc->mem_ring = sc->mem_start +
1784 (sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE);
1785 sc->mem_end = sc->mem_start + sc->mem_size;
1788 * Receive area starts after the transmit area and
1789 * continues till the end of memory.
1792 sc->rec_page_start = sc->tx_page_start +
1793 (sc->txb_cnt * ED_TXBUF_SIZE);
1794 sc->rec_page_stop = (sc->mem_size / ED_PAGE_SIZE);
1797 sc->cr_proto = 0; /* value works */
1800 * Set the wrap registers for string I/O reads.
1803 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_HW);
1804 outw(sc->asic_addr + ED_HPP_HW_WRAP,
1805 ((sc->rec_page_start / ED_PAGE_SIZE) |
1806 (((sc->rec_page_stop / ED_PAGE_SIZE) - 1) << 8)));
1809 * Reset the register page to normal operation.
1812 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_PERF);
1815 * Verify that we can read/write from adapter memory.
1816 * Create test pattern.
1819 for (n = 0; n < ED_HPP_TEST_SIZE; n++)
1821 test_pattern[n] = (n*n) ^ ~n;
1824 #undef ED_HPP_TEST_SIZE
1827 * Check that the memory is accessible thru the I/O ports.
1828 * Write out the contents of "test_pattern", read back
1829 * into "test_buffer" and compare the two for any
1833 for (n = 0; n < (32768 / ED_PAGE_SIZE); n ++) {
1835 ed_pio_writemem(sc, test_pattern, (n * ED_PAGE_SIZE),
1836 sizeof(test_pattern));
1837 ed_pio_readmem(sc, (n * ED_PAGE_SIZE),
1838 test_buffer, sizeof(test_pattern));
1840 if (bcmp(test_pattern, test_buffer,
1841 sizeof(test_pattern)))
1845 return (ED_HPP_IO_PORTS);
1850 * HP PC Lan+ : Set the physical link to use AUI or TP/TL.
1854 ed_hpp_set_physical_link(struct ed_softc *sc)
1856 struct ifnet *ifp = &sc->arpcom.ac_if;
1859 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_LAN);
1860 lan_page = inw(sc->asic_addr + ED_HPP_PAGE_0);
1862 if (ifp->if_flags & IFF_ALTPHYS) {
1868 lan_page |= ED_HPP_LAN_AUI;
1870 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_LAN);
1871 outw(sc->asic_addr + ED_HPP_PAGE_0, lan_page);
1877 * Use the ThinLan interface
1880 lan_page &= ~ED_HPP_LAN_AUI;
1882 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_LAN);
1883 outw(sc->asic_addr + ED_HPP_PAGE_0, lan_page);
1888 * Wait for the lan card to re-initialize itself
1891 DELAY(150000); /* wait 150 ms */
1894 * Restore normal pages.
1897 outw(sc->asic_addr + ED_HPP_PAGING, ED_HPP_PAGE_PERF);
1903 * Probe and vendor-specific initialization routine for SIC-98 boards
1906 ed_probe_SIC98(isa_dev)
1907 struct isa_device *isa_dev;
1909 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1913 if ((isa_dev->id_maddr == 0) || (isa_dev->id_msize == 0))
1916 /* Setup card RAM and I/O address
1917 * Kernel Virtual to segment C0000-DFFFF????
1919 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET;
1920 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET;
1921 sc->mem_start = (caddr_t)isa_dev->id_maddr;
1923 /* Reset card to force it into a known state. */
1924 outb(sc->asic_addr, 0x00);
1926 if (ED_TYPE98SUB(isa_dev->id_flags) == 0) {
1928 outb(sc->asic_addr, 0x94);
1930 outb(sc->asic_addr, 0x94);
1933 outb(sc->asic_addr, 0x80);
1935 outb(sc->asic_addr, 0x94);
1937 outb(sc->asic_addr, 0x9e);
1941 /* Here we check the card ROM, if the checksum passes, and the
1942 * type code and ethernet address check out, then we know we have
1945 sum = sc->mem_start[6 * 2];
1946 for (i = 0; i < ETHER_ADDR_LEN; ++i)
1947 sum ^= (sc->arpcom.ac_enaddr[i] = sc->mem_start[i * 2]);
1951 sc->vendor = ED_VENDOR_MISC;
1952 sc->type_str = "SIC98";
1956 sc->mem_size = isa_dev->id_msize;
1957 sc->mem_end = sc->mem_start + sc->mem_size;
1958 sc->mem_ring = sc->mem_start + (ED_TXBUF_SIZE * ED_PAGE_SIZE);
1960 sc->tx_page_start = 0;
1961 sc->rec_page_start = ED_TXBUF_SIZE;
1962 sc->rec_page_stop = sc->mem_size / ED_PAGE_SIZE;
1965 * SIC RAM page 0x0000-0x3fff(or 0x7fff)
1967 if (ED_TYPE98SUB(isa_dev->id_flags) == 0)
1968 outb(sc->asic_addr, 0x90);
1970 outb(sc->asic_addr, 0x8e);
1974 * Test shared memory
1976 if (!ed_shm_testmem(sc)) {
1981 * Select page 0 register
1983 outb(sc->nic_addr + ED_P2_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
1989 * Probe and vendor-specific initialization routine for C-NET(98) boards
1992 ed_probe_CNET98(isa_dev)
1993 struct isa_device *isa_dev;
1995 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
1998 if ((isa_dev->id_maddr == 0) || (isa_dev->id_msize == 0))
2001 sc->asic_addr = isa_dev->id_iobase;
2002 sc->nic_addr = isa_dev->id_iobase;
2003 sc->vendor = ED_VENDOR_MISC; /* vendor name */
2004 sc->type_str = "CNET98"; /* board name */
2005 sc->isa16bit = 0; /* 16bit mode off */
2006 sc->cr_proto = ED_CR_RD2;
2008 sc->mem_start = (caddr_t)isa_dev->id_maddr;
2009 sc->mem_size = isa_dev->id_msize;
2010 sc->mem_end = sc->mem_start + sc->mem_size;
2011 sc->mem_ring = sc->mem_start + (ED_PAGE_SIZE * ED_TXBUF_SIZE);
2012 sc->txb_cnt = 1; /* tx buffer counter 1 */
2013 sc->tx_page_start = 0; /* page offset 0 */
2014 sc->rec_page_start = ED_TXBUF_SIZE; /* page offset 6 */
2015 sc->rec_page_stop = sc->mem_size / ED_PAGE_SIZE;
2016 /* page offset 40 */
2018 * Check i/o address.
2019 * 0x[a-f]3d0 are allowed.
2021 if (((sc->asic_addr & (u_short)0x0fff) != 0x03d0)
2022 || ((sc->asic_addr & (u_short)0xf000) < 0xa000)) {
2023 printf("ed%d: Invalid i/o port configuration (0x%x) must be "
2024 "0x[a-f]3d0 for CNET98\n",
2025 isa_dev->id_unit, sc->asic_addr);
2030 * Check window area address.
2032 tmp_s = kvtop(sc->mem_start) >> 12;
2034 printf("ed%d: Please change window address(0x%x)\n",
2035 isa_dev->id_unit, kvtop(sc->mem_start));
2040 tmp = sc->asic_addr >> 12;
2041 if ((tmp_s <= tmp) && (tmp < (tmp_s + 4))) {
2042 printf("ed%d: Please change iobase address(0x%x) or window address(0x%x)\n",
2043 isa_dev->id_unit, isa_dev->id_iobase,
2044 kvtop(sc->mem_start));
2048 /* Reset the board */
2049 ed_reset_CNET98(isa_dev->id_iobase, isa_dev->id_flags);
2051 /* Make sure that we really have an 8390 based board */
2052 if (!ed_probe_generic8390(sc))
2056 * Set window ethernet address area
2057 * board memory base 0x480000 data 256byte
2059 ed_winsel_CNET98(sc, 0x4800);
2062 * Get station address from on-board ROM
2064 bcopy(sc->mem_start, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
2067 * Set window buffer memory area
2068 * board memory base 0x400000 data 16kbyte
2070 ed_winsel_CNET98(sc, 0x4000);
2073 * Test shared memory
2075 if (!ed_shm_testmem(sc))
2079 * Set interrupt level
2081 switch (isa_dev->id_irq) {
2083 tmp = ED_CNET98_INT_IRQ3;
2086 printf("ed%d: Change Interrupt level default value from %d to %d.\n",
2087 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1, 5);
2088 isa_dev->id_irq = IRQ5;
2091 tmp = ED_CNET98_INT_IRQ5;
2094 tmp = ED_CNET98_INT_IRQ6;
2097 tmp = ED_CNET98_INT_IRQ9;
2100 tmp = ED_CNET98_INT_IRQ12;
2103 tmp = ED_CNET98_INT_IRQ13;
2106 outb(sc->asic_addr + ED_CNET98_INT_LEV, tmp);
2109 * Set interrupt mask.
2110 * bit7:1 all interrupt mask
2111 * bit1:1 timer interrupt mask
2112 * bit0:0 NS controler interrupt enable
2114 outb(sc->asic_addr + ED_CNET98_INT_MASK, 0x7e);
2117 return (ED_CNET98_IO_PORTS);
2121 * Probe and vendor-specific initialization routine for C-NET(98)E/L boards
2124 ed_probe_CNET98EL(isa_dev)
2125 struct isa_device *isa_dev;
2127 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
2129 u_char romdata[ETHER_ADDR_LEN * 2], tmp;
2130 static char test_pattern[32] = "THIS is A memory TEST pattern";
2131 char test_buffer[32];
2133 sc->asic_addr = isa_dev->id_iobase + ED_NOVELL_ASIC_OFFSET;
2134 sc->nic_addr = isa_dev->id_iobase + ED_NOVELL_NIC_OFFSET;
2136 /* Check i/o address. CNET98E/L only allows ?3d0h */
2137 if ((sc->nic_addr & (u_short) 0x0fff) != 0x03d0) {
2138 printf("ed%d: Invalid i/o port configuration (%x) must be "
2139 "?3d0h for CNET98E/L\n",
2140 isa_dev->id_unit, sc->nic_addr);
2144 /* Reset the board */
2145 ed_reset_CNET98(isa_dev->id_iobase, isa_dev->id_flags);
2147 /* Make sure that we really have an 8390 based board */
2148 if (!ed_probe_generic8390(sc))
2151 sc->vendor = ED_VENDOR_NOVELL;
2153 sc->cr_proto = ED_CR_RD2;
2155 /* Test the ability to read and write to the NIC memory. */
2158 * This prevents packets from being stored in the NIC memory when the
2159 * readmem routine turns on the start bit in the CR.
2161 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
2163 /* initialize DCR for word operations */
2164 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
2168 /* CNET98E/L board has 16k of memory */
2171 /* NIC memory start at zero on a CNET98E/L board */
2172 sc->mem_start = (char *) ED_CNET98EL_PAGE_OFFSET;
2173 sc->mem_end = sc->mem_start + memsize;
2174 sc->tx_page_start = ED_CNET98EL_PAGE_OFFSET / ED_PAGE_SIZE;
2177 * Write a test pattern in word mode. If failure page is not 16k, then
2178 * we don't know what this board is.
2180 for (n = ED_CNET98EL_PAGE_OFFSET; n < 65536; n += 1024) {
2181 ed_pio_writemem(sc, test_pattern, n, sizeof(test_pattern));
2182 ed_pio_readmem(sc, n, test_buffer, sizeof(test_pattern));
2184 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern)))
2187 if (n != (ED_CNET98EL_PAGE_OFFSET + memsize)) {
2189 printf("ed%d: CNET98E/L memory failure at %x\n",
2190 isa_dev->id_unit, n);
2192 return (0); /* not a CNET98E/L */
2196 * Set IRQ. CNET98E/L only allows a choice of irq 3,5,6.
2198 switch (isa_dev->id_irq) {
2200 tmp = ED_CNET98EL_ICR_IRQ3;
2203 tmp = ED_CNET98EL_ICR_IRQ5;
2206 tmp = ED_CNET98EL_ICR_IRQ6;
2210 tmp = ED_CNET98EL_ICR_IRQ12;
2214 printf("ed%d: Invalid irq configuration (%d) must be 3,5,6 for CNET98E/L\n",
2215 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
2218 outb(sc->asic_addr + ED_CNET98EL_ICR, tmp);
2219 outb(sc->asic_addr + ED_CNET98EL_IMR, 0x7e);
2221 sc->type_str = "CNET98E/L";
2223 #if 0 /* probably not useful - NE boards only come two ways */
2224 /* allow kernel config file overrides */
2225 if (isa_dev->id_msize)
2226 memsize = isa_dev->id_msize;
2229 sc->mem_size = memsize;
2232 * Use one xmit buffer if < 16k, two buffers otherwise (if not told
2235 if ((memsize < 16384) || (isa_dev->id_flags & ED_FLAGS_NO_MULTI_BUFFERING))
2240 sc->rec_page_start = sc->tx_page_start + sc->txb_cnt * ED_TXBUF_SIZE;
2241 sc->rec_page_stop = sc->tx_page_start + memsize / ED_PAGE_SIZE;
2243 sc->mem_ring = sc->mem_start + sc->txb_cnt * ED_PAGE_SIZE * ED_TXBUF_SIZE;
2244 isa_dev->id_maddr = 0;
2247 * Get station address from on-board ROM
2249 ed_pio_readmem(sc, 16384, romdata, sizeof(romdata));
2250 for (n = 0; n < ETHER_ADDR_LEN; n++)
2251 sc->arpcom.ac_enaddr[n] = romdata[n * 2];
2253 /* clear any pending interrupts that might have occurred above */
2254 outb(sc->nic_addr + ED_P0_ISR, 0xff);
2256 return (ED_CNET98EL_IO_PORTS);
2260 ed_reset_CNET98(iobase, flags)
2264 u_short init_addr = ED_CNET98_INIT;
2267 /* Choose initial register address */
2268 if (ED_TYPE98SUB(flags) != 0) {
2269 init_addr = ED_CNET98_INIT2;
2272 printf("ed?: initial register=%x\n", init_addr);
2275 * Reset the board to force it into a known state.
2277 outb(init_addr, 0x00); /* request */
2279 outb(init_addr, 0x01); /* cancel */
2283 * Set i/o address(A15-12) and cpu type
2286 * AAAA: A15-A12, I: I/O enable, XX: reserved, C: CPU type
2288 * CPU type is 1:80286 or higher, 0:not.
2289 * But FreeBSD runs under i386 or higher, thus it must be 1.
2291 tmp = (iobase & (u_short) 0xf000) >> 8;
2292 tmp |= (0x08 | 0x01);
2294 printf("ed?: outb(%x, %x)\n", init_addr + 2, tmp);
2296 outb(init_addr + 2, tmp);
2301 ed_winsel_CNET98(sc, bank)
2302 struct ed_softc *sc;
2305 u_char mem = (kvtop(sc->mem_start) >> 12) & 0xff;
2308 * Disable window memory
2311 outb(sc->asic_addr + ED_CNET98_WIN_REG, mem & 0x7f);
2315 * Select window address
2316 * FreeBSD address 0xf00xxxxx
2318 outb(sc->asic_addr + ED_CNET98_MAP_REG0L, bank & 0xff);
2320 outb(sc->asic_addr + ED_CNET98_MAP_REG0H, (bank >> 8) & 0xff);
2322 outb(sc->asic_addr + ED_CNET98_MAP_REG1L, 0x00);
2324 outb(sc->asic_addr + ED_CNET98_MAP_REG1H, 0x41);
2326 outb(sc->asic_addr + ED_CNET98_MAP_REG2L, 0x00);
2328 outb(sc->asic_addr + ED_CNET98_MAP_REG2H, 0x42);
2330 outb(sc->asic_addr + ED_CNET98_MAP_REG3L, 0x00);
2332 outb(sc->asic_addr + ED_CNET98_MAP_REG3H, 0x43);
2336 * Enable window memory(16Kbyte)
2340 printf("ed?: window start address=%x\n", mem);
2342 outb(sc->asic_addr + ED_CNET98_WIN_REG, mem);
2347 * Probe and vendor-specific initialization routine for EC/EP-98X boards
2350 ed_probe_NW98X(isa_dev)
2351 struct isa_device *isa_dev;
2353 struct ed_softc *sc = &ed_softc[isa_dev->id_unit];
2357 nports = ed_probe_Novell(isa_dev);
2362 * Set IRQ. EC/EP-98X only allows a choice of irq 3,5,6,12,13.
2364 switch (isa_dev->id_irq) {
2366 tmp = ED_NW98X_IRQ3;
2369 tmp = ED_NW98X_IRQ5;
2372 tmp = ED_NW98X_IRQ6;
2375 tmp = ED_NW98X_IRQ12;
2378 tmp = ED_NW98X_IRQ13;
2381 printf("ed%d: Invalid irq configuration (%d) must be "
2382 "3,5,6,12,13 for EC/EP-98X\n",
2383 isa_dev->id_unit, ffs(isa_dev->id_irq) - 1);
2386 outb(sc->asic_addr + ED_NW98X_IRQ, tmp);
2391 /* TODO - should be used PC/AT also */
2394 struct ed_softc *sc;
2399 * clear interface memory, then sum to make sure its valid
2401 bzero(sc->mem_start, sc->mem_size);
2403 for (i = 0; i < sc->mem_size; ++i) {
2404 if (sc->mem_start[i]) {
2405 printf("ed?: failed to clear shared memory at %lx - check configuration\n",
2406 kvtop(sc->mem_start + i));
2416 * Install interface into kernel networking data structures
2419 ed_attach(sc, unit, flags)
2420 struct ed_softc *sc;
2424 struct ifnet *ifp = &sc->arpcom.ac_if;
2427 * Set interface to stopped condition (reset)
2431 if (!ifp->if_name) {
2433 * Initialize ifnet structure
2436 ifp->if_unit = unit;
2437 ifp->if_name = "ed";
2438 ifp->if_output = ether_output;
2439 ifp->if_start = ed_start;
2440 ifp->if_ioctl = ed_ioctl;
2441 ifp->if_watchdog = ed_watchdog;
2442 ifp->if_init = ed_init;
2443 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
2444 ifp->if_linkmib = &sc->mibdata;
2445 ifp->if_linkmiblen = sizeof sc->mibdata;
2447 * XXX - should do a better job.
2450 sc->mibdata.dot3StatsEtherChipSet =
2451 DOT3CHIPSET(dot3VendorWesternDigital,
2452 dot3ChipSetWesternDigital83C790);
2454 sc->mibdata.dot3StatsEtherChipSet =
2455 DOT3CHIPSET(dot3VendorNational,
2456 dot3ChipSetNational8390);
2457 sc->mibdata.dot3Compliance = DOT3COMPLIANCE_COLLS;
2460 * Set default state for ALTPHYS flag (used to disable the
2461 * tranceiver for AUI operation), based on compile-time
2464 if (flags & ED_FLAGS_DISABLE_TRANCEIVER)
2465 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
2466 IFF_MULTICAST | IFF_ALTPHYS);
2468 ifp->if_flags = (IFF_BROADCAST | IFF_SIMPLEX |
2472 * Attach the interface
2475 ether_ifattach(ifp);
2477 /* device attach does transition from UNCONFIGURED to IDLE state */
2480 * Print additional info when attached
2482 printf("%s%d: address %6D, ", ifp->if_name, ifp->if_unit,
2483 sc->arpcom.ac_enaddr, ":");
2485 if (sc->type_str && (*sc->type_str != 0))
2486 printf("type %s ", sc->type_str);
2488 printf("type unknown (0x%x) ", sc->type);
2490 if (sc->vendor == ED_VENDOR_HP)
2491 printf("(%s %s IO)", (sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS) ?
2492 "16-bit" : "32-bit",
2493 sc->hpp_mem_start ? "memory mapped" : "regular");
2495 printf("%s ", sc->isa16bit ? "(16 bit)" : "(8 bit)");
2497 printf("%s\n", (((sc->vendor == ED_VENDOR_3COM) ||
2498 (sc->vendor == ED_VENDOR_HP)) &&
2499 (ifp->if_flags & IFF_ALTPHYS)) ? " tranceiver disabled" : "");
2502 * If BPF is in the kernel, call the attach for it
2504 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
2509 ed_attach_isa(isa_dev)
2510 struct isa_device *isa_dev;
2512 int unit = isa_dev->id_unit;
2513 struct ed_softc *sc = &ed_softc[unit];
2514 int flags = isa_dev->id_flags;
2516 isa_dev->id_ointr = edintr;
2517 return ed_attach(sc, unit, flags);
2522 ed_attach_NE2000_pci(unit, port)
2526 struct ed_softc *sc = malloc(sizeof *sc, M_DEVBUF, M_NOWAIT);
2532 bzero(sc, sizeof *sc);
2534 (void)pc98_set_register_unit(sc, ED_TYPE98_GENERIC, 0);
2536 if (ed_probe_Novell_generic(sc, port, unit, isa_flags) == 0
2537 || ed_attach(sc, unit, isa_flags) == 0) {
2552 struct ed_softc *sc = ifp->if_softc;
2560 * Stop interface and re-initialize.
2569 * Take interface offline.
2573 struct ed_softc *sc;
2580 * Stop everything on the interface, and select page 0 registers.
2582 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2585 * Wait for interface to enter stopped state, but limit # of checks to
2586 * 'n' (about 5ms). It shouldn't even take 5us on modern DS8390's, but
2587 * just in case it's an old one.
2589 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RST) == 0) && --n);
2593 * Device timeout/watchdog routine. Entered if the device neglects to
2594 * generate an interrupt after a transmit has been started on it.
2600 struct ed_softc *sc = ifp->if_softc;
2604 log(LOG_ERR, "ed%d: device timeout\n", ifp->if_unit);
2611 * Initialize device.
2617 struct ed_softc *sc = xsc;
2618 struct ifnet *ifp = &sc->arpcom.ac_if;
2624 /* address not known */
2625 if (TAILQ_EMPTY(&ifp->if_addrhead)) /* unlikely? XXX */
2629 * Initialize the NIC in the exact order outlined in the NS manual.
2630 * This init procedure is "mandatory"...don't change what or when
2635 /* reset transmitter flags */
2641 sc->txb_next_tx = 0;
2643 /* This variable is used below - don't move this assignment */
2644 sc->next_packet = sc->rec_page_start + 1;
2647 * Set interface for page 0, Remote DMA complete, Stopped
2649 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
2654 * Set FIFO threshold to 8, No auto-init Remote DMA, byte
2655 * order=80x86, word-wide DMA xfers,
2657 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_WTS | ED_DCR_LS);
2661 * Same as above, but byte-wide DMA xfers
2663 outb(sc->nic_addr + ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
2667 * Clear Remote Byte Count Registers
2669 outb(sc->nic_addr + ED_P0_RBCR0, 0);
2670 outb(sc->nic_addr + ED_P0_RBCR1, 0);
2673 * For the moment, don't store incoming packets in memory.
2675 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_MON);
2678 * Place NIC in internal loopback mode
2680 outb(sc->nic_addr + ED_P0_TCR, ED_TCR_LB0);
2683 * Initialize transmit/receive (ring-buffer) Page Start
2685 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start);
2686 outb(sc->nic_addr + ED_P0_PSTART, sc->rec_page_start);
2687 /* Set lower bits of byte addressable framing to 0 */
2689 outb(sc->nic_addr + 0x09, 0);
2692 * Initialize Receiver (ring-buffer) Page Stop and Boundry
2694 outb(sc->nic_addr + ED_P0_PSTOP, sc->rec_page_stop);
2695 outb(sc->nic_addr + ED_P0_BNRY, sc->rec_page_start);
2698 * Clear all interrupts. A '1' in each bit position clears the
2699 * corresponding flag.
2701 outb(sc->nic_addr + ED_P0_ISR, 0xff);
2704 * Enable the following interrupts: receive/transmit complete,
2705 * receive/transmit error, and Receiver OverWrite.
2707 * Counter overflow and Remote DMA complete are *not* enabled.
2709 outb(sc->nic_addr + ED_P0_IMR,
2710 ED_IMR_PRXE | ED_IMR_PTXE | ED_IMR_RXEE | ED_IMR_TXEE | ED_IMR_OVWE);
2713 * Program Command Register for page 1
2715 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
2718 * Copy out our station address
2720 for (i = 0; i < ETHER_ADDR_LEN; ++i)
2721 outb(sc->nic_addr + ED_P1_PAR(i), sc->arpcom.ac_enaddr[i]);
2724 * Set Current Page pointer to next_packet (initialized above)
2726 outb(sc->nic_addr + ED_P1_CURR, sc->next_packet);
2729 * Program Receiver Configuration Register and multicast filter. CR is
2730 * set to page 0 on return.
2735 * Take interface out of loopback
2737 outb(sc->nic_addr + ED_P0_TCR, 0);
2740 * If this is a 3Com board, the tranceiver must be software enabled
2741 * (there is no settable hardware default).
2743 if (sc->vendor == ED_VENDOR_3COM) {
2744 if (ifp->if_flags & IFF_ALTPHYS) {
2745 outb(sc->asic_addr + ED_3COM_CR, 0);
2747 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
2752 * Set 'running' flag, and clear output active flag.
2754 ifp->if_flags |= IFF_RUNNING;
2755 ifp->if_flags &= ~IFF_OACTIVE;
2758 * ...and attempt to start output
2766 * This routine actually starts the transmission on the interface
2768 static __inline void
2770 struct ed_softc *sc;
2772 struct ifnet *ifp = (struct ifnet *)sc;
2777 len = sc->txb_len[sc->txb_next_tx];
2780 * Set NIC for page 0 register access
2782 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
2785 * Set TX buffer start page
2787 outb(sc->nic_addr + ED_P0_TPSR, sc->tx_page_start +
2788 sc->txb_next_tx * ED_TXBUF_SIZE);
2793 outb(sc->nic_addr + ED_P0_TBCR0, len);
2794 outb(sc->nic_addr + ED_P0_TBCR1, len >> 8);
2797 * Set page 0, Remote DMA complete, Transmit Packet, and *Start*
2799 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_TXP | ED_CR_STA);
2803 * Point to next transmit buffer slot and wrap if necessary.
2806 if (sc->txb_next_tx == sc->txb_cnt)
2807 sc->txb_next_tx = 0;
2810 * Set a timer just in case we never hear from the board again
2816 * Start output on interface.
2817 * We make two assumptions here:
2818 * 1) that the current priority is set to splimp _before_ this code
2819 * is called *and* is returned to the appropriate priority after
2821 * 2) that the IFF_OACTIVE flag is checked before this code is called
2822 * (i.e. that the output part of the interface is idle)
2828 struct ed_softc *sc = ifp->if_softc;
2829 struct mbuf *m0, *m;
2834 printf("ed_start(%p) GONE\n",ifp);
2840 * First, see if there are buffered packets and an idle transmitter -
2841 * should never happen at this point.
2843 if (sc->txb_inuse && (sc->xmit_busy == 0)) {
2844 printf("ed: packets buffered, but transmitter idle\n");
2849 * See if there is room to put another packet in the buffer.
2851 if (sc->txb_inuse == sc->txb_cnt) {
2854 * No room. Indicate this to the outside world and exit.
2856 ifp->if_flags |= IFF_OACTIVE;
2859 IF_DEQUEUE(&ifp->if_snd, m);
2863 * We are using the !OACTIVE flag to indicate to the outside
2864 * world that we can accept an additional packet rather than
2865 * that the transmitter is _actually_ active. Indeed, the
2866 * transmitter may be active, but if we haven't filled all the
2867 * buffers with data then we still want to accept more.
2869 ifp->if_flags &= ~IFF_OACTIVE;
2874 * Copy the mbuf chain into the transmit buffer
2879 /* txb_new points to next open buffer slot */
2880 buffer = sc->mem_start + (sc->txb_new * ED_TXBUF_SIZE * ED_PAGE_SIZE);
2882 if (sc->mem_shared) {
2885 * Special case setup for 16 bit boards...
2888 switch (sc->vendor) {
2891 * For 16bit 3Com boards (which have 16k of
2892 * memory), we have the xmit buffers in a
2893 * different page of memory ('page 0') - so
2896 case ED_VENDOR_3COM:
2897 outb(sc->asic_addr + ED_3COM_GACFR,
2898 ED_3COM_GACFR_RSEL);
2902 * Enable 16bit access to shared memory on
2905 case ED_VENDOR_WD_SMC:{
2906 outb(sc->asic_addr + ED_WD_LAAR,
2907 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
2909 outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB);
2915 for (len = 0; m != 0; m = m->m_next) {
2916 bcopy(mtod(m, caddr_t), buffer, m->m_len);
2922 * Restore previous shared memory access
2925 switch (sc->vendor) {
2926 case ED_VENDOR_3COM:
2927 outb(sc->asic_addr + ED_3COM_GACFR,
2928 ED_3COM_GACFR_RSEL | ED_3COM_GACFR_MBS0);
2930 case ED_VENDOR_WD_SMC:{
2932 outb(sc->asic_addr + ED_WD_MSR, 0x00);
2934 outb(sc->asic_addr + ED_WD_LAAR,
2935 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
2941 len = ed_pio_write_mbufs(sc, m, (int)buffer);
2946 sc->txb_len[sc->txb_new] = max(len, (ETHER_MIN_LEN-ETHER_CRC_LEN));
2951 * Point to next buffer slot and wrap if necessary.
2954 if (sc->txb_new == sc->txb_cnt)
2957 if (sc->xmit_busy == 0)
2961 * Tap off here if there is a bpf listener.
2970 * Loop back to the top to possibly buffer more packets
2976 * Ethernet interface receiver interrupt.
2978 static __inline void
2980 struct ed_softc *sc;
2982 struct ifnet *ifp = &sc->arpcom.ac_if;
2985 struct ed_ring packet_hdr;
2992 * Set NIC to page 1 registers to get 'current' pointer
2994 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
2997 * 'sc->next_packet' is the logical beginning of the ring-buffer -
2998 * i.e. it points to where new data has been buffered. The 'CURR'
2999 * (current) register points to the logical end of the ring-buffer -
3000 * i.e. it points to where additional new data will be added. We loop
3001 * here until the logical beginning equals the logical end (or in
3002 * other words, until the ring-buffer is empty).
3004 while (sc->next_packet != inb(sc->nic_addr + ED_P1_CURR)) {
3006 /* get pointer to this buffer's header structure */
3007 packet_ptr = sc->mem_ring +
3008 (sc->next_packet - sc->rec_page_start) * ED_PAGE_SIZE;
3011 * The byte count includes a 4 byte header that was added by
3015 packet_hdr = *(struct ed_ring *) packet_ptr;
3017 ed_pio_readmem(sc, (int)packet_ptr, (char *) &packet_hdr,
3018 sizeof(packet_hdr));
3019 len = packet_hdr.count;
3020 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring)) ||
3021 len < (ETHER_MIN_LEN - ETHER_CRC_LEN + sizeof(struct ed_ring))) {
3023 * Length is a wild value. There's a good chance that
3024 * this was caused by the NIC being old and buggy.
3025 * The bug is that the length low byte is duplicated in
3026 * the high byte. Try to recalculate the length based on
3027 * the pointer to the next packet.
3030 * NOTE: sc->next_packet is pointing at the current packet.
3032 len &= ED_PAGE_SIZE - 1; /* preserve offset into page */
3033 if (packet_hdr.next_packet >= sc->next_packet) {
3034 len += (packet_hdr.next_packet - sc->next_packet) * ED_PAGE_SIZE;
3036 len += ((packet_hdr.next_packet - sc->rec_page_start) +
3037 (sc->rec_page_stop - sc->next_packet)) * ED_PAGE_SIZE;
3040 * because buffers are aligned on 256-byte boundary,
3041 * the length computed above is off by 256 in almost
3042 * all cases. Fix it...
3046 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN
3047 + sizeof(struct ed_ring)))
3048 sc->mibdata.dot3StatsFrameTooLongs++;
3051 * Be fairly liberal about what we allow as a "reasonable" length
3052 * so that a [crufty] packet will make it to BPF (and can thus
3053 * be analyzed). Note that all that is really important is that
3054 * we have a length that will fit into one mbuf cluster or less;
3055 * the upper layer protocols can then figure out the length from
3056 * their own length field(s).
3058 if ((len > sizeof(struct ed_ring)) &&
3059 (len <= MCLBYTES) &&
3060 (packet_hdr.next_packet >= sc->rec_page_start) &&
3061 (packet_hdr.next_packet < sc->rec_page_stop)) {
3065 ed_get_packet(sc, packet_ptr + sizeof(struct ed_ring),
3066 len - sizeof(struct ed_ring), packet_hdr.rsr & ED_RSR_PHY);
3070 * Really BAD. The ring pointers are corrupted.
3073 "ed%d: NIC memory corrupt - invalid packet length %d\n",
3081 * Update next packet pointer
3083 sc->next_packet = packet_hdr.next_packet;
3086 * Update NIC boundry pointer - being careful to keep it one
3087 * buffer behind. (as recommended by NS databook)
3089 boundry = sc->next_packet - 1;
3090 if (boundry < sc->rec_page_start)
3091 boundry = sc->rec_page_stop - 1;
3094 * Set NIC to page 0 registers to update boundry register
3096 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
3098 outb(sc->nic_addr + ED_P0_BNRY, boundry);
3101 * Set NIC to page 1 registers before looping to top (prepare
3102 * to get 'CURR' current pointer)
3104 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STA);
3109 * Ethernet interface interrupt processor
3113 struct ed_softc *sc;
3115 struct ifnet *ifp = (struct ifnet *)sc;
3121 * Set NIC to page 0 registers
3123 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
3126 * loop until there are no more new interrupts
3128 while ((isr = inb(sc->nic_addr + ED_P0_ISR)) != 0) {
3131 * reset all the bits that we are 'acknowledging' by writing a
3132 * '1' to each bit position that was set (writing a '1'
3135 outb(sc->nic_addr + ED_P0_ISR, isr);
3138 * Handle transmitter interrupts. Handle these first because
3139 * the receiver will reset the board under some conditions.
3141 if (isr & (ED_ISR_PTX | ED_ISR_TXE)) {
3142 u_char collisions = inb(sc->nic_addr + ED_P0_NCR) & 0x0f;
3145 * Check for transmit error. If a TX completed with an
3146 * error, we end up throwing the packet away. Really
3147 * the only error that is possible is excessive
3148 * collisions, and in this case it is best to allow
3149 * the automatic mechanisms of TCP to backoff the
3150 * flow. Of course, with UDP we're screwed, but this
3151 * is expected when a network is heavily loaded.
3153 (void) inb(sc->nic_addr + ED_P0_TSR);
3154 if (isr & ED_ISR_TXE) {
3158 * Excessive collisions (16)
3160 tsr = inb(sc->nic_addr + ED_P0_TSR);
3161 if ((tsr & ED_TSR_ABT)
3162 && (collisions == 0)) {
3165 * When collisions total 16, the
3166 * P0_NCR will indicate 0, and the
3170 sc->mibdata.dot3StatsExcessiveCollisions++;
3171 sc->mibdata.dot3StatsCollFrequencies[15]++;
3173 if (tsr & ED_TSR_OWC)
3174 sc->mibdata.dot3StatsLateCollisions++;
3175 if (tsr & ED_TSR_CDH)
3176 sc->mibdata.dot3StatsSQETestErrors++;
3177 if (tsr & ED_TSR_CRS)
3178 sc->mibdata.dot3StatsCarrierSenseErrors++;
3179 if (tsr & ED_TSR_FU)
3180 sc->mibdata.dot3StatsInternalMacTransmitErrors++;
3183 * update output errors counter
3189 * Update total number of successfully
3190 * transmitted packets.
3196 * reset tx busy and output active flags
3199 ifp->if_flags &= ~IFF_OACTIVE;
3202 * clear watchdog timer
3207 * Add in total number of collisions on last
3210 ifp->if_collisions += collisions;
3211 switch(collisions) {
3216 sc->mibdata.dot3StatsSingleCollisionFrames++;
3217 sc->mibdata.dot3StatsCollFrequencies[0]++;
3220 sc->mibdata.dot3StatsMultipleCollisionFrames++;
3222 dot3StatsCollFrequencies[collisions-1]
3228 * Decrement buffer in-use count if not zero (can only
3229 * be zero if a transmitter interrupt occured while
3230 * not actually transmitting). If data is ready to
3231 * transmit, start it transmitting, otherwise defer
3232 * until after handling receiver
3234 if (sc->txb_inuse && --sc->txb_inuse)
3239 * Handle receiver interrupts
3241 if (isr & (ED_ISR_PRX | ED_ISR_RXE | ED_ISR_OVW)) {
3244 * Overwrite warning. In order to make sure that a
3245 * lockup of the local DMA hasn't occurred, we reset
3246 * and re-init the NIC. The NSC manual suggests only a
3247 * partial reset/re-init is necessary - but some chips
3248 * seem to want more. The DMA lockup has been seen
3249 * only with early rev chips - Methinks this bug was
3250 * fixed in later revs. -DG
3252 if (isr & ED_ISR_OVW) {
3256 "ed%d: warning - receiver ring buffer overrun\n",
3261 * Stop/reset/re-init NIC
3267 * Receiver Error. One or more of: CRC error,
3268 * frame alignment error FIFO overrun, or
3271 if (isr & ED_ISR_RXE) {
3273 rsr = inb(sc->nic_addr + ED_P0_RSR);
3274 if (rsr & ED_RSR_CRC)
3275 sc->mibdata.dot3StatsFCSErrors++;
3276 if (rsr & ED_RSR_FAE)
3277 sc->mibdata.dot3StatsAlignmentErrors++;
3278 if (rsr & ED_RSR_FO)
3279 sc->mibdata.dot3StatsInternalMacReceiveErrors++;
3282 printf("ed%d: receive error %x\n", ifp->if_unit,
3283 inb(sc->nic_addr + ED_P0_RSR));
3288 * Go get the packet(s) XXX - Doing this on an
3289 * error is dubious because there shouldn't be
3290 * any data to get (we've configured the
3291 * interface to not accept packets with
3296 * Enable 16bit access to shared memory first
3300 (sc->vendor == ED_VENDOR_WD_SMC)) {
3302 outb(sc->asic_addr + ED_WD_LAAR,
3303 sc->wd_laar_proto | ED_WD_LAAR_M16EN);
3305 outb(sc->asic_addr + ED_WD_MSR,
3311 /* disable 16bit access */
3313 (sc->vendor == ED_VENDOR_WD_SMC)) {
3316 outb(sc->asic_addr + ED_WD_MSR, 0x00);
3318 outb(sc->asic_addr + ED_WD_LAAR,
3319 sc->wd_laar_proto & ~ED_WD_LAAR_M16EN);
3325 * If it looks like the transmitter can take more data,
3326 * attempt to start output on the interface. This is done
3327 * after handling the receiver to give the receiver priority.
3329 if ((ifp->if_flags & IFF_OACTIVE) == 0)
3333 * return NIC CR to standard state: page 0, remote DMA
3334 * complete, start (toggling the TXP bit off, even if was just
3335 * set in the transmit routine, is *okay* - it is 'edge'
3336 * triggered from low to high)
3338 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
3341 * If the Network Talley Counters overflow, read them to reset
3342 * them. It appears that old 8390's won't clear the ISR flag
3343 * otherwise - resulting in an infinite loop.
3345 if (isr & ED_ISR_CNT) {
3346 (void) inb(sc->nic_addr + ED_P0_CNTR0);
3347 (void) inb(sc->nic_addr + ED_P0_CNTR1);
3348 (void) inb(sc->nic_addr + ED_P0_CNTR2);
3357 edintr_sc (&ed_softc[unit]);
3361 * Process an ioctl request. This code needs some work - it looks
3365 ed_ioctl(ifp, command, data)
3366 register struct ifnet *ifp;
3370 struct ed_softc *sc = ifp->if_softc;
3374 ifp->if_flags &= ~IFF_RUNNING;
3384 error = ether_ioctl(ifp, command, data);
3390 * If the interface is marked up and stopped, then start it.
3391 * If it is marked down and running, then stop it.
3393 if (ifp->if_flags & IFF_UP) {
3394 if ((ifp->if_flags & IFF_RUNNING) == 0)
3397 if (ifp->if_flags & IFF_RUNNING) {
3399 ifp->if_flags &= ~IFF_RUNNING;
3404 * Promiscuous flag may have changed, so reprogram the RCR.
3409 * An unfortunate hack to provide the (required) software
3410 * control of the tranceiver for 3Com boards. The ALTPHYS flag
3411 * disables the tranceiver if set.
3413 if (sc->vendor == ED_VENDOR_3COM) {
3414 if (ifp->if_flags & IFF_ALTPHYS) {
3415 outb(sc->asic_addr + ED_3COM_CR, 0);
3417 outb(sc->asic_addr + ED_3COM_CR, ED_3COM_CR_XSEL);
3419 } else if (sc->vendor == ED_VENDOR_HP)
3420 ed_hpp_set_physical_link(sc);
3426 * Multicast list has changed; set the hardware filter
3441 * Given a source and destination address, copy 'amount' of a packet from
3442 * the ring buffer into a linear destination buffer. Takes into account
3445 static __inline char *
3446 ed_ring_copy(sc, src, dst, amount)
3447 struct ed_softc *sc;
3454 /* does copy wrap to lower addr in ring buffer? */
3455 if (src + amount > sc->mem_end) {
3456 tmp_amount = sc->mem_end - src;
3458 /* copy amount up to end of NIC memory */
3460 bcopy(src, dst, tmp_amount);
3462 ed_pio_readmem(sc, (int)src, dst, tmp_amount);
3464 amount -= tmp_amount;
3469 bcopy(src, dst, amount);
3471 ed_pio_readmem(sc, (int)src, dst, amount);
3473 return (src + amount);
3477 * Retreive packet from shared memory and send to the next level up via
3478 * ether_input(). If there is a BPF listener, give a copy to BPF, too.
3481 ed_get_packet(sc, buf, len, multicast)
3482 struct ed_softc *sc;
3487 struct ether_header *eh;
3490 /* Allocate a header mbuf */
3491 MGETHDR(m, M_DONTWAIT, MT_DATA);
3494 m->m_pkthdr.rcvif = &sc->arpcom.ac_if;
3495 m->m_pkthdr.len = m->m_len = len;
3498 * We always put the received packet in a single buffer -
3499 * either with just an mbuf header or in a cluster attached
3500 * to the header. The +2 is to compensate for the alignment
3503 if ((len + 2) > MHLEN) {
3504 /* Attach an mbuf cluster */
3505 MCLGET(m, M_DONTWAIT);
3507 /* Insist on getting a cluster */
3508 if ((m->m_flags & M_EXT) == 0) {
3515 * The +2 is to longword align the start of the real packet.
3516 * This is important for NFS.
3519 eh = mtod(m, struct ether_header *);
3523 * Get link layer header, invoke brige_in, then
3524 * depending on the outcome of the test fetch the rest of the
3525 * packet and either pass up or call bdg_forward.
3529 int need_more = 1 ; /* in case not bpf */
3531 if (sc->arpcom.ac_if.if_bpf) {
3533 ed_ring_copy(sc, buf, (char *)eh, len);
3534 bpf_mtap(&sc->arpcom.ac_if, m);
3536 ed_ring_copy(sc, buf, (char *)eh, 14);
3538 if (ifp == BDG_DROP) {
3542 /* else fetch rest of pkt and continue */
3543 if (need_more && len > 14)
3544 ed_ring_copy(sc, buf+14, (char *)(eh+1), len - 14);
3545 if (ifp != BDG_LOCAL )
3546 bdg_forward(&m, ifp); /* not local, need forwarding */
3547 if (ifp == BDG_LOCAL || ifp == BDG_BCAST || ifp == BDG_MCAST)
3549 /* not local and not multicast, just drop it */
3556 * Get packet, including link layer address, from interface.
3558 ed_ring_copy(sc, buf, (char *)eh, len);
3561 * Check if there's a BPF listener on this interface. If so, hand off
3562 * the raw packet to bpf.
3564 if (sc->arpcom.ac_if.if_bpf)
3565 bpf_mtap(&sc->arpcom.ac_if, m);
3567 * If we are in promiscuous mode, we have to check whether
3568 * this packet is really for us.
3570 if ((sc->arpcom.ac_if.if_flags & IFF_PROMISC) &&
3571 bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
3572 sizeof(eh->ether_dhost)) != 0 && multicast == 0) {
3581 * Remove link layer address.
3583 m->m_pkthdr.len = m->m_len = len - sizeof(struct ether_header);
3584 m->m_data += sizeof(struct ether_header);
3586 ether_input(&sc->arpcom.ac_if, eh, m);
3591 * Supporting routines
3595 * Given a NIC memory source address and a host memory destination
3596 * address, copy 'amount' from NIC to host using Programmed I/O.
3597 * The 'amount' is rounded up to a word - okay as long as mbufs
3599 * This routine is currently Novell-specific.
3602 ed_pio_readmem(sc, src, dst, amount)
3603 struct ed_softc *sc;
3606 unsigned short amount;
3608 /* HP cards need special handling */
3609 if (sc->vendor == ED_VENDOR_HP && sc->type == ED_TYPE_HP_PCLANPLUS) {
3610 ed_hpp_readmem(sc, src, dst, amount);
3614 /* Regular Novell cards */
3615 /* select page 0 registers */
3616 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
3618 /* round up to a word */
3622 /* set up DMA byte count */
3623 outb(sc->nic_addr + ED_P0_RBCR0, amount);
3624 outb(sc->nic_addr + ED_P0_RBCR1, amount >> 8);
3626 /* set up source address in NIC mem */
3627 outb(sc->nic_addr + ED_P0_RSAR0, src);
3628 outb(sc->nic_addr + ED_P0_RSAR1, src >> 8);
3630 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD0 | ED_CR_STA);
3633 #if defined(PC98) && (NCARD > 0)
3634 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_ON();
3636 insw(sc->asic_addr + ED_NOVELL_DATA, dst, amount / 2);
3637 #if defined(PC98) && (NCARD > 0)
3638 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_OFF();
3641 insb(sc->asic_addr + ED_NOVELL_DATA, dst, amount);
3646 * Stripped down routine for writing a linear buffer to NIC memory.
3647 * Only used in the probe routine to test the memory. 'len' must
3651 ed_pio_writemem(sc, src, dst, len)
3652 struct ed_softc *sc;
3657 int maxwait = 200; /* about 240us */
3659 if (sc->vendor == ED_VENDOR_NOVELL) {
3661 /* select page 0 registers */
3662 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
3664 /* reset remote DMA complete flag */
3665 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
3667 /* set up DMA byte count */
3668 outb(sc->nic_addr + ED_P0_RBCR0, len);
3669 outb(sc->nic_addr + ED_P0_RBCR1, len >> 8);
3671 /* set up destination address in NIC mem */
3672 outb(sc->nic_addr + ED_P0_RSAR0, dst);
3673 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
3675 /* set remote DMA write */
3676 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
3679 #if defined(PC98) && (NCARD > 0)
3681 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_ON();
3683 outsw(sc->asic_addr + ED_NOVELL_DATA, src, len / 2);
3684 #if defined(PC98) && (NCARD > 0)
3685 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_OFF();
3689 outsb(sc->asic_addr + ED_NOVELL_DATA, src, len);
3692 * Wait for remote DMA complete. This is necessary because on the
3693 * transmit side, data is handled internally by the NIC in bursts and
3694 * we can't start another remote DMA until this one completes. Not
3695 * waiting causes really bad things to happen - like the NIC
3696 * irrecoverably jamming the ISA bus.
3698 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
3700 } else if ((sc->vendor == ED_VENDOR_HP) &&
3701 (sc->type == ED_TYPE_HP_PCLANPLUS)) {
3705 /* reset remote DMA complete flag */
3706 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
3708 /* program the write address in RAM */
3709 outw(sc->asic_addr + ED_HPP_PAGE_0, dst);
3711 if (sc->hpp_mem_start) {
3712 u_short *s = (u_short *) src;
3713 volatile u_short *d = (u_short *) sc->hpp_mem_start;
3714 u_short *const fence = s + (len >> 1);
3717 * Enable memory mapped access.
3720 outw(sc->asic_addr + ED_HPP_OPTION,
3722 ~(ED_HPP_OPTION_MEM_DISABLE |
3723 ED_HPP_OPTION_BOOT_ROM_ENB));
3726 * Copy to NIC memory.
3733 * Restore Boot ROM access.
3736 outw(sc->asic_addr + ED_HPP_OPTION,
3740 /* write data using I/O writes */
3741 outsw(sc->asic_addr + ED_HPP_PAGE_4, src, len / 2);
3748 * Write an mbuf chain to the destination NIC memory address using
3752 ed_pio_write_mbufs(sc, m, dst)
3753 struct ed_softc *sc;
3757 struct ifnet *ifp = (struct ifnet *)sc;
3758 unsigned short total_len, dma_len;
3760 int maxwait = 200; /* about 240us */
3762 /* HP PC Lan+ cards need special handling */
3763 if ((sc->vendor == ED_VENDOR_HP) &&
3764 (sc->type == ED_TYPE_HP_PCLANPLUS)) {
3765 return ed_hpp_write_mbufs(sc, m, dst);
3768 /* First, count up the total number of bytes to copy */
3769 for (total_len = 0, mp = m; mp; mp = mp->m_next)
3770 total_len += mp->m_len;
3772 dma_len = total_len;
3773 if (sc->isa16bit && (dma_len & 1))
3776 /* select page 0 registers */
3777 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD2 | ED_CR_STA);
3779 /* reset remote DMA complete flag */
3780 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
3782 /* set up DMA byte count */
3783 outb(sc->nic_addr + ED_P0_RBCR0, dma_len);
3784 outb(sc->nic_addr + ED_P0_RBCR1, dma_len >> 8);
3786 /* set up destination address in NIC mem */
3787 outb(sc->nic_addr + ED_P0_RSAR0, dst);
3788 outb(sc->nic_addr + ED_P0_RSAR1, dst >> 8);
3790 /* set remote DMA write */
3791 outb(sc->nic_addr + ED_P0_CR, ED_CR_RD1 | ED_CR_STA);
3794 * Transfer the mbuf chain to the NIC memory.
3795 * 16-bit cards require that data be transferred as words, and only words.
3796 * So that case requires some extra code to patch over odd-length mbufs.
3799 if (!sc->isa16bit) {
3800 /* NE1000s are easy */
3803 outsb(sc->asic_addr + ED_NOVELL_DATA,
3804 m->m_data, m->m_len);
3809 /* NE2000s are a pain */
3810 unsigned char *data;
3812 unsigned char savebyte[2];
3816 #if defined(PC98) && (NCARD > 0)
3817 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_ON();
3822 data = mtod(m, caddr_t);
3823 /* finish the last word */
3825 savebyte[1] = *data;
3826 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
3831 /* output contiguous words */
3833 outsw(sc->asic_addr + ED_NOVELL_DATA,
3838 /* save last byte, if necessary */
3840 savebyte[0] = *data;
3846 /* spit last byte */
3848 outw(sc->asic_addr + ED_NOVELL_DATA, *(u_short *)savebyte);
3850 #if defined(PC98) && (NCARD > 0)
3851 if (sc->type == ED_TYPE98_PCIC98) ED_PCIC98_16BIT_OFF();
3856 * Wait for remote DMA complete. This is necessary because on the
3857 * transmit side, data is handled internally by the NIC in bursts and
3858 * we can't start another remote DMA until this one completes. Not
3859 * waiting causes really bad things to happen - like the NIC
3860 * irrecoverably jamming the ISA bus.
3862 while (((inb(sc->nic_addr + ED_P0_ISR) & ED_ISR_RDC) != ED_ISR_RDC) && --maxwait);
3865 log(LOG_WARNING, "ed%d: remote transmit DMA failed to complete\n",
3874 * Support routines to handle the HP PC Lan+ card.
3878 * HP PC Lan+: Read from NIC memory, using either PIO or memory mapped
3883 ed_hpp_readmem(sc, src, dst, amount)
3884 struct ed_softc *sc;
3887 unsigned short amount;
3890 int use_32bit_access = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
3893 /* Program the source address in RAM */
3894 outw(sc->asic_addr + ED_HPP_PAGE_2, src);
3897 * The HP PC Lan+ card supports word reads as well as
3898 * a memory mapped i/o port that is aliased to every
3899 * even address on the board.
3902 if (sc->hpp_mem_start) {
3904 /* Enable memory mapped access. */
3905 outw(sc->asic_addr + ED_HPP_OPTION,
3907 ~(ED_HPP_OPTION_MEM_DISABLE |
3908 ED_HPP_OPTION_BOOT_ROM_ENB));
3910 if (use_32bit_access && (amount > 3)) {
3911 u_long *dl = (u_long *) dst;
3912 volatile u_long *const sl =
3913 (u_long *) sc->hpp_mem_start;
3914 u_long *const fence = dl + (amount >> 2);
3916 /* Copy out NIC data. We could probably write this
3917 as a `movsl'. The currently generated code is lousy.
3923 dst += (amount & ~3);
3928 /* Finish off any words left, as a series of short reads */
3930 u_short *d = (u_short *) dst;
3931 volatile u_short *const s =
3932 (u_short *) sc->hpp_mem_start;
3933 u_short *const fence = d + (amount >> 1);
3935 /* Copy out NIC data. */
3940 dst += (amount & ~1);
3945 * read in a byte; however we need to always read 16 bits
3946 * at a time or the hardware gets into a funny state
3950 /* need to read in a short and copy LSB */
3951 volatile u_short *const s =
3952 (volatile u_short *) sc->hpp_mem_start;
3957 /* Restore Boot ROM access. */
3959 outw(sc->asic_addr + ED_HPP_OPTION,
3964 /* Read in data using the I/O port */
3965 if (use_32bit_access && (amount > 3)) {
3966 insl(sc->asic_addr + ED_HPP_PAGE_4, dst, amount >> 2);
3967 dst += (amount & ~3);
3971 insw(sc->asic_addr + ED_HPP_PAGE_4, dst, amount >> 1);
3972 dst += (amount & ~1);
3975 if (amount == 1) { /* read in a short and keep the LSB */
3976 *dst = inw(sc->asic_addr + ED_HPP_PAGE_4) & 0xFF;
3982 * Write to HP PC Lan+ NIC memory. Access to the NIC can be by using
3983 * outsw() or via the memory mapped interface to the same register.
3984 * Writes have to be in word units; byte accesses won't work and may cause
3985 * the NIC to behave wierdly. Long word accesses are permitted if the ASIC
3990 ed_hpp_write_mbufs(struct ed_softc *sc, struct mbuf *m, int dst)
3993 unsigned short total_len;
3994 unsigned char savebyte[2];
3995 volatile u_short * const d =
3996 (volatile u_short *) sc->hpp_mem_start;
3997 int use_32bit_accesses = !(sc->hpp_id & ED_HPP_ID_16_BIT_ACCESS);
3999 /* select page 0 registers */
4000 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
4002 /* reset remote DMA complete flag */
4003 outb(sc->nic_addr + ED_P0_ISR, ED_ISR_RDC);
4005 /* program the write address in RAM */
4006 outw(sc->asic_addr + ED_HPP_PAGE_0, dst);
4008 if (sc->hpp_mem_start) /* enable memory mapped I/O */
4009 outw(sc->asic_addr + ED_HPP_OPTION, sc->hpp_options &
4010 ~(ED_HPP_OPTION_MEM_DISABLE |
4011 ED_HPP_OPTION_BOOT_ROM_ENB));
4016 if (sc->hpp_mem_start) { /* Memory mapped I/O port */
4018 total_len += (len = m->m_len);
4020 caddr_t data = mtod(m, caddr_t);
4021 /* finish the last word of the previous mbuf */
4023 savebyte[1] = *data;
4024 *d = *((ushort *) savebyte);
4025 data++; len--; wantbyte = 0;
4027 /* output contiguous words */
4028 if ((len > 3) && (use_32bit_accesses)) {
4029 volatile u_long *const dl =
4030 (volatile u_long *) d;
4031 u_long *sl = (u_long *) data;
4032 u_long *fence = sl + (len >> 2);
4040 /* finish off remain 16 bit writes */
4042 u_short *s = (u_short *) data;
4043 u_short *fence = s + (len >> 1);
4051 /* save last byte if needed */
4052 if ((wantbyte = (len == 1)) != 0)
4053 savebyte[0] = *data;
4055 m = m->m_next; /* to next mbuf */
4057 if (wantbyte) /* write last byte */
4058 *d = *((u_short *) savebyte);
4060 /* use programmed I/O */
4062 total_len += (len = m->m_len);
4064 caddr_t data = mtod(m, caddr_t);
4065 /* finish the last word of the previous mbuf */
4067 savebyte[1] = *data;
4068 outw(sc->asic_addr + ED_HPP_PAGE_4,
4069 *((u_short *)savebyte));
4074 /* output contiguous words */
4075 if ((len > 3) && use_32bit_accesses) {
4076 outsl(sc->asic_addr + ED_HPP_PAGE_4,
4081 /* finish off remaining 16 bit accesses */
4083 outsw(sc->asic_addr + ED_HPP_PAGE_4,
4088 if ((wantbyte = (len == 1)) != 0)
4089 savebyte[0] = *data;
4094 if (wantbyte) /* spit last byte */
4095 outw(sc->asic_addr + ED_HPP_PAGE_4,
4096 *(u_short *)savebyte);
4100 if (sc->hpp_mem_start) /* turn off memory mapped i/o */
4101 outw(sc->asic_addr + ED_HPP_OPTION,
4109 struct ed_softc *sc;
4111 struct ifnet *ifp = (struct ifnet *)sc;
4114 /* set page 1 registers */
4115 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_PAGE_1 | ED_CR_STP);
4117 if (ifp->if_flags & IFF_PROMISC) {
4120 * Reconfigure the multicast filter.
4122 for (i = 0; i < 8; i++)
4123 outb(sc->nic_addr + ED_P1_MAR(i), 0xff);
4126 * And turn on promiscuous mode. Also enable reception of
4127 * runts and packets with CRC & alignment errors.
4129 /* Set page 0 registers */
4130 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
4132 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_PRO | ED_RCR_AM |
4133 ED_RCR_AB | ED_RCR_AR | ED_RCR_SEP);
4135 /* set up multicast addresses and filter modes */
4136 if (ifp->if_flags & IFF_MULTICAST) {
4139 if (ifp->if_flags & IFF_ALLMULTI) {
4140 mcaf[0] = 0xffffffff;
4141 mcaf[1] = 0xffffffff;
4143 ds_getmcaf(sc, mcaf);
4146 * Set multicast filter on chip.
4148 for (i = 0; i < 8; i++)
4149 outb(sc->nic_addr + ED_P1_MAR(i), ((u_char *) mcaf)[i]);
4151 /* Set page 0 registers */
4152 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
4154 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AM | ED_RCR_AB);
4158 * Initialize multicast address hashing registers to
4159 * not accept multicasts.
4161 for (i = 0; i < 8; ++i)
4162 outb(sc->nic_addr + ED_P1_MAR(i), 0x00);
4164 /* Set page 0 registers */
4165 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STP);
4167 outb(sc->nic_addr + ED_P0_RCR, ED_RCR_AB);
4174 outb(sc->nic_addr + ED_P0_CR, sc->cr_proto | ED_CR_STA);
4178 * Compute crc for ethernet address
4184 #define POLYNOMIAL 0x04c11db6
4185 register u_long crc = 0xffffffffL;
4186 register int carry, i, j;
4189 for (i = 6; --i >= 0;) {
4191 for (j = 8; --j >= 0;) {
4192 carry = ((crc & 0x80000000L) ? 1 : 0) ^ (b & 0x01);
4196 crc = ((crc ^ POLYNOMIAL) | carry);
4204 * Compute the multicast address filter from the
4205 * list of multicast addresses we need to listen to.
4208 ds_getmcaf(sc, mcaf)
4209 struct ed_softc *sc;
4212 register u_int index;
4213 register u_char *af = (u_char *) mcaf;
4214 struct ifmultiaddr *ifma;
4219 for (ifma = sc->arpcom.ac_if.if_multiaddrs.lh_first; ifma;
4220 ifma = ifma->ifma_link.le_next) {
4221 if (ifma->ifma_addr->sa_family != AF_LINK)
4223 index = ds_crc(LLADDR((struct sockaddr_dl *)ifma->ifma_addr))
4225 af[index >> 3] |= 1 << (index & 7);
4230 * support PnP cards if we are using 'em
4235 static pnpid_t edpnp_ids[] = {
4236 { 0xd680d041, "NE2000"},
4240 static char *edpnp_probe(u_long csn, u_long vend_id);
4241 static void edpnp_attach(u_long csn, u_long vend_id, char *name,
4242 struct isa_device *dev);
4243 static u_long nedpnp = NED;
4245 static struct pnp_device edpnp = {
4252 DATA_SET (pnpdevice_set, edpnp);
4255 edpnp_probe(u_long csn, u_long vend_id)
4260 for(id = edpnp_ids; id->vend_id != 0; id++) {
4261 if (vend_id == id->vend_id) {
4269 read_pnp_parms(&d, 0);
4270 if (d.enable == 0 || d.flags & 1) {
4271 printf("CSN %lu is disabled.\n", csn);
4281 edpnp_attach(u_long csn, u_long vend_id, char *name, struct isa_device *dev)
4285 if (dev->id_unit >= NED)
4288 if (read_pnp_parms(&d, 0) == 0) {
4289 printf("failed to read pnp parms\n");
4293 write_pnp_parms(&d, 0);
4297 dev->id_iobase = d.port[0];
4298 dev->id_irq = (1 << d.irq[0]);
4299 dev->id_ointr = edintr;
4302 if (dev->id_driver == NULL) {
4303 dev->id_driver = &eddriver;
4304 dev->id_id = isa_compat_nextid();
4307 if (ed_probe(dev) != 0)
4310 printf("ed%d: probe failed\n", dev->id_unit);