2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
30 * 852GM/855GM/865G support added by David Dawes <dawes@xfree86.org>
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/malloc.h>
41 #include <sys/kernel.h>
42 #include <sys/module.h>
45 #include <sys/mutex.h>
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pcireg.h>
50 #include <pci/agppriv.h>
51 #include <pci/agpreg.h>
54 #include <vm/vm_object.h>
55 #include <vm/vm_page.h>
56 #include <vm/vm_pageout.h>
59 #include <machine/bus.h>
60 #include <machine/resource.h>
63 MALLOC_DECLARE(M_AGP);
65 #define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
66 #define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
67 #define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
68 #define WRITEGTT(off,v) bus_space_write_4(sc->gtt_bst, sc->gtt_bsh, off, v)
70 #define CHIP_I810 0 /* i810/i815 */
71 #define CHIP_I830 1 /* 830M/845G */
72 #define CHIP_I855 2 /* 852GM/855GM/865G */
73 #define CHIP_I915 3 /* 915G/915GM */
75 struct agp_i810_softc {
77 u_int32_t initial_aperture; /* aperture size at startup */
78 struct agp_gatt *gatt;
79 int chiptype; /* i810-like or i830 */
80 u_int32_t dcache_size; /* i810 only */
81 u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */
82 device_t bdev; /* bridge device */
84 struct resource *regs; /* memory mapped GC registers */
85 bus_space_tag_t bst; /* bus_space tag */
86 bus_space_handle_t bsh; /* bus_space handle */
88 struct resource *gtt; /* memory mapped GATT entries */
89 bus_space_tag_t gtt_bst; /* bus_space tag */
90 bus_space_handle_t gtt_bsh; /* bus_space handle */
92 void *argb_cursor; /* contigmalloc area for ARGB cursor */
95 /* For adding new devices, devid is the id of the graphics controller
96 * (pci:0:2:0, for example). The placeholder (usually at pci:0:2:1) for the
97 * second head should never be added. The bridge_offset is the offset to
98 * subtract from devid to get the id of the hostb that the device is on.
100 static const struct agp_i810_match {
105 } agp_i810_matches[] = {
106 {0x71218086, CHIP_I810, 0x00010000,
107 "Intel 82810 (i810 GMCH) SVGA controller"},
108 {0x71238086, CHIP_I810, 0x00010000,
109 "Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller"},
110 {0x71258086, CHIP_I810, 0x00010000,
111 "Intel 82810E (i810E GMCH) SVGA controller"},
112 {0x11328086, CHIP_I810, 0x00020000,
113 "Intel 82815 (i815 GMCH) SVGA controller"},
114 {0x35778086, CHIP_I830, 0x00020000,
115 "Intel 82830M (830M GMCH) SVGA controller"},
116 {0x35828086, CHIP_I855, 0x00020000,
118 {0x25728086, CHIP_I855, 0x00020000,
119 "Intel 82865G (865G GMCH) SVGA controller"},
120 {0x25828086, CHIP_I915, 0x00020000,
121 "Intel 82915G (915G GMCH) SVGA controller"},
122 {0x25928086, CHIP_I915, 0x00020000,
123 "Intel 82915GM (915GM GMCH) SVGA controller"},
124 /* XXX: I believe these chipsets should work, but they haven't been
128 {0x27728086, CHIP_I915, 0x00020000,
129 "Intel 82945G (945G GMCH) SVGA controller"},
130 {0x27A28086, CHIP_I915, 0x00020000,
131 "Intel 82945GM (945GM GMCH) SVGA controller"},
136 static const struct agp_i810_match*
137 agp_i810_match(device_t dev)
141 if (pci_get_class(dev) != PCIC_DISPLAY
142 || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
145 devid = pci_get_devid(dev);
146 for (i = 0; agp_i810_matches[i].devid != 0; i++) {
147 if (agp_i810_matches[i].devid == devid)
150 if (agp_i810_matches[i].devid == 0)
153 return &agp_i810_matches[i];
157 * Find bridge device.
160 agp_i810_find_bridge(device_t dev)
162 device_t *children, child;
165 const struct agp_i810_match *match;
167 match = agp_i810_match(dev);
168 devid = match->devid - match->bridge_offset;
170 if (device_get_children(device_get_parent(device_get_parent(dev)),
171 &children, &nchildren))
174 for (i = 0; i < nchildren; i++) {
177 if (pci_get_devid(child) == devid) {
178 free(children, M_TEMP);
182 free(children, M_TEMP);
187 agp_i810_identify(driver_t *driver, device_t parent)
190 if (device_find_child(parent, "agp", -1) == NULL &&
191 agp_i810_match(parent))
192 device_add_child(parent, "agp", -1);
196 agp_i810_probe(device_t dev)
199 const struct agp_i810_match *match;
201 if (resource_disabled("agp", device_get_unit(dev)))
203 match = agp_i810_match(dev);
207 bdev = agp_i810_find_bridge(dev);
210 printf("I810: can't find bridge device\n");
215 * checking whether internal graphics device has been activated.
217 if (match->chiptype == CHIP_I810) {
220 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
221 if ((smram & AGP_I810_SMRAM_GMS)
222 == AGP_I810_SMRAM_GMS_DISABLED) {
224 printf("I810: disabled, not probing\n");
227 } else if (match->chiptype == CHIP_I830 ||
228 match->chiptype == CHIP_I855) {
231 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
232 if ((gcc1 & AGP_I830_GCC1_DEV2) ==
233 AGP_I830_GCC1_DEV2_DISABLED) {
235 printf("I830: disabled, not probing\n");
238 } else if (match->chiptype == CHIP_I915) {
241 gcc1 = pci_read_config(bdev, AGP_I915_DEVEN, 4);
242 if ((gcc1 & AGP_I915_DEVEN_D2F0) ==
243 AGP_I915_DEVEN_D2F0_DISABLED) {
245 printf("I915: disabled, not probing\n");
250 if (match->devid == 0x35828086) {
251 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
254 "Intel 82855GME (855GME GMCH) SVGA controller");
258 "Intel 82855GM (855GM GMCH) SVGA controller");
262 "Intel 82852GME (852GME GMCH) SVGA controller");
266 "Intel 82852GM (852GM GMCH) SVGA controller");
270 "Intel 8285xM (85xGM GMCH) SVGA controller");
274 device_set_desc(dev, match->name);
277 return BUS_PROBE_DEFAULT;
281 agp_i810_attach(device_t dev)
283 struct agp_i810_softc *sc = device_get_softc(dev);
284 struct agp_gatt *gatt;
285 const struct agp_i810_match *match;
288 sc->bdev = agp_i810_find_bridge(dev);
292 error = agp_generic_attach(dev);
296 match = agp_i810_match(dev);
297 sc->chiptype = match->chiptype;
299 /* Same for i810 and i830 */
300 if (sc->chiptype == CHIP_I915)
301 rid = AGP_I915_MMADR;
303 rid = AGP_I810_MMADR;
305 sc->regs = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
308 agp_generic_detach(dev);
311 sc->bst = rman_get_bustag(sc->regs);
312 sc->bsh = rman_get_bushandle(sc->regs);
314 if (sc->chiptype == CHIP_I915) {
315 rid = AGP_I915_GTTADR;
316 sc->gtt = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
319 bus_release_resource(dev, SYS_RES_MEMORY,
320 AGP_I810_MMADR, sc->regs);
321 agp_generic_detach(dev);
324 sc->gtt_bst = rman_get_bustag(sc->gtt);
325 sc->gtt_bsh = rman_get_bushandle(sc->gtt);
328 sc->initial_aperture = AGP_GET_APERTURE(dev);
330 gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_NOWAIT);
332 agp_generic_detach(dev);
337 gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
339 if ( sc->chiptype == CHIP_I810 ) {
340 /* Some i810s have on-chip memory called dcache */
341 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
342 sc->dcache_size = 4 * 1024 * 1024;
346 /* According to the specs the gatt on the i810 must be 64k */
347 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
348 0, ~0, PAGE_SIZE, 0);
349 if (!gatt->ag_virtual) {
351 device_printf(dev, "contiguous allocation failed\n");
353 agp_generic_detach(dev);
356 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
358 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
360 /* Install the GATT. */
361 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
362 } else if ( sc->chiptype == CHIP_I830 ) {
363 /* The i830 automatically initializes the 128k gatt on boot. */
364 unsigned int gcc1, pgtblctl;
366 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
367 switch (gcc1 & AGP_I830_GCC1_GMS) {
368 case AGP_I830_GCC1_GMS_STOLEN_512:
369 sc->stolen = (512 - 132) * 1024 / 4096;
371 case AGP_I830_GCC1_GMS_STOLEN_1024:
372 sc->stolen = (1024 - 132) * 1024 / 4096;
374 case AGP_I830_GCC1_GMS_STOLEN_8192:
375 sc->stolen = (8192 - 132) * 1024 / 4096;
379 device_printf(dev, "unknown memory configuration, disabling\n");
380 agp_generic_detach(dev);
384 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
385 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
387 /* GATT address is already in there, make sure it's enabled */
388 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
390 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
392 gatt->ag_physical = pgtblctl & ~1;
393 } else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915) { /* CHIP_I855 */
394 unsigned int gcc1, pgtblctl, stolen;
396 /* Stolen memory is set up at the beginning of the aperture by
397 * the BIOS, consisting of the GATT followed by 4kb for the BIOS
400 if (sc->chiptype == CHIP_I855)
405 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
406 switch (gcc1 & AGP_I855_GCC1_GMS) {
407 case AGP_I855_GCC1_GMS_STOLEN_1M:
408 sc->stolen = (1024 - stolen) * 1024 / 4096;
410 case AGP_I855_GCC1_GMS_STOLEN_4M:
411 sc->stolen = (4096 - stolen) * 1024 / 4096;
413 case AGP_I855_GCC1_GMS_STOLEN_8M:
414 sc->stolen = (8192 - stolen) * 1024 / 4096;
416 case AGP_I855_GCC1_GMS_STOLEN_16M:
417 sc->stolen = (16384 - stolen) * 1024 / 4096;
419 case AGP_I855_GCC1_GMS_STOLEN_32M:
420 sc->stolen = (32768 - stolen) * 1024 / 4096;
422 case AGP_I915_GCC1_GMS_STOLEN_48M:
423 sc->stolen = (49152 - stolen) * 1024 / 4096;
425 case AGP_I915_GCC1_GMS_STOLEN_64M:
426 sc->stolen = (65536 - stolen) * 1024 / 4096;
430 device_printf(dev, "unknown memory configuration, disabling\n");
431 agp_generic_detach(dev);
435 device_printf(dev, "detected %dk stolen memory\n", sc->stolen * 4);
436 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
438 /* GATT address is already in there, make sure it's enabled */
439 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
441 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
443 gatt->ag_physical = pgtblctl & ~1;
450 agp_i810_detach(device_t dev)
452 struct agp_i810_softc *sc = device_get_softc(dev);
455 error = agp_generic_detach(dev);
459 /* Clear the GATT base. */
460 if ( sc->chiptype == CHIP_I810 ) {
461 WRITE4(AGP_I810_PGTBL_CTL, 0);
463 unsigned int pgtblctl;
464 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
466 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
469 /* Put the aperture back the way it started. */
470 AGP_SET_APERTURE(dev, sc->initial_aperture);
472 if ( sc->chiptype == CHIP_I810 ) {
473 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
475 free(sc->gatt, M_AGP);
477 if (sc->chiptype == CHIP_I915) {
478 bus_release_resource(dev, SYS_RES_MEMORY, AGP_I915_GTTADR,
480 bus_release_resource(dev, SYS_RES_MEMORY, AGP_I915_MMADR,
483 bus_release_resource(dev, SYS_RES_MEMORY, AGP_I810_MMADR,
491 agp_i810_get_aperture(device_t dev)
493 struct agp_i810_softc *sc = device_get_softc(dev);
497 switch (sc->chiptype) {
499 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
500 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
501 return 32 * 1024 * 1024;
503 return 64 * 1024 * 1024;
505 temp = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
506 if ((temp & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
507 return 64 * 1024 * 1024;
509 return 128 * 1024 * 1024;
511 return 128 * 1024 * 1024;
513 temp = pci_read_config(dev, AGP_I915_MSAC, 1);
514 if ((temp & AGP_I915_MSAC_GMASIZE) ==
515 AGP_I915_MSAC_GMASIZE_128) {
516 return 128 * 1024 * 1024;
518 return 256 * 1024 * 1024;
526 agp_i810_set_aperture(device_t dev, u_int32_t aperture)
528 struct agp_i810_softc *sc = device_get_softc(dev);
529 u_int16_t miscc, gcc1;
532 switch (sc->chiptype) {
535 * Double check for sanity.
537 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
538 device_printf(dev, "bad aperture size %d\n", aperture);
542 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
543 miscc &= ~AGP_I810_MISCC_WINSIZE;
544 if (aperture == 32 * 1024 * 1024)
545 miscc |= AGP_I810_MISCC_WINSIZE_32;
547 miscc |= AGP_I810_MISCC_WINSIZE_64;
549 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
552 if (aperture != 64 * 1024 * 1024 &&
553 aperture != 128 * 1024 * 1024) {
554 device_printf(dev, "bad aperture size %d\n", aperture);
557 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
558 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
559 if (aperture == 64 * 1024 * 1024)
560 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
562 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
564 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
567 if (aperture != 128 * 1024 * 1024) {
568 device_printf(dev, "bad aperture size %d\n", aperture);
573 temp = pci_read_config(dev, AGP_I915_MSAC, 1);
574 temp &= ~AGP_I915_MSAC_GMASIZE;
577 case 128 * 1024 * 1024:
578 temp |= AGP_I915_MSAC_GMASIZE_128;
580 case 256 * 1024 * 1024:
581 temp |= AGP_I915_MSAC_GMASIZE_256;
584 device_printf(dev, "bad aperture size %d\n", aperture);
588 pci_write_config(dev, AGP_I915_MSAC, temp, 1);
596 agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
598 struct agp_i810_softc *sc = device_get_softc(dev);
600 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
601 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
605 if ( sc->chiptype != CHIP_I810 ) {
606 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
607 device_printf(dev, "trying to bind into stolen memory");
612 if (sc->chiptype == CHIP_I915) {
613 WRITEGTT((offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
615 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
622 agp_i810_unbind_page(device_t dev, int offset)
624 struct agp_i810_softc *sc = device_get_softc(dev);
626 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
629 if ( sc->chiptype != CHIP_I810 ) {
630 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
631 device_printf(dev, "trying to unbind from stolen memory");
636 if (sc->chiptype == CHIP_I915) {
637 WRITEGTT((offset >> AGP_PAGE_SHIFT) * 4, 0);
639 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
646 * Writing via memory mapped registers already flushes all TLBs.
649 agp_i810_flush_tlb(device_t dev)
654 agp_i810_enable(device_t dev, u_int32_t mode)
660 static struct agp_memory *
661 agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
663 struct agp_i810_softc *sc = device_get_softc(dev);
664 struct agp_memory *mem;
666 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
669 if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
674 * Mapping local DRAM into GATT.
676 if ( sc->chiptype != CHIP_I810 )
678 if (size != sc->dcache_size)
680 } else if (type == 2) {
682 * Type 2 is the contiguous physical memory type, that hands
683 * back a physical address. This is used for cursors on i810.
684 * Hand back as many single pages with physical as the user
685 * wants, but only allow one larger allocation (ARGB cursor)
688 if (size != AGP_PAGE_SIZE) {
689 if (sc->argb_cursor != NULL)
692 /* Allocate memory for ARGB cursor, if we can. */
693 sc->argb_cursor = contigmalloc(size, M_AGP,
694 0, 0, ~0, PAGE_SIZE, 0);
695 if (sc->argb_cursor == NULL)
700 mem = malloc(sizeof *mem, M_AGP, M_WAITOK);
701 mem->am_id = sc->agp.as_nextid++;
704 if (type != 1 && (type != 2 || size == AGP_PAGE_SIZE))
705 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
706 atop(round_page(size)));
711 if (size == AGP_PAGE_SIZE) {
713 * Allocate and wire down the page now so that we can
714 * get its physical address.
718 VM_OBJECT_LOCK(mem->am_obj);
719 m = vm_page_grab(mem->am_obj, 0, VM_ALLOC_NOBUSY |
720 VM_ALLOC_WIRED | VM_ALLOC_ZERO | VM_ALLOC_RETRY);
721 VM_OBJECT_UNLOCK(mem->am_obj);
722 mem->am_physical = VM_PAGE_TO_PHYS(m);
724 /* Our allocation is already nicely wired down for us.
725 * Just grab the physical address.
727 mem->am_physical = vtophys(sc->argb_cursor);
730 mem->am_physical = 0;
734 mem->am_is_bound = 0;
735 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
736 sc->agp.as_allocated += size;
742 agp_i810_free_memory(device_t dev, struct agp_memory *mem)
744 struct agp_i810_softc *sc = device_get_softc(dev);
746 if (mem->am_is_bound)
749 if (mem->am_type == 2) {
750 if (mem->am_size == AGP_PAGE_SIZE) {
752 * Unwire the page which we wired in alloc_memory.
756 VM_OBJECT_LOCK(mem->am_obj);
757 m = vm_page_lookup(mem->am_obj, 0);
758 VM_OBJECT_UNLOCK(mem->am_obj);
759 vm_page_lock_queues();
760 vm_page_unwire(m, 0);
761 vm_page_unlock_queues();
763 contigfree(sc->argb_cursor, mem->am_size, M_AGP);
764 sc->argb_cursor = NULL;
768 sc->agp.as_allocated -= mem->am_size;
769 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
771 vm_object_deallocate(mem->am_obj);
777 agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
780 struct agp_i810_softc *sc = device_get_softc(dev);
783 /* Do some sanity checks first. */
784 if (offset < 0 || (offset & (AGP_PAGE_SIZE - 1)) != 0 ||
785 offset + mem->am_size > AGP_GET_APERTURE(dev)) {
786 device_printf(dev, "binding memory at bad offset %#x\n",
791 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
792 mtx_lock(&sc->agp.as_lock);
793 if (mem->am_is_bound) {
794 mtx_unlock(&sc->agp.as_lock);
797 /* The memory's already wired down, just stick it in the GTT. */
798 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
799 u_int32_t physical = mem->am_physical + i;
801 if (sc->chiptype == CHIP_I915) {
802 WRITEGTT(((offset + i) >> AGP_PAGE_SHIFT) * 4,
805 WRITE4(AGP_I810_GTT +
806 ((offset + i) >> AGP_PAGE_SHIFT) * 4,
811 mem->am_offset = offset;
812 mem->am_is_bound = 1;
813 mtx_unlock(&sc->agp.as_lock);
817 if (mem->am_type != 1)
818 return agp_generic_bind_memory(dev, mem, offset);
820 if ( sc->chiptype != CHIP_I810 )
823 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
824 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
832 agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
834 struct agp_i810_softc *sc = device_get_softc(dev);
837 if (mem->am_type == 2 && mem->am_size != AGP_PAGE_SIZE) {
838 mtx_lock(&sc->agp.as_lock);
839 if (!mem->am_is_bound) {
840 mtx_unlock(&sc->agp.as_lock);
844 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
845 vm_offset_t offset = mem->am_offset;
847 if (sc->chiptype == CHIP_I915) {
848 WRITEGTT(((offset + i) >> AGP_PAGE_SHIFT) * 4,
851 WRITE4(AGP_I810_GTT +
852 ((offset + i) >> AGP_PAGE_SHIFT) * 4, 0);
856 mem->am_is_bound = 0;
857 mtx_unlock(&sc->agp.as_lock);
861 if (mem->am_type != 1)
862 return agp_generic_unbind_memory(dev, mem);
864 if ( sc->chiptype != CHIP_I810 )
867 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
868 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
873 static device_method_t agp_i810_methods[] = {
874 /* Device interface */
875 DEVMETHOD(device_identify, agp_i810_identify),
876 DEVMETHOD(device_probe, agp_i810_probe),
877 DEVMETHOD(device_attach, agp_i810_attach),
878 DEVMETHOD(device_detach, agp_i810_detach),
881 DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
882 DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
883 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
884 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
885 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
886 DEVMETHOD(agp_enable, agp_i810_enable),
887 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
888 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
889 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
890 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
895 static driver_t agp_i810_driver = {
898 sizeof(struct agp_i810_softc),
901 static devclass_t agp_devclass;
903 DRIVER_MODULE(agp_i810, vgapci, agp_i810_driver, agp_devclass, 0, 0);
904 MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
905 MODULE_DEPEND(agp_i810, pci, 1, 1, 1);