2 * Copyright (c) 1998, 1999, 2001 Nicolas Souchu
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Power Management support for the Acer M15x3 chipsets
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/systm.h>
37 #include <sys/module.h>
41 #include <machine/bus_pio.h>
42 #include <machine/bus_memio.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
50 #include <dev/iicbus/iiconf.h>
51 #include <dev/smbus/smbconf.h>
54 #define ALPM_DEBUG(x) if (alpm_debug) (x)
57 static int alpm_debug = 1;
59 static int alpm_debug = 0;
62 #define ACER_M1543_PMU_ID 0x710110b9
64 /* Uncomment this line to force another I/O base address for SMB */
65 /* #define ALPM_SMBIO_BASE_ADDR 0x3a80 */
67 /* I/O registers offsets - the base address is programmed via the
68 * SMBBA PCI configuration register
70 #define SMBSTS 0x0 /* SMBus host/slave status register */
71 #define SMBCMD 0x1 /* SMBus host/slave command register */
72 #define SMBSTART 0x2 /* start to generate programmed cycle */
73 #define SMBHADDR 0x3 /* host address register */
74 #define SMBHDATA 0x4 /* data A register for host controller */
75 #define SMBHDATB 0x5 /* data B register for host controller */
76 #define SMBHBLOCK 0x6 /* block register for host controller */
77 #define SMBHCMD 0x7 /* command register for host controller */
80 #define TERMINATE 0x80
81 #define BUS_COLLI 0x40
82 #define DEVICE_ERR 0x20
83 #define SMI_I_STS 0x10
86 #define HSTSLV_STS 0x02
87 #define HSTSLV_BSY 0x01
90 #define SMB_BLK_CLR 0x80
91 #define T_OUT_CMD 0x08
92 #define ABORT_HOST 0x04
96 #define SMBSRBYTE 0x10 /* send/receive byte */
97 #define SMBWRBYTE 0x20 /* write/read byte */
98 #define SMBWRWORD 0x30 /* write/read word */
99 #define SMBWRBLOCK 0x40 /* write/read block */
101 /* PCI configuration registers and masks
104 #define COM_ENABLE_IO 0x1
109 #define ATPC_SMBCTRL 0x04 /* XX linux has this as 0x6 */
112 #define SMBHSI_SLAVE 0x2
113 #define SMBHSI_HOST 0x1
116 #define SMBHCBC_CLOCK 0x70
118 #define SMBCLOCK_149K 0x0
119 #define SMBCLOCK_74K 0x20
120 #define SMBCLOCK_37K 0x40
121 #define SMBCLOCK_223K 0x80
122 #define SMBCLOCK_111K 0xa0
123 #define SMBCLOCK_55K 0xc0
127 struct resource *res;
128 bus_space_tag_t smbst;
129 bus_space_handle_t smbsh;
133 #define ALPM_SMBINB(alpm,register) \
134 (bus_space_read_1(alpm->smbst, alpm->smbsh, register))
135 #define ALPM_SMBOUTB(alpm,register,value) \
136 (bus_space_write_1(alpm->smbst, alpm->smbsh, register, value))
139 alpm_probe(device_t dev)
141 #ifdef ALPM_SMBIO_BASE_ADDR
145 if (pci_get_devid(dev) == ACER_M1543_PMU_ID) {
146 device_set_desc(dev, "AcerLabs M15x3 Power Management Unit");
148 #ifdef ALPM_SMBIO_BASE_ADDR
149 if (bootverbose || alpm_debug)
150 device_printf(dev, "forcing base I/O at 0x%x\n",
151 ALPM_SMBIO_BASE_ADDR);
154 l = pci_read_config(dev, COM, 2);
155 pci_write_config(dev, COM, l & ~COM_ENABLE_IO, 2);
157 /* set the I/O base address */
158 pci_write_config(dev, SMBBA, ALPM_SMBIO_BASE_ADDR | 0x1, 4);
161 pci_write_config(dev, COM, l | COM_ENABLE_IO, 2);
163 if (bus_set_resource(dev, SYS_RES_IOPORT, SMBBA,
164 ALPM_SMBIO_BASE_ADDR, 256)) {
165 device_printf(dev, "could not set bus resource\n");
176 alpm_attach(device_t dev)
180 struct alpm_softc *alpm;
182 alpm = device_get_softc(dev);
184 /* Unlock SMBIO base register access */
185 l = pci_read_config(dev, ATPC, 1);
186 pci_write_config(dev, ATPC, l & ~ATPC_SMBCTRL, 1);
189 * XX linux sets clock to 74k, should we?
190 l = pci_read_config(dev, SMBHCBC, 1);
193 pci_write_config(dev, SMBHCBC, l, 1);
196 if (bootverbose || alpm_debug) {
197 l = pci_read_config(dev, SMBHSI, 1);
198 device_printf(dev, "%s/%s",
199 (l & SMBHSI_HOST) ? "host":"nohost",
200 (l & SMBHSI_SLAVE) ? "slave":"noslave");
202 l = pci_read_config(dev, SMBHCBC, 1);
203 switch (l & SMBHCBC_CLOCK) {
230 alpm->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
233 if (alpm->res == NULL) {
234 device_printf(dev,"Could not allocate Bus space\n");
237 alpm->smbst = rman_get_bustag(alpm->res);
238 alpm->smbsh = rman_get_bushandle(alpm->res);
240 /* attach the smbus */
241 alpm->smbus = device_add_child(dev, "smbus", -1);
242 bus_generic_attach(dev);
248 alpm_detach(device_t dev)
250 struct alpm_softc *alpm = device_get_softc(dev);
253 device_delete_child(dev, alpm->smbus);
258 bus_release_resource(dev, SYS_RES_IOPORT, SMBBA, alpm->res);
264 alpm_callback(device_t dev, int index, caddr_t *data)
269 case SMB_REQUEST_BUS:
270 case SMB_RELEASE_BUS:
271 /* ok, bus allocation accepted */
281 alpm_clear(struct alpm_softc *sc)
283 ALPM_SMBOUTB(sc, SMBSTS, 0xff);
291 alpm_abort(struct alpm_softc *sc)
293 ALPM_SMBOUTB(sc, SMBCMD, T_OUT_CMD | ABORT_HOST);
300 alpm_idle(struct alpm_softc *sc)
304 sts = ALPM_SMBINB(sc, SMBSTS);
306 ALPM_DEBUG(printf("alpm: idle? STS=0x%x\n", sts));
308 return (sts & IDL_STS);
312 * Poll the SMBus controller
315 alpm_wait(struct alpm_softc *sc)
321 /* wait for command to complete and SMBus controller is idle */
324 sts = ALPM_SMBINB(sc, SMBSTS);
329 ALPM_DEBUG(printf("alpm: STS=0x%x\n", sts));
334 error |= SMB_ETIMEOUT;
342 if (sts & DEVICE_ERR)
343 error |= SMB_EBUSERR;
345 if (error != SMB_ENOERR)
352 alpm_quick(device_t dev, u_char slave, int how)
354 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
363 ALPM_DEBUG(printf("alpm: QWRITE to 0x%x", slave));
364 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
367 ALPM_DEBUG(printf("alpm: QREAD to 0x%x", slave));
368 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
371 panic("%s: unknown QUICK command (%x)!", __func__,
374 ALPM_SMBOUTB(sc, SMBCMD, SMBQUICK);
375 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
377 error = alpm_wait(sc);
379 ALPM_DEBUG(printf(", error=0x%x\n", error));
385 alpm_sendb(device_t dev, u_char slave, char byte)
387 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
394 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
395 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
396 ALPM_SMBOUTB(sc, SMBHDATA, byte);
397 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
399 error = alpm_wait(sc);
401 ALPM_DEBUG(printf("alpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
407 alpm_recvb(device_t dev, u_char slave, char *byte)
409 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
416 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
417 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
418 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
420 if ((error = alpm_wait(sc)) == SMB_ENOERR)
421 *byte = ALPM_SMBINB(sc, SMBHDATA);
423 ALPM_DEBUG(printf("alpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
429 alpm_writeb(device_t dev, u_char slave, char cmd, char byte)
431 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
438 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
439 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
440 ALPM_SMBOUTB(sc, SMBHDATA, byte);
441 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
442 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
444 error = alpm_wait(sc);
446 ALPM_DEBUG(printf("alpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
452 alpm_readb(device_t dev, u_char slave, char cmd, char *byte)
454 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
461 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
462 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
463 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
464 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
466 if ((error = alpm_wait(sc)) == SMB_ENOERR)
467 *byte = ALPM_SMBINB(sc, SMBHDATA);
469 ALPM_DEBUG(printf("alpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
475 alpm_writew(device_t dev, u_char slave, char cmd, short word)
477 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
484 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
485 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
486 ALPM_SMBOUTB(sc, SMBHDATA, word & 0x00ff);
487 ALPM_SMBOUTB(sc, SMBHDATB, (word & 0xff00) >> 8);
488 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
489 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
491 error = alpm_wait(sc);
493 ALPM_DEBUG(printf("alpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
499 alpm_readw(device_t dev, u_char slave, char cmd, short *word)
501 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
509 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
510 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
511 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
512 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
514 if ((error = alpm_wait(sc)) == SMB_ENOERR) {
515 low = ALPM_SMBINB(sc, SMBHDATA);
516 high = ALPM_SMBINB(sc, SMBHDATB);
518 *word = ((high & 0xff) << 8) | (low & 0xff);
521 ALPM_DEBUG(printf("alpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
527 alpm_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
529 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
530 u_char remain, len, i;
531 int error = SMB_ENOERR;
539 len = min(remain, 32);
541 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
543 /* set the cmd and reset the
544 * 32-byte long internal buffer */
545 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
547 ALPM_SMBOUTB(sc, SMBHDATA, len);
549 /* fill the 32-byte internal buffer */
550 for (i=0; i<len; i++) {
551 ALPM_SMBOUTB(sc, SMBHBLOCK, buf[count-remain+i]);
554 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
555 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
557 if ((error = alpm_wait(sc)) != SMB_ENOERR)
564 ALPM_DEBUG(printf("alpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
570 alpm_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
572 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
573 u_char remain, len, i;
574 int error = SMB_ENOERR;
582 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
584 /* set the cmd and reset the
585 * 32-byte long internal buffer */
586 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
588 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
589 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
591 if ((error = alpm_wait(sc)) != SMB_ENOERR)
594 len = ALPM_SMBINB(sc, SMBHDATA);
596 /* read the 32-byte internal buffer */
597 for (i=0; i<len; i++) {
598 buf[count-remain+i] = ALPM_SMBINB(sc, SMBHBLOCK);
605 ALPM_DEBUG(printf("alpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
610 static devclass_t alpm_devclass;
612 static device_method_t alpm_methods[] = {
613 /* device interface */
614 DEVMETHOD(device_probe, alpm_probe),
615 DEVMETHOD(device_attach, alpm_attach),
616 DEVMETHOD(device_detach, alpm_detach),
618 /* smbus interface */
619 DEVMETHOD(smbus_callback, alpm_callback),
620 DEVMETHOD(smbus_quick, alpm_quick),
621 DEVMETHOD(smbus_sendb, alpm_sendb),
622 DEVMETHOD(smbus_recvb, alpm_recvb),
623 DEVMETHOD(smbus_writeb, alpm_writeb),
624 DEVMETHOD(smbus_readb, alpm_readb),
625 DEVMETHOD(smbus_writew, alpm_writew),
626 DEVMETHOD(smbus_readw, alpm_readw),
627 DEVMETHOD(smbus_bwrite, alpm_bwrite),
628 DEVMETHOD(smbus_bread, alpm_bread),
633 static driver_t alpm_driver = {
636 sizeof(struct alpm_softc)
639 DRIVER_MODULE(alpm, pci, alpm_driver, alpm_devclass, 0, 0);
640 MODULE_DEPEND(alpm, pci, 1, 1, 1);
641 MODULE_DEPEND(alpm, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
642 MODULE_VERSION(alpm, 1);