2 * Copyright (c) 1998, 1999, 2001 Nicolas Souchu
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * Power Management support for the Acer M15x3 chipsets
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/systm.h>
37 #include <sys/module.h>
41 #include <machine/bus.h>
42 #include <machine/resource.h>
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcireg.h>
48 #include <dev/iicbus/iiconf.h>
49 #include <dev/smbus/smbconf.h>
52 #define ALPM_DEBUG(x) if (alpm_debug) (x)
55 static int alpm_debug = 1;
57 static int alpm_debug = 0;
60 #define ACER_M1543_PMU_ID 0x710110b9
62 /* Uncomment this line to force another I/O base address for SMB */
63 /* #define ALPM_SMBIO_BASE_ADDR 0x3a80 */
65 /* I/O registers offsets - the base address is programmed via the
66 * SMBBA PCI configuration register
68 #define SMBSTS 0x0 /* SMBus host/slave status register */
69 #define SMBCMD 0x1 /* SMBus host/slave command register */
70 #define SMBSTART 0x2 /* start to generate programmed cycle */
71 #define SMBHADDR 0x3 /* host address register */
72 #define SMBHDATA 0x4 /* data A register for host controller */
73 #define SMBHDATB 0x5 /* data B register for host controller */
74 #define SMBHBLOCK 0x6 /* block register for host controller */
75 #define SMBHCMD 0x7 /* command register for host controller */
78 #define TERMINATE 0x80
79 #define BUS_COLLI 0x40
80 #define DEVICE_ERR 0x20
81 #define SMI_I_STS 0x10
84 #define HSTSLV_STS 0x02
85 #define HSTSLV_BSY 0x01
88 #define SMB_BLK_CLR 0x80
89 #define T_OUT_CMD 0x08
90 #define ABORT_HOST 0x04
94 #define SMBSRBYTE 0x10 /* send/receive byte */
95 #define SMBWRBYTE 0x20 /* write/read byte */
96 #define SMBWRWORD 0x30 /* write/read word */
97 #define SMBWRBLOCK 0x40 /* write/read block */
99 /* PCI configuration registers and masks
102 #define COM_ENABLE_IO 0x1
107 #define ATPC_SMBCTRL 0x04 /* XX linux has this as 0x6 */
110 #define SMBHSI_SLAVE 0x2
111 #define SMBHSI_HOST 0x1
114 #define SMBHCBC_CLOCK 0x70
116 #define SMBCLOCK_149K 0x0
117 #define SMBCLOCK_74K 0x20
118 #define SMBCLOCK_37K 0x40
119 #define SMBCLOCK_223K 0x80
120 #define SMBCLOCK_111K 0xa0
121 #define SMBCLOCK_55K 0xc0
125 struct resource *res;
126 bus_space_tag_t smbst;
127 bus_space_handle_t smbsh;
131 #define ALPM_SMBINB(alpm,register) \
132 (bus_space_read_1(alpm->smbst, alpm->smbsh, register))
133 #define ALPM_SMBOUTB(alpm,register,value) \
134 (bus_space_write_1(alpm->smbst, alpm->smbsh, register, value))
137 alpm_probe(device_t dev)
139 #ifdef ALPM_SMBIO_BASE_ADDR
143 if (pci_get_devid(dev) == ACER_M1543_PMU_ID) {
144 device_set_desc(dev, "AcerLabs M15x3 Power Management Unit");
146 #ifdef ALPM_SMBIO_BASE_ADDR
147 if (bootverbose || alpm_debug)
148 device_printf(dev, "forcing base I/O at 0x%x\n",
149 ALPM_SMBIO_BASE_ADDR);
152 l = pci_read_config(dev, COM, 2);
153 pci_write_config(dev, COM, l & ~COM_ENABLE_IO, 2);
155 /* set the I/O base address */
156 pci_write_config(dev, SMBBA, ALPM_SMBIO_BASE_ADDR | 0x1, 4);
159 pci_write_config(dev, COM, l | COM_ENABLE_IO, 2);
161 if (bus_set_resource(dev, SYS_RES_IOPORT, SMBBA,
162 ALPM_SMBIO_BASE_ADDR, 256)) {
163 device_printf(dev, "could not set bus resource\n");
167 return (BUS_PROBE_DEFAULT);
174 alpm_attach(device_t dev)
178 struct alpm_softc *alpm;
180 alpm = device_get_softc(dev);
182 /* Unlock SMBIO base register access */
183 l = pci_read_config(dev, ATPC, 1);
184 pci_write_config(dev, ATPC, l & ~ATPC_SMBCTRL, 1);
187 * XX linux sets clock to 74k, should we?
188 l = pci_read_config(dev, SMBHCBC, 1);
191 pci_write_config(dev, SMBHCBC, l, 1);
194 if (bootverbose || alpm_debug) {
195 l = pci_read_config(dev, SMBHSI, 1);
196 device_printf(dev, "%s/%s",
197 (l & SMBHSI_HOST) ? "host":"nohost",
198 (l & SMBHSI_SLAVE) ? "slave":"noslave");
200 l = pci_read_config(dev, SMBHCBC, 1);
201 switch (l & SMBHCBC_CLOCK) {
228 alpm->res = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
231 if (alpm->res == NULL) {
232 device_printf(dev,"Could not allocate Bus space\n");
235 alpm->smbst = rman_get_bustag(alpm->res);
236 alpm->smbsh = rman_get_bushandle(alpm->res);
238 /* attach the smbus */
239 alpm->smbus = device_add_child(dev, "smbus", -1);
240 bus_generic_attach(dev);
246 alpm_detach(device_t dev)
248 struct alpm_softc *alpm = device_get_softc(dev);
251 device_delete_child(dev, alpm->smbus);
256 bus_release_resource(dev, SYS_RES_IOPORT, SMBBA, alpm->res);
262 alpm_callback(device_t dev, int index, caddr_t *data)
267 case SMB_REQUEST_BUS:
268 case SMB_RELEASE_BUS:
269 /* ok, bus allocation accepted */
279 alpm_clear(struct alpm_softc *sc)
281 ALPM_SMBOUTB(sc, SMBSTS, 0xff);
289 alpm_abort(struct alpm_softc *sc)
291 ALPM_SMBOUTB(sc, SMBCMD, T_OUT_CMD | ABORT_HOST);
298 alpm_idle(struct alpm_softc *sc)
302 sts = ALPM_SMBINB(sc, SMBSTS);
304 ALPM_DEBUG(printf("alpm: idle? STS=0x%x\n", sts));
306 return (sts & IDL_STS);
310 * Poll the SMBus controller
313 alpm_wait(struct alpm_softc *sc)
319 /* wait for command to complete and SMBus controller is idle */
322 sts = ALPM_SMBINB(sc, SMBSTS);
327 ALPM_DEBUG(printf("alpm: STS=0x%x\n", sts));
332 error |= SMB_ETIMEOUT;
340 if (sts & DEVICE_ERR)
341 error |= SMB_EBUSERR;
343 if (error != SMB_ENOERR)
350 alpm_quick(device_t dev, u_char slave, int how)
352 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
361 ALPM_DEBUG(printf("alpm: QWRITE to 0x%x", slave));
362 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
365 ALPM_DEBUG(printf("alpm: QREAD to 0x%x", slave));
366 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
369 panic("%s: unknown QUICK command (%x)!", __func__,
372 ALPM_SMBOUTB(sc, SMBCMD, SMBQUICK);
373 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
375 error = alpm_wait(sc);
377 ALPM_DEBUG(printf(", error=0x%x\n", error));
383 alpm_sendb(device_t dev, u_char slave, char byte)
385 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
392 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
393 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
394 ALPM_SMBOUTB(sc, SMBHDATA, byte);
395 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
397 error = alpm_wait(sc);
399 ALPM_DEBUG(printf("alpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
405 alpm_recvb(device_t dev, u_char slave, char *byte)
407 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
414 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
415 ALPM_SMBOUTB(sc, SMBCMD, SMBSRBYTE);
416 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
418 if ((error = alpm_wait(sc)) == SMB_ENOERR)
419 *byte = ALPM_SMBINB(sc, SMBHDATA);
421 ALPM_DEBUG(printf("alpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
427 alpm_writeb(device_t dev, u_char slave, char cmd, char byte)
429 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
436 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
437 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
438 ALPM_SMBOUTB(sc, SMBHDATA, byte);
439 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
440 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
442 error = alpm_wait(sc);
444 ALPM_DEBUG(printf("alpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
450 alpm_readb(device_t dev, u_char slave, char cmd, char *byte)
452 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
459 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
460 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBYTE);
461 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
462 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
464 if ((error = alpm_wait(sc)) == SMB_ENOERR)
465 *byte = ALPM_SMBINB(sc, SMBHDATA);
467 ALPM_DEBUG(printf("alpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
473 alpm_writew(device_t dev, u_char slave, char cmd, short word)
475 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
482 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
483 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
484 ALPM_SMBOUTB(sc, SMBHDATA, word & 0x00ff);
485 ALPM_SMBOUTB(sc, SMBHDATB, (word & 0xff00) >> 8);
486 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
487 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
489 error = alpm_wait(sc);
491 ALPM_DEBUG(printf("alpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
497 alpm_readw(device_t dev, u_char slave, char cmd, short *word)
499 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
507 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
508 ALPM_SMBOUTB(sc, SMBCMD, SMBWRWORD);
509 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
510 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
512 if ((error = alpm_wait(sc)) == SMB_ENOERR) {
513 low = ALPM_SMBINB(sc, SMBHDATA);
514 high = ALPM_SMBINB(sc, SMBHDATB);
516 *word = ((high & 0xff) << 8) | (low & 0xff);
519 ALPM_DEBUG(printf("alpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
525 alpm_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
527 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
528 u_char remain, len, i;
529 int error = SMB_ENOERR;
537 len = min(remain, 32);
539 ALPM_SMBOUTB(sc, SMBHADDR, slave & ~LSB);
541 /* set the cmd and reset the
542 * 32-byte long internal buffer */
543 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
545 ALPM_SMBOUTB(sc, SMBHDATA, len);
547 /* fill the 32-byte internal buffer */
548 for (i=0; i<len; i++) {
549 ALPM_SMBOUTB(sc, SMBHBLOCK, buf[count-remain+i]);
552 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
553 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
555 if ((error = alpm_wait(sc)) != SMB_ENOERR)
562 ALPM_DEBUG(printf("alpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
568 alpm_bread(device_t dev, u_char slave, char cmd, u_char count, char *buf)
570 struct alpm_softc *sc = (struct alpm_softc *)device_get_softc(dev);
571 u_char remain, len, i;
572 int error = SMB_ENOERR;
580 ALPM_SMBOUTB(sc, SMBHADDR, slave | LSB);
582 /* set the cmd and reset the
583 * 32-byte long internal buffer */
584 ALPM_SMBOUTB(sc, SMBCMD, SMBWRBLOCK | SMB_BLK_CLR);
586 ALPM_SMBOUTB(sc, SMBHCMD, cmd);
587 ALPM_SMBOUTB(sc, SMBSTART, 0xff);
589 if ((error = alpm_wait(sc)) != SMB_ENOERR)
592 len = ALPM_SMBINB(sc, SMBHDATA);
594 /* read the 32-byte internal buffer */
595 for (i=0; i<len; i++) {
596 buf[count-remain+i] = ALPM_SMBINB(sc, SMBHBLOCK);
603 ALPM_DEBUG(printf("alpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
608 static devclass_t alpm_devclass;
610 static device_method_t alpm_methods[] = {
611 /* device interface */
612 DEVMETHOD(device_probe, alpm_probe),
613 DEVMETHOD(device_attach, alpm_attach),
614 DEVMETHOD(device_detach, alpm_detach),
616 /* smbus interface */
617 DEVMETHOD(smbus_callback, alpm_callback),
618 DEVMETHOD(smbus_quick, alpm_quick),
619 DEVMETHOD(smbus_sendb, alpm_sendb),
620 DEVMETHOD(smbus_recvb, alpm_recvb),
621 DEVMETHOD(smbus_writeb, alpm_writeb),
622 DEVMETHOD(smbus_readb, alpm_readb),
623 DEVMETHOD(smbus_writew, alpm_writew),
624 DEVMETHOD(smbus_readw, alpm_readw),
625 DEVMETHOD(smbus_bwrite, alpm_bwrite),
626 DEVMETHOD(smbus_bread, alpm_bread),
631 static driver_t alpm_driver = {
634 sizeof(struct alpm_softc)
637 DRIVER_MODULE(alpm, pci, alpm_driver, alpm_devclass, 0, 0);
638 MODULE_DEPEND(alpm, pci, 1, 1, 1);
639 MODULE_DEPEND(alpm, smbus, SMBUS_MINVER, SMBUS_PREFVER, SMBUS_MAXVER);
640 MODULE_VERSION(alpm, 1);