2 * Copyright (c) 2000 Berkeley Software Design, Inc.
3 * Copyright (c) 1997, 1998, 1999, 2000
4 * Bill Paul <wpaul@osd.bsdi.com>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Bill Paul.
17 * 4. Neither the name of the author nor the names of any co-contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
38 * AMD Am79c972 fast ethernet PCI NIC driver. Datasheets are available
39 * from http://www.amd.com.
41 * The AMD PCnet/PCI controllers are more advanced and functional
42 * versions of the venerable 7990 LANCE. The PCnet/PCI chips retain
43 * backwards compatibility with the LANCE and thus can be made
44 * to work with older LANCE drivers. This is in fact how the
45 * PCnet/PCI chips were supported in FreeBSD originally. The trouble
46 * is that the PCnet/PCI devices offer several performance enhancements
47 * which can't be exploited in LANCE compatibility mode. Chief among
48 * these enhancements is the ability to perform PCI DMA operations
49 * using 32-bit addressing (which eliminates the need for ISA
50 * bounce-buffering), and special receive buffer alignment (which
51 * allows the receive handler to pass packets to the upper protocol
52 * layers without copying on both the x86 and alpha platforms).
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sockio.h>
59 #include <sys/malloc.h>
60 #include <sys/kernel.h>
61 #include <sys/module.h>
62 #include <sys/socket.h>
65 #include <net/if_arp.h>
66 #include <net/ethernet.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/if_types.h>
73 #include <vm/vm.h> /* for vtophys */
74 #include <vm/pmap.h> /* for vtophys */
75 #include <machine/bus.h>
76 #include <machine/resource.h>
80 #include <dev/mii/mii.h>
81 #include <dev/mii/miivar.h>
83 #include <dev/pci/pcireg.h>
84 #include <dev/pci/pcivar.h>
86 #define PCN_USEIOSPACE
88 #include <pci/if_pcnreg.h>
90 MODULE_DEPEND(pcn, pci, 1, 1, 1);
91 MODULE_DEPEND(pcn, ether, 1, 1, 1);
92 MODULE_DEPEND(pcn, miibus, 1, 1, 1);
94 /* "device miibus" required. See GENERIC if you get errors here. */
95 #include "miibus_if.h"
98 * Various supported device vendors/types and their names.
100 static struct pcn_type pcn_devs[] = {
101 { PCN_VENDORID, PCN_DEVICEID_PCNET, "AMD PCnet/PCI 10/100BaseTX" },
102 { PCN_VENDORID, PCN_DEVICEID_HOME, "AMD PCnet/Home HomePNA" },
106 static struct pcn_chipid {
110 { Am79C960, "Am79C960" },
111 { Am79C961, "Am79C961" },
112 { Am79C961A, "Am79C961A" },
113 { Am79C965, "Am79C965" },
114 { Am79C970, "Am79C970" },
115 { Am79C970A, "Am79C970A" },
116 { Am79C971, "Am79C971" },
117 { Am79C972, "Am79C972" },
118 { Am79C973, "Am79C973" },
119 { Am79C978, "Am79C978" },
120 { Am79C975, "Am79C975" },
121 { Am79C976, "Am79C976" },
125 static char * pcn_chipid_name(u_int32_t);
126 static u_int32_t pcn_chip_id(device_t);
128 static u_int32_t pcn_csr_read(struct pcn_softc *, int);
129 static u_int16_t pcn_csr_read16(struct pcn_softc *, int);
130 static u_int16_t pcn_bcr_read16(struct pcn_softc *, int);
131 static void pcn_csr_write(struct pcn_softc *, int, int);
132 static u_int32_t pcn_bcr_read(struct pcn_softc *, int);
133 static void pcn_bcr_write(struct pcn_softc *, int, int);
135 static int pcn_probe(device_t);
136 static int pcn_attach(device_t);
137 static int pcn_detach(device_t);
139 static int pcn_newbuf(struct pcn_softc *, int, struct mbuf *);
140 static int pcn_encap(struct pcn_softc *, struct mbuf *, u_int32_t *);
141 static void pcn_rxeof(struct pcn_softc *);
142 static void pcn_txeof(struct pcn_softc *);
143 static void pcn_intr(void *);
144 static void pcn_tick(void *);
145 static void pcn_start(struct ifnet *);
146 static void pcn_start_locked(struct ifnet *);
147 static int pcn_ioctl(struct ifnet *, u_long, caddr_t);
148 static void pcn_init(void *);
149 static void pcn_init_locked(struct pcn_softc *);
150 static void pcn_stop(struct pcn_softc *);
151 static void pcn_watchdog(struct ifnet *);
152 static void pcn_shutdown(device_t);
153 static int pcn_ifmedia_upd(struct ifnet *);
154 static void pcn_ifmedia_sts(struct ifnet *, struct ifmediareq *);
156 static int pcn_miibus_readreg(device_t, int, int);
157 static int pcn_miibus_writereg(device_t, int, int, int);
158 static void pcn_miibus_statchg(device_t);
160 static void pcn_setfilt(struct ifnet *);
161 static void pcn_setmulti(struct pcn_softc *);
162 static void pcn_reset(struct pcn_softc *);
163 static int pcn_list_rx_init(struct pcn_softc *);
164 static int pcn_list_tx_init(struct pcn_softc *);
166 #ifdef PCN_USEIOSPACE
167 #define PCN_RES SYS_RES_IOPORT
168 #define PCN_RID PCN_PCI_LOIO
170 #define PCN_RES SYS_RES_MEMORY
171 #define PCN_RID PCN_PCI_LOMEM
174 static device_method_t pcn_methods[] = {
175 /* Device interface */
176 DEVMETHOD(device_probe, pcn_probe),
177 DEVMETHOD(device_attach, pcn_attach),
178 DEVMETHOD(device_detach, pcn_detach),
179 DEVMETHOD(device_shutdown, pcn_shutdown),
182 DEVMETHOD(bus_print_child, bus_generic_print_child),
183 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
186 DEVMETHOD(miibus_readreg, pcn_miibus_readreg),
187 DEVMETHOD(miibus_writereg, pcn_miibus_writereg),
188 DEVMETHOD(miibus_statchg, pcn_miibus_statchg),
193 static driver_t pcn_driver = {
196 sizeof(struct pcn_softc)
199 static devclass_t pcn_devclass;
201 DRIVER_MODULE(pcn, pci, pcn_driver, pcn_devclass, 0, 0);
202 DRIVER_MODULE(miibus, pcn, miibus_driver, miibus_devclass, 0, 0);
204 #define PCN_CSR_SETBIT(sc, reg, x) \
205 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) | (x))
207 #define PCN_CSR_CLRBIT(sc, reg, x) \
208 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) & ~(x))
210 #define PCN_BCR_SETBIT(sc, reg, x) \
211 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) | (x))
213 #define PCN_BCR_CLRBIT(sc, reg, x) \
214 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) & ~(x))
217 pcn_csr_read(sc, reg)
218 struct pcn_softc *sc;
221 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
222 return(CSR_READ_4(sc, PCN_IO32_RDP));
226 pcn_csr_read16(sc, reg)
227 struct pcn_softc *sc;
230 CSR_WRITE_2(sc, PCN_IO16_RAP, reg);
231 return(CSR_READ_2(sc, PCN_IO16_RDP));
235 pcn_csr_write(sc, reg, val)
236 struct pcn_softc *sc;
240 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
241 CSR_WRITE_4(sc, PCN_IO32_RDP, val);
246 pcn_bcr_read(sc, reg)
247 struct pcn_softc *sc;
250 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
251 return(CSR_READ_4(sc, PCN_IO32_BDP));
255 pcn_bcr_read16(sc, reg)
256 struct pcn_softc *sc;
259 CSR_WRITE_2(sc, PCN_IO16_RAP, reg);
260 return(CSR_READ_2(sc, PCN_IO16_BDP));
264 pcn_bcr_write(sc, reg, val)
265 struct pcn_softc *sc;
269 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
270 CSR_WRITE_4(sc, PCN_IO32_BDP, val);
275 pcn_miibus_readreg(dev, phy, reg)
279 struct pcn_softc *sc;
282 sc = device_get_softc(dev);
284 if (sc->pcn_phyaddr && phy > sc->pcn_phyaddr)
287 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5));
288 val = pcn_bcr_read(sc, PCN_BCR_MIIDATA) & 0xFFFF;
292 sc->pcn_phyaddr = phy;
298 pcn_miibus_writereg(dev, phy, reg, data)
302 struct pcn_softc *sc;
304 sc = device_get_softc(dev);
306 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5));
307 pcn_bcr_write(sc, PCN_BCR_MIIDATA, data);
313 pcn_miibus_statchg(dev)
316 struct pcn_softc *sc;
317 struct mii_data *mii;
319 sc = device_get_softc(dev);
320 mii = device_get_softc(sc->pcn_miibus);
322 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
323 PCN_BCR_SETBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN);
325 PCN_BCR_CLRBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN);
333 struct pcn_softc *sc;
336 struct ifmultiaddr *ifma;
338 u_int16_t hashes[4] = { 0, 0, 0, 0 };
342 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
344 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
345 for (i = 0; i < 4; i++)
346 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0xFFFF);
347 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
351 /* first, zot all the existing hash bits */
352 for (i = 0; i < 4; i++)
353 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0);
355 /* now program new ones */
357 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
358 if (ifma->ifma_addr->sa_family != AF_LINK)
360 h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
361 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
362 hashes[h >> 4] |= 1 << (h & 0xF);
366 for (i = 0; i < 4; i++)
367 pcn_csr_write(sc, PCN_CSR_MAR0 + i, hashes[i]);
369 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
376 struct pcn_softc *sc;
379 * Issue a reset by reading from the RESET register.
380 * Note that we don't know if the chip is operating in
381 * 16-bit or 32-bit mode at this point, so we attempt
382 * to reset the chip both ways. If one fails, the other
385 CSR_READ_2(sc, PCN_IO16_RESET);
386 CSR_READ_4(sc, PCN_IO32_RESET);
388 /* Wait a little while for the chip to get its brains in order. */
391 /* Select 32-bit (DWIO) mode */
392 CSR_WRITE_4(sc, PCN_IO32_RDP, 0);
394 /* Select software style 3. */
395 pcn_bcr_write(sc, PCN_BCR_SSTYLE, PCN_SWSTYLE_PCNETPCI_BURST);
401 pcn_chipid_name (u_int32_t id)
403 struct pcn_chipid *p = pcn_chipid;
414 pcn_chip_id (device_t dev)
416 struct pcn_softc *sc;
419 sc = device_get_softc(dev);
421 * Note: we can *NOT* put the chip into
422 * 32-bit mode yet. The lnc driver will only
423 * work in 16-bit mode, and once the chip
424 * goes into 32-bit mode, the only way to
425 * get it out again is with a hardware reset.
426 * So if pcn_probe() is called before the
427 * lnc driver's probe routine, the chip will
428 * be locked into 32-bit operation and the lnc
429 * driver will be unable to attach to it.
430 * Note II: if the chip happens to already
431 * be in 32-bit mode, we still need to check
432 * the chip ID, but first we have to detect
433 * 32-bit mode using only 16-bit operations.
434 * The safest way to do this is to read the
435 * PCI subsystem ID from BCR23/24 and compare
436 * that with the value read from PCI config
439 chip_id = pcn_bcr_read16(sc, PCN_BCR_PCISUBSYSID);
441 chip_id |= pcn_bcr_read16(sc, PCN_BCR_PCISUBVENID);
443 * Note III: the test for 0x10001000 is a hack to
444 * pacify VMware, who's pseudo-PCnet interface is
445 * broken. Reading the subsystem register from PCI
446 * config space yields 0x00000000 while reading the
447 * same value from I/O space yields 0x10001000. It's
448 * not supposed to be that way.
450 if (chip_id == pci_read_config(dev,
451 PCIR_SUBVEND_0, 4) || chip_id == 0x10001000) {
452 /* We're in 16-bit mode. */
453 chip_id = pcn_csr_read16(sc, PCN_CSR_CHIPID1);
455 chip_id |= pcn_csr_read16(sc, PCN_CSR_CHIPID0);
457 /* We're in 32-bit mode. */
458 chip_id = pcn_csr_read(sc, PCN_CSR_CHIPID1);
460 chip_id |= pcn_csr_read(sc, PCN_CSR_CHIPID0);
466 static struct pcn_type *
467 pcn_match (u_int16_t vid, u_int16_t did)
472 while(t->pcn_name != NULL) {
473 if ((vid == t->pcn_vid) && (did == t->pcn_did))
481 * Probe for an AMD chip. Check the PCI vendor and device
482 * IDs against our list and return a device name if we find a match.
489 struct pcn_softc *sc;
493 t = pcn_match(pci_get_vendor(dev), pci_get_device(dev));
496 sc = device_get_softc(dev);
499 * Temporarily map the I/O space so we can read the chip ID register.
502 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE);
503 if (sc->pcn_res == NULL) {
504 device_printf(dev, "couldn't map ports/memory\n");
507 sc->pcn_btag = rman_get_bustag(sc->pcn_res);
508 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res);
510 chip_id = pcn_chip_id(dev);
512 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res);
514 switch((chip_id >> 12) & PART_MASK) {
525 device_set_desc(dev, t->pcn_name);
526 return(BUS_PROBE_DEFAULT);
530 * Attach the interface. Allocate softc structures, do ifmedia
531 * setup and ethernet/BPF attach.
538 struct pcn_softc *sc;
540 int unit, error = 0, rid;
542 sc = device_get_softc(dev);
543 unit = device_get_unit(dev);
545 /* Initialize our mutex. */
546 mtx_init(&sc->pcn_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
549 * Map control/status registers.
551 pci_enable_busmaster(dev);
553 /* Retrieve the chip ID */
554 sc->pcn_type = (pcn_chip_id(dev) >> 12) & PART_MASK;
555 device_printf(dev, "Chip ID %04x (%s)\n",
556 sc->pcn_type, pcn_chipid_name(sc->pcn_type));
559 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE);
561 if (sc->pcn_res == NULL) {
562 printf("pcn%d: couldn't map ports/memory\n", unit);
567 sc->pcn_btag = rman_get_bustag(sc->pcn_res);
568 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res);
570 /* Allocate interrupt */
572 sc->pcn_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
573 RF_SHAREABLE | RF_ACTIVE);
575 if (sc->pcn_irq == NULL) {
576 printf("pcn%d: couldn't map interrupt\n", unit);
581 /* Reset the adapter. */
585 * Get station address from the EEPROM.
587 eaddr[0] = CSR_READ_4(sc, PCN_IO32_APROM00);
588 eaddr[1] = CSR_READ_4(sc, PCN_IO32_APROM01);
591 callout_init_mtx(&sc->pcn_stat_callout, &sc->pcn_mtx, 0);
593 sc->pcn_ldata = contigmalloc(sizeof(struct pcn_list_data), M_DEVBUF,
594 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
596 if (sc->pcn_ldata == NULL) {
597 printf("pcn%d: no memory for list buffers!\n", unit);
601 bzero(sc->pcn_ldata, sizeof(struct pcn_list_data));
603 ifp = sc->pcn_ifp = if_alloc(IFT_ETHER);
605 printf("pcn%d: can not if_alloc()\n", unit);
610 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
611 ifp->if_mtu = ETHERMTU;
612 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
613 ifp->if_ioctl = pcn_ioctl;
614 ifp->if_start = pcn_start;
615 ifp->if_watchdog = pcn_watchdog;
616 ifp->if_init = pcn_init;
617 ifp->if_baudrate = 10000000;
618 ifp->if_snd.ifq_maxlen = PCN_TX_LIST_CNT - 1;
623 if (mii_phy_probe(dev, &sc->pcn_miibus,
624 pcn_ifmedia_upd, pcn_ifmedia_sts)) {
625 printf("pcn%d: MII without any PHY!\n", sc->pcn_unit);
631 * Call MI attach routine.
633 ether_ifattach(ifp, (u_int8_t *) eaddr);
635 /* Hook interrupt last to avoid having to lock softc */
636 error = bus_setup_intr(dev, sc->pcn_irq, INTR_TYPE_NET | INTR_MPSAFE,
637 pcn_intr, sc, &sc->pcn_intrhand);
640 printf("pcn%d: couldn't set up irq\n", unit);
653 * Shutdown hardware and free up resources. This can be called any
654 * time after the mutex has been initialized. It is called in both
655 * the error case in attach and the normal detach case so it needs
656 * to be careful about only freeing resources that have actually been
663 struct pcn_softc *sc;
666 sc = device_get_softc(dev);
669 KASSERT(mtx_initialized(&sc->pcn_mtx), ("pcn mutex not initialized"));
671 /* These should only be active if attach succeeded */
672 if (device_is_attached(dev)) {
677 callout_drain(&sc->pcn_stat_callout);
681 device_delete_child(dev, sc->pcn_miibus);
682 bus_generic_detach(dev);
684 if (sc->pcn_intrhand)
685 bus_teardown_intr(dev, sc->pcn_irq, sc->pcn_intrhand);
687 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->pcn_irq);
689 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res);
695 contigfree(sc->pcn_ldata, sizeof(struct pcn_list_data),
699 mtx_destroy(&sc->pcn_mtx);
705 * Initialize the transmit descriptors.
709 struct pcn_softc *sc;
711 struct pcn_list_data *ld;
712 struct pcn_ring_data *cd;
718 for (i = 0; i < PCN_TX_LIST_CNT; i++) {
719 cd->pcn_tx_chain[i] = NULL;
720 ld->pcn_tx_list[i].pcn_tbaddr = 0;
721 ld->pcn_tx_list[i].pcn_txctl = 0;
722 ld->pcn_tx_list[i].pcn_txstat = 0;
725 cd->pcn_tx_prod = cd->pcn_tx_cons = cd->pcn_tx_cnt = 0;
732 * Initialize the RX descriptors and allocate mbufs for them.
736 struct pcn_softc *sc;
738 struct pcn_ring_data *cd;
743 for (i = 0; i < PCN_RX_LIST_CNT; i++) {
744 if (pcn_newbuf(sc, i, NULL) == ENOBUFS)
754 * Initialize an RX descriptor and attach an MBUF cluster.
757 pcn_newbuf(sc, idx, m)
758 struct pcn_softc *sc;
762 struct mbuf *m_new = NULL;
763 struct pcn_rx_desc *c;
765 c = &sc->pcn_ldata->pcn_rx_list[idx];
768 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
772 MCLGET(m_new, M_DONTWAIT);
773 if (!(m_new->m_flags & M_EXT)) {
777 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
780 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
781 m_new->m_data = m_new->m_ext.ext_buf;
784 m_adj(m_new, ETHER_ALIGN);
786 sc->pcn_cdata.pcn_rx_chain[idx] = m_new;
787 c->pcn_rbaddr = vtophys(mtod(m_new, caddr_t));
788 c->pcn_bufsz = (~(PCN_RXLEN) + 1) & PCN_RXLEN_BUFSZ;
789 c->pcn_bufsz |= PCN_RXLEN_MBO;
790 c->pcn_rxstat = PCN_RXSTAT_STP|PCN_RXSTAT_ENP|PCN_RXSTAT_OWN;
796 * A frame has been uploaded: pass the resulting mbuf chain up to
797 * the higher level protocols.
801 struct pcn_softc *sc;
805 struct pcn_rx_desc *cur_rx;
811 i = sc->pcn_cdata.pcn_rx_prod;
813 while(PCN_OWN_RXDESC(&sc->pcn_ldata->pcn_rx_list[i])) {
814 cur_rx = &sc->pcn_ldata->pcn_rx_list[i];
815 m = sc->pcn_cdata.pcn_rx_chain[i];
816 sc->pcn_cdata.pcn_rx_chain[i] = NULL;
819 * If an error occurs, update stats, clear the
820 * status word and leave the mbuf cluster in place:
821 * it should simply get re-used next time this descriptor
822 * comes up in the ring.
824 if (cur_rx->pcn_rxstat & PCN_RXSTAT_ERR) {
826 pcn_newbuf(sc, i, m);
827 PCN_INC(i, PCN_RX_LIST_CNT);
831 if (pcn_newbuf(sc, i, NULL)) {
832 /* Ran out of mbufs; recycle this one. */
833 pcn_newbuf(sc, i, m);
835 PCN_INC(i, PCN_RX_LIST_CNT);
839 PCN_INC(i, PCN_RX_LIST_CNT);
841 /* No errors; receive the packet. */
843 m->m_len = m->m_pkthdr.len =
844 cur_rx->pcn_rxlen - ETHER_CRC_LEN;
845 m->m_pkthdr.rcvif = ifp;
848 (*ifp->if_input)(ifp, m);
852 sc->pcn_cdata.pcn_rx_prod = i;
858 * A frame was downloaded to the chip. It's safe for us to clean up
864 struct pcn_softc *sc;
866 struct pcn_tx_desc *cur_tx = NULL;
873 * Go through our tx list and free mbufs for those
874 * frames that have been transmitted.
876 idx = sc->pcn_cdata.pcn_tx_cons;
877 while (idx != sc->pcn_cdata.pcn_tx_prod) {
878 cur_tx = &sc->pcn_ldata->pcn_tx_list[idx];
880 if (!PCN_OWN_TXDESC(cur_tx))
883 if (!(cur_tx->pcn_txctl & PCN_TXCTL_ENP)) {
884 sc->pcn_cdata.pcn_tx_cnt--;
885 PCN_INC(idx, PCN_TX_LIST_CNT);
889 if (cur_tx->pcn_txctl & PCN_TXCTL_ERR) {
891 if (cur_tx->pcn_txstat & PCN_TXSTAT_EXDEF)
892 ifp->if_collisions++;
893 if (cur_tx->pcn_txstat & PCN_TXSTAT_RTRY)
894 ifp->if_collisions++;
897 ifp->if_collisions +=
898 cur_tx->pcn_txstat & PCN_TXSTAT_TRC;
901 if (sc->pcn_cdata.pcn_tx_chain[idx] != NULL) {
902 m_freem(sc->pcn_cdata.pcn_tx_chain[idx]);
903 sc->pcn_cdata.pcn_tx_chain[idx] = NULL;
906 sc->pcn_cdata.pcn_tx_cnt--;
907 PCN_INC(idx, PCN_TX_LIST_CNT);
910 if (idx != sc->pcn_cdata.pcn_tx_cons) {
911 /* Some buffers have been freed. */
912 sc->pcn_cdata.pcn_tx_cons = idx;
913 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
915 ifp->if_timer = (sc->pcn_cdata.pcn_tx_cnt == 0) ? 0 : 5;
924 struct pcn_softc *sc;
925 struct mii_data *mii;
932 mii = device_get_softc(sc->pcn_miibus);
936 if (sc->pcn_link & !(mii->mii_media_status & IFM_ACTIVE))
939 /* link just came up, restart */
940 if (!sc->pcn_link && mii->mii_media_status & IFM_ACTIVE &&
941 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
943 if (ifp->if_snd.ifq_head != NULL)
944 pcn_start_locked(ifp);
947 callout_reset(&sc->pcn_stat_callout, hz, pcn_tick, sc);
956 struct pcn_softc *sc;
965 /* Suppress unwanted interrupts */
966 if (!(ifp->if_flags & IFF_UP)) {
972 CSR_WRITE_4(sc, PCN_IO32_RAP, PCN_CSR_CSR);
974 while ((status = CSR_READ_4(sc, PCN_IO32_RDP)) & PCN_CSR_INTR) {
975 CSR_WRITE_4(sc, PCN_IO32_RDP, status);
977 if (status & PCN_CSR_RINT)
980 if (status & PCN_CSR_TINT)
983 if (status & PCN_CSR_ERR) {
989 if (ifp->if_snd.ifq_head != NULL)
990 pcn_start_locked(ifp);
997 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
998 * pointers to the fragment pointers.
1001 pcn_encap(sc, m_head, txidx)
1002 struct pcn_softc *sc;
1003 struct mbuf *m_head;
1006 struct pcn_tx_desc *f = NULL;
1008 int frag, cur, cnt = 0;
1011 * Start packing the mbufs in this chain into
1012 * the fragment pointers. Stop when we run out
1013 * of fragments or hit the end of the mbuf chain.
1016 cur = frag = *txidx;
1018 for (m = m_head; m != NULL; m = m->m_next) {
1022 if ((PCN_TX_LIST_CNT - (sc->pcn_cdata.pcn_tx_cnt + cnt)) < 2)
1024 f = &sc->pcn_ldata->pcn_tx_list[frag];
1025 f->pcn_txctl = (~(m->m_len) + 1) & PCN_TXCTL_BUFSZ;
1026 f->pcn_txctl |= PCN_TXCTL_MBO;
1027 f->pcn_tbaddr = vtophys(mtod(m, vm_offset_t));
1029 f->pcn_txctl |= PCN_TXCTL_STP;
1031 f->pcn_txctl |= PCN_TXCTL_OWN;
1033 PCN_INC(frag, PCN_TX_LIST_CNT);
1040 sc->pcn_cdata.pcn_tx_chain[cur] = m_head;
1041 sc->pcn_ldata->pcn_tx_list[cur].pcn_txctl |=
1042 PCN_TXCTL_ENP|PCN_TXCTL_ADD_FCS|PCN_TXCTL_MORE_LTINT;
1043 sc->pcn_ldata->pcn_tx_list[*txidx].pcn_txctl |= PCN_TXCTL_OWN;
1044 sc->pcn_cdata.pcn_tx_cnt += cnt;
1051 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1052 * to the mbuf data regions directly in the transmit lists. We also save a
1053 * copy of the pointers since the transmit list fragment pointers are
1054 * physical addresses.
1060 struct pcn_softc *sc;
1064 pcn_start_locked(ifp);
1069 pcn_start_locked(ifp)
1072 struct pcn_softc *sc;
1073 struct mbuf *m_head = NULL;
1078 PCN_LOCK_ASSERT(sc);
1083 idx = sc->pcn_cdata.pcn_tx_prod;
1085 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
1088 while(sc->pcn_cdata.pcn_tx_chain[idx] == NULL) {
1089 IF_DEQUEUE(&ifp->if_snd, m_head);
1093 if (pcn_encap(sc, m_head, &idx)) {
1094 IF_PREPEND(&ifp->if_snd, m_head);
1095 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1100 * If there's a BPF listener, bounce a copy of this frame
1103 BPF_MTAP(ifp, m_head);
1108 sc->pcn_cdata.pcn_tx_prod = idx;
1109 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_TX|PCN_CSR_INTEN);
1112 * Set a timeout in case the chip goes out to lunch.
1123 struct pcn_softc *sc;
1127 /* If we want promiscuous mode, set the allframes bit. */
1128 if (ifp->if_flags & IFF_PROMISC) {
1129 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC);
1131 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC);
1134 /* Set the capture broadcast bit to capture broadcast frames. */
1135 if (ifp->if_flags & IFF_BROADCAST) {
1136 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD);
1138 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD);
1148 struct pcn_softc *sc = xsc;
1151 pcn_init_locked(sc);
1157 struct pcn_softc *sc;
1159 struct ifnet *ifp = sc->pcn_ifp;
1160 struct mii_data *mii = NULL;
1162 PCN_LOCK_ASSERT(sc);
1165 * Cancel pending I/O and free all RX/TX buffers.
1170 mii = device_get_softc(sc->pcn_miibus);
1172 /* Set MAC address */
1173 pcn_csr_write(sc, PCN_CSR_PAR0,
1174 ((u_int16_t *)IFP2ENADDR(sc->pcn_ifp))[0]);
1175 pcn_csr_write(sc, PCN_CSR_PAR1,
1176 ((u_int16_t *)IFP2ENADDR(sc->pcn_ifp))[1]);
1177 pcn_csr_write(sc, PCN_CSR_PAR2,
1178 ((u_int16_t *)IFP2ENADDR(sc->pcn_ifp))[2]);
1180 /* Init circular RX list. */
1181 if (pcn_list_rx_init(sc) == ENOBUFS) {
1182 printf("pcn%d: initialization failed: no "
1183 "memory for rx buffers\n", sc->pcn_unit);
1189 * Init tx descriptors.
1191 pcn_list_tx_init(sc);
1193 /* Set up the mode register. */
1194 pcn_csr_write(sc, PCN_CSR_MODE, PCN_PORT_MII);
1196 /* Set up RX filter. */
1200 * Load the multicast filter.
1205 * Load the addresses of the RX and TX lists.
1207 pcn_csr_write(sc, PCN_CSR_RXADDR0,
1208 vtophys(&sc->pcn_ldata->pcn_rx_list[0]) & 0xFFFF);
1209 pcn_csr_write(sc, PCN_CSR_RXADDR1,
1210 (vtophys(&sc->pcn_ldata->pcn_rx_list[0]) >> 16) & 0xFFFF);
1211 pcn_csr_write(sc, PCN_CSR_TXADDR0,
1212 vtophys(&sc->pcn_ldata->pcn_tx_list[0]) & 0xFFFF);
1213 pcn_csr_write(sc, PCN_CSR_TXADDR1,
1214 (vtophys(&sc->pcn_ldata->pcn_tx_list[0]) >> 16) & 0xFFFF);
1216 /* Set the RX and TX ring sizes. */
1217 pcn_csr_write(sc, PCN_CSR_RXRINGLEN, (~PCN_RX_LIST_CNT) + 1);
1218 pcn_csr_write(sc, PCN_CSR_TXRINGLEN, (~PCN_TX_LIST_CNT) + 1);
1220 /* We're not using the initialization block. */
1221 pcn_csr_write(sc, PCN_CSR_IAB1, 0);
1223 /* Enable fast suspend mode. */
1224 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL2, PCN_EXTCTL2_FASTSPNDE);
1227 * Enable burst read and write. Also set the no underflow
1228 * bit. This will avoid transmit underruns in certain
1229 * conditions while still providing decent performance.
1231 PCN_BCR_SETBIT(sc, PCN_BCR_BUSCTL, PCN_BUSCTL_NOUFLOW|
1232 PCN_BUSCTL_BREAD|PCN_BUSCTL_BWRITE);
1234 /* Enable graceful recovery from underflow. */
1235 PCN_CSR_SETBIT(sc, PCN_CSR_IMR, PCN_IMR_DXSUFLO);
1237 /* Enable auto-padding of short TX frames. */
1238 PCN_CSR_SETBIT(sc, PCN_CSR_TFEAT, PCN_TFEAT_PAD_TX);
1240 /* Disable MII autoneg (we handle this ourselves). */
1241 PCN_BCR_SETBIT(sc, PCN_BCR_MIICTL, PCN_MIICTL_DANAS);
1243 if (sc->pcn_type == Am79C978)
1244 pcn_bcr_write(sc, PCN_BCR_PHYSEL,
1245 PCN_PHYSEL_PCNET|PCN_PHY_HOMEPNA);
1247 /* Enable interrupts and start the controller running. */
1248 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_INTEN|PCN_CSR_START);
1252 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1253 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1255 callout_reset(&sc->pcn_stat_callout, hz, pcn_tick, sc);
1261 * Set media options.
1264 pcn_ifmedia_upd(ifp)
1267 struct pcn_softc *sc;
1268 struct mii_data *mii;
1271 mii = device_get_softc(sc->pcn_miibus);
1275 if (mii->mii_instance) {
1276 struct mii_softc *miisc;
1277 LIST_FOREACH(miisc, &mii->mii_phys, mii_list)
1278 mii_phy_reset(miisc);
1287 * Report current media status.
1290 pcn_ifmedia_sts(ifp, ifmr)
1292 struct ifmediareq *ifmr;
1294 struct pcn_softc *sc;
1295 struct mii_data *mii;
1299 mii = device_get_softc(sc->pcn_miibus);
1302 ifmr->ifm_active = mii->mii_media_active;
1303 ifmr->ifm_status = mii->mii_media_status;
1310 pcn_ioctl(ifp, command, data)
1315 struct pcn_softc *sc = ifp->if_softc;
1316 struct ifreq *ifr = (struct ifreq *) data;
1317 struct mii_data *mii = NULL;
1323 if (ifp->if_flags & IFF_UP) {
1324 if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
1325 ifp->if_flags & IFF_PROMISC &&
1326 !(sc->pcn_if_flags & IFF_PROMISC)) {
1327 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1,
1330 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1,
1332 pcn_csr_write(sc, PCN_CSR_CSR,
1333 PCN_CSR_INTEN|PCN_CSR_START);
1334 } else if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
1335 !(ifp->if_flags & IFF_PROMISC) &&
1336 sc->pcn_if_flags & IFF_PROMISC) {
1337 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1,
1340 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1,
1342 pcn_csr_write(sc, PCN_CSR_CSR,
1343 PCN_CSR_INTEN|PCN_CSR_START);
1344 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1345 pcn_init_locked(sc);
1347 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1350 sc->pcn_if_flags = ifp->if_flags;
1363 mii = device_get_softc(sc->pcn_miibus);
1364 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1367 error = ether_ioctl(ifp, command, data);
1378 struct pcn_softc *sc;
1385 printf("pcn%d: watchdog timeout\n", sc->pcn_unit);
1389 pcn_init_locked(sc);
1391 if (ifp->if_snd.ifq_head != NULL)
1400 * Stop the adapter and free any mbufs allocated to the
1405 struct pcn_softc *sc;
1410 PCN_LOCK_ASSERT(sc);
1414 callout_stop(&sc->pcn_stat_callout);
1416 /* Turn off interrupts */
1417 PCN_CSR_CLRBIT(sc, PCN_CSR_CSR, PCN_CSR_INTEN);
1419 PCN_CSR_SETBIT(sc, PCN_CSR_CSR, PCN_CSR_STOP);
1423 * Free data in the RX lists.
1425 for (i = 0; i < PCN_RX_LIST_CNT; i++) {
1426 if (sc->pcn_cdata.pcn_rx_chain[i] != NULL) {
1427 m_freem(sc->pcn_cdata.pcn_rx_chain[i]);
1428 sc->pcn_cdata.pcn_rx_chain[i] = NULL;
1431 bzero((char *)&sc->pcn_ldata->pcn_rx_list,
1432 sizeof(sc->pcn_ldata->pcn_rx_list));
1435 * Free the TX list buffers.
1437 for (i = 0; i < PCN_TX_LIST_CNT; i++) {
1438 if (sc->pcn_cdata.pcn_tx_chain[i] != NULL) {
1439 m_freem(sc->pcn_cdata.pcn_tx_chain[i]);
1440 sc->pcn_cdata.pcn_tx_chain[i] = NULL;
1444 bzero((char *)&sc->pcn_ldata->pcn_tx_list,
1445 sizeof(sc->pcn_ldata->pcn_tx_list));
1447 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1453 * Stop all chip I/O so that the kernel's probe routines don't
1454 * get confused by errant DMAs when rebooting.
1460 struct pcn_softc *sc;
1462 sc = device_get_softc(dev);