1 /**************************************************************************
4 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **-------------------------------------------------------------------------
8 ** Written for 386bsd and FreeBSD by
9 ** Wolfgang Stanglmeier <wolf@cologne.de>
10 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **-------------------------------------------------------------------------
15 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
17 ** Redistribution and use in source and binary forms, with or without
18 ** modification, are permitted provided that the following conditions
20 ** 1. Redistributions of source code must retain the above copyright
21 ** notice, this list of conditions and the following disclaimer.
22 ** 2. Redistributions in binary form must reproduce the above copyright
23 ** notice, this list of conditions and the following disclaimer in the
24 ** documentation and/or other materials provided with the distribution.
25 ** 3. The name of the author may not be used to endorse or promote products
26 ** derived from this software without specific prior written permission.
28 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
29 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
30 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
31 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
32 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
33 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
34 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
36 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
37 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 ***************************************************************************
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
46 #define NCR_DATE "pl30 98/1/1"
48 #define NCR_VERSION (2)
49 #define MAX_UNITS (16)
51 #define NCR_GETCC_WITHMSG
53 #if defined (__FreeBSD__) && defined(_KERNEL)
57 /*==========================================================
59 ** Configuration and Debugging
61 ** May be overwritten in <arch/conf/xxxx>
63 **==========================================================
67 ** SCSI address of this device.
68 ** The boot routines should have set it.
72 #ifndef SCSI_NCR_MYADDR
73 #define SCSI_NCR_MYADDR (7)
74 #endif /* SCSI_NCR_MYADDR */
77 ** The default synchronous period factor
79 ** If maximum synchronous frequency is defined, use it instead.
82 #ifndef SCSI_NCR_MAX_SYNC
84 #ifndef SCSI_NCR_DFLT_SYNC
85 #define SCSI_NCR_DFLT_SYNC (12)
86 #endif /* SCSI_NCR_DFLT_SYNC */
90 #if SCSI_NCR_MAX_SYNC == 0
91 #define SCSI_NCR_DFLT_SYNC 0
93 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
99 ** The minimal asynchronous pre-scaler period (ns)
103 #ifndef SCSI_NCR_MIN_ASYNC
104 #define SCSI_NCR_MIN_ASYNC (40)
105 #endif /* SCSI_NCR_MIN_ASYNC */
108 ** The maximal bus with (in log2 byte)
109 ** (0=8 bit, 1=16 bit)
112 #ifndef SCSI_NCR_MAX_WIDE
113 #define SCSI_NCR_MAX_WIDE (1)
114 #endif /* SCSI_NCR_MAX_WIDE */
116 /*==========================================================
118 ** Configuration and Debugging
120 **==========================================================
124 ** Number of targets supported by the driver.
125 ** n permits target numbers 0..n-1.
126 ** Default is 7, meaning targets #0..#6.
130 #define MAX_TARGET (16)
133 ** Number of logic units supported by the driver.
134 ** n enables logic unit numbers 0..n-1.
135 ** The common SCSI devices require only
136 ** one lun, so take 1 as the default.
144 ** The maximum number of jobs scheduled for starting.
145 ** There should be one slot per target, and one slot
146 ** for each tag of each target in use.
149 #define MAX_START (256)
152 ** The maximum number of segments a transfer is split into.
155 #define MAX_SCATTER (33)
158 ** The maximum transfer length (should be >= 64k).
159 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
162 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
168 #define NCR_SNOOP_TIMEOUT (1000000)
170 /*==========================================================
174 **==========================================================
177 #include <sys/param.h>
178 #include <sys/time.h>
181 #include <sys/systm.h>
182 #include <sys/malloc.h>
184 #include <sys/kernel.h>
185 #include <sys/module.h>
186 #include <sys/sysctl.h>
188 #include <machine/md_var.h>
189 #include <machine/bus.h>
190 #include <machine/resource.h>
191 #include <sys/rman.h>
194 #include <vm/vm_extern.h>
197 #include <dev/pci/pcivar.h>
198 #include <dev/pci/pcireg.h>
199 #include <pci/ncrreg.h>
202 #include <cam/cam_ccb.h>
203 #include <cam/cam_sim.h>
204 #include <cam/cam_xpt_sim.h>
205 #include <cam/cam_debug.h>
207 #include <cam/scsi/scsi_all.h>
208 #include <cam/scsi/scsi_message.h>
210 /*==========================================================
214 **==========================================================
217 #define DEBUG_ALLOC (0x0001)
218 #define DEBUG_PHASE (0x0002)
219 #define DEBUG_POLL (0x0004)
220 #define DEBUG_QUEUE (0x0008)
221 #define DEBUG_RESULT (0x0010)
222 #define DEBUG_SCATTER (0x0020)
223 #define DEBUG_SCRIPT (0x0040)
224 #define DEBUG_TINY (0x0080)
225 #define DEBUG_TIMING (0x0100)
226 #define DEBUG_NEGO (0x0200)
227 #define DEBUG_TAGS (0x0400)
228 #define DEBUG_FREEZE (0x0800)
229 #define DEBUG_RESTART (0x1000)
232 ** Enable/Disable debug messages.
233 ** Can be changed at runtime too.
235 #ifdef SCSI_NCR_DEBUG
236 #define DEBUG_FLAGS ncr_debug
237 #else /* SCSI_NCR_DEBUG */
238 #define SCSI_NCR_DEBUG 0
239 #define DEBUG_FLAGS 0
240 #endif /* SCSI_NCR_DEBUG */
244 /*==========================================================
248 **==========================================================
250 ** modified copy from 386bsd:/usr/include/sys/assert.h
252 **----------------------------------------------------------
256 #define assert(expression) { \
257 if (!(expression)) { \
258 (void)printf("assertion \"%s\" failed: " \
259 "file \"%s\", line %d\n", \
260 #expression, __FILE__, __LINE__); \
265 #define assert(expression) { \
266 if (!(expression)) { \
267 (void)printf("assertion \"%s\" failed: " \
268 "file \"%s\", line %d\n", \
269 #expression, __FILE__, __LINE__); \
274 /*==========================================================
276 ** Access to the controller chip.
278 **==========================================================
284 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
287 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
288 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
289 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
291 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
292 offsetof(struct ncr_reg, r), val)
293 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
294 offsetof(struct ncr_reg, r), val)
295 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
296 offsetof(struct ncr_reg, r), val)
297 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
299 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
300 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
301 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
303 #define READSCRIPT_OFF(base, off) \
304 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
305 bus_space_read_4(np->bst2, np->bsh2, off))
307 #define WRITESCRIPT_OFF(base, off, val) \
310 *((volatile u_int32_t *) \
311 ((volatile char *)base + (off))) = (val); \
313 bus_space_write_4(np->bst2, np->bsh2, off, val); \
316 #define READSCRIPT(r) \
317 READSCRIPT_OFF(np->script, offsetof(struct script, r))
319 #define WRITESCRIPT(r, val) \
320 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
323 ** Set bit field ON, OFF
326 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
327 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
328 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
329 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
330 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
331 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
333 /*==========================================================
335 ** Command control block states.
337 **==========================================================
342 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
343 #define HS_DISCONNECT (3) /* Disconnected by target */
345 #define HS_COMPLETE (4)
346 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
347 #define HS_RESET (6) /* SCSI reset */
348 #define HS_ABORTED (7) /* Transfer aborted */
349 #define HS_TIMEOUT (8) /* Software timeout */
350 #define HS_FAIL (9) /* SCSI or PCI bus errors */
351 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
352 #define HS_STALL (11) /* QUEUE FULL or BUSY */
354 #define HS_DONEMASK (0xfc)
356 /*==========================================================
358 ** Software Interrupt Codes
360 **==========================================================
363 #define SIR_SENSE_RESTART (1)
364 #define SIR_SENSE_FAILED (2)
365 #define SIR_STALL_RESTART (3)
366 #define SIR_STALL_QUEUE (4)
367 #define SIR_NEGO_SYNC (5)
368 #define SIR_NEGO_WIDE (6)
369 #define SIR_NEGO_FAILED (7)
370 #define SIR_NEGO_PROTO (8)
371 #define SIR_REJECT_RECEIVED (9)
372 #define SIR_REJECT_SENT (10)
373 #define SIR_IGN_RESIDUE (11)
374 #define SIR_MISSING_SAVE (12)
377 /*==========================================================
379 ** Extended error codes.
380 ** xerr_status field of struct nccb.
382 **==========================================================
386 #define XE_EXTRA_DATA (1) /* unexpected data phase */
387 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
389 /*==========================================================
391 ** Negotiation status.
392 ** nego_status field of struct nccb.
394 **==========================================================
400 /*==========================================================
402 ** XXX These are no longer used. Remove once the
403 ** script is updated.
404 ** "Special features" of targets.
405 ** quirks field of struct tcb.
406 ** actualquirks field of struct nccb.
408 **==========================================================
411 #define QUIRK_AUTOSAVE (0x01)
412 #define QUIRK_NOMSG (0x02)
413 #define QUIRK_NOSYNC (0x10)
414 #define QUIRK_NOWIDE16 (0x20)
415 #define QUIRK_NOTAGS (0x40)
416 #define QUIRK_UPDATE (0x80)
418 /*==========================================================
422 **==========================================================
425 #define CCB_MAGIC (0xf2691ad2)
426 #define MAX_TAGS (32) /* hard limit */
428 /*==========================================================
432 **==========================================================
435 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
437 /*==========================================================
439 ** Declaration of structs.
441 **==========================================================
450 typedef struct ncb * ncb_p;
451 typedef struct tcb * tcb_p;
452 typedef struct lcb * lcb_p;
453 typedef struct nccb * nccb_p;
467 #define UC_SETSYNC 10
468 #define UC_SETTAGS 11
469 #define UC_SETDEBUG 12
470 #define UC_SETORDER 13
471 #define UC_SETWIDE 14
472 #define UC_SETFLAG 15
474 #define UF_TRACE (0x01)
476 /*---------------------------------------
478 ** Timestamps for profiling
480 **---------------------------------------
483 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
497 ** profiling data (per device)
513 /*==========================================================
515 ** Declaration of structs: target control block
517 **==========================================================
520 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
521 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
522 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
523 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
525 struct ncr_transinfo {
531 struct ncr_target_tinfo {
532 /* Hardware version of our sync settings */
534 #define NCR_CUR_DISCENB 0x01
535 #define NCR_CUR_TAGENB 0x02
536 #define NCR_USR_DISCENB 0x04
537 #define NCR_USR_TAGENB 0x08
539 struct ncr_transinfo current;
540 struct ncr_transinfo goal;
541 struct ncr_transinfo user;
542 /* Hardware version of our wide settings */
548 ** during reselection the ncr jumps to this point
549 ** with SFBR set to the encoded target number
551 ** if it's not this target, jump to the next.
553 ** JUMP IF (SFBR != #target#)
557 struct link jump_tcb;
560 ** load the actual values for the sxfer and the scntl3
561 ** register (sync/wide mode).
564 ** @(sval field of this tcb)
567 ** @(wval field of this tcb)
568 ** @(scntl3 register)
574 ** if next message is "identify"
575 ** then load the message to SFBR,
576 ** else load 0 to SFBR.
582 struct link call_lun;
585 ** now look for the right lun.
588 ** @(first nccb of this lun)
591 struct link jump_lcb;
594 ** pointer to interrupted getcc nccb
600 ** pointer to nccb used for negotiating.
601 ** Avoid to start a nego for all queued commands
602 ** when tagged command queuing is enabled.
615 ** user settable limits for sync transfer
616 ** and tagged commands.
619 struct ncr_target_tinfo tinfo;
622 ** the lcb's of this tcb
628 /*==========================================================
630 ** Declaration of structs: lun control block
632 **==========================================================
637 ** during reselection the ncr jumps to this point
638 ** with SFBR set to the "Identify" message.
639 ** if it's not this lun, jump to the next.
641 ** JUMP IF (SFBR != #lun#)
642 ** @(next lcb of this target)
645 struct link jump_lcb;
648 ** if next message is "simple tag",
649 ** then load the tag to SFBR,
650 ** else load 0 to SFBR.
656 struct link call_tag;
659 ** now look for the right nccb.
662 ** @(first nccb of this lun)
665 struct link jump_nccb;
668 ** start of the nccb chain
674 ** Control of tagged queueing
684 /*==========================================================
686 ** Declaration of structs: COMMAND control block
688 **==========================================================
690 ** This substructure is copied from the nccb to a
691 ** global address after selection (or reselection)
692 ** and copied back before disconnect.
694 ** These fields are accessible to the script processor.
696 **----------------------------------------------------------
701 ** Execution of a nccb starts at this point.
702 ** It's a jump to the "SELECT" label
705 ** After successful selection the script
706 ** processor overwrites it with a jump to
707 ** the IDLE label of the script.
713 ** Saved data pointer.
714 ** Points to the position in the script
715 ** responsible for the actual transfer
717 ** It's written after reception of a
718 ** "SAVE_DATA_POINTER" message.
719 ** The goalpointer points after
720 ** the last transfer command.
728 ** The virtual address of the nccb
729 ** containing this header.
735 ** space for some timestamps to gather
736 ** profiling data about devices and this driver.
749 ** The status bytes are used by the host and the script processor.
751 ** The first four byte are copied to the scratchb register
752 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
753 ** and copied back just after disconnecting.
754 ** Inside the script the XX_REG are used.
756 ** The last four bytes are used inside the script by "COPY" commands.
757 ** Because source and destination must have the same alignment
758 ** in a longword, the fields HAVE to be at the choosen offsets.
759 ** xerr_st (4) 0 (0x34) scratcha
760 ** sync_st (5) 1 (0x05) sxfer
761 ** wide_st (7) 3 (0x03) scntl3
765 ** First four bytes (script)
769 #define HS_PRT nc_scr1
774 ** First four bytes (host)
776 #define actualquirks phys.header.status[0]
777 #define host_status phys.header.status[1]
778 #define s_status phys.header.status[2]
779 #define parity_status phys.header.status[3]
782 ** Last four bytes (script)
784 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
785 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
786 #define nego_st header.status[6]
787 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
790 ** Last four bytes (host)
792 #define xerr_status phys.xerr_st
793 #define sync_status phys.sync_st
794 #define nego_status phys.nego_st
795 #define wide_status phys.wide_st
797 /*==========================================================
799 ** Declaration of structs: Data structure block
801 **==========================================================
803 ** During execution of a nccb by the script processor,
804 ** the DSA (data structure address) register points
805 ** to this substructure of the nccb.
806 ** This substructure contains the header with
807 ** the script-processor-changable data and
808 ** data blocks for the indirect move commands.
810 **----------------------------------------------------------
817 ** Has to be the first entry,
818 ** because it's jumped to by the
825 ** Table data for Script
828 struct scr_tblsel select;
829 struct scr_tblmove smsg ;
830 struct scr_tblmove smsg2 ;
831 struct scr_tblmove cmd ;
832 struct scr_tblmove scmd ;
833 struct scr_tblmove sense ;
834 struct scr_tblmove data [MAX_SCATTER];
837 /*==========================================================
839 ** Declaration of structs: Command control block.
841 **==========================================================
843 ** During execution of a nccb by the script processor,
844 ** the DSA (data structure address) register points
845 ** to this substructure of the nccb.
846 ** This substructure contains the header with
847 ** the script-processor-changable data and then
848 ** data blocks for the indirect move commands.
850 **----------------------------------------------------------
856 ** This filler ensures that the global header is
857 ** cache line size aligned.
862 ** during reselection the ncr jumps to this point.
863 ** If a "SIMPLE_TAG" message was received,
864 ** then SFBR is set to the tag.
865 ** else SFBR is set to 0
866 ** If looking for another tag, jump to the next nccb.
868 ** JUMP IF (SFBR != #TAG#)
869 ** @(next nccb of this lun)
872 struct link jump_nccb;
875 ** After execution of this call, the return address
876 ** (in the TEMP register) points to the following
877 ** data structure block.
878 ** So copy it to the DSA register, and start
879 ** processing of this data structure.
885 struct link call_tmp;
888 ** This is the data structure which is
889 ** to be executed by the script processor.
895 ** If a data transfer phase is terminated too early
896 ** (after reception of a message (i.e. DISCONNECT)),
897 ** we have to prepare a mini script to transfer
898 ** the rest of the data.
904 ** The general SCSI driver provides a
905 ** pointer to a control block.
911 ** We prepare a message to be sent after selection,
912 ** and a second one to be sent after getcc selection.
913 ** Contents are IDENTIFY and SIMPLE_TAG.
914 ** While negotiating sync or wide transfer,
915 ** a SDTM or WDTM message is appended.
918 u_char scsi_smsg [8];
919 u_char scsi_smsg2[8];
923 ** Flag is used while looking for a free nccb.
929 ** Physical address of this instance of nccb
935 ** Completion time out for this job.
936 ** It's set to time of start + allowed number of seconds.
942 ** All nccbs of one hostadapter are chained.
948 ** All nccbs of one target/lun are chained.
960 ** Tag for this transfer.
961 ** It's patched into jump_nccb.
962 ** If it's not zero, a SIMPLE_TAG
963 ** message is included in smsg.
969 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
971 /*==========================================================
973 ** Declaration of structs: NCR device descriptor
975 **==========================================================
980 ** The global header.
981 ** Accessible to both the host and the
983 ** We assume it is cache line size aligned.
989 /*-----------------------------------------------
991 **-----------------------------------------------
993 ** During reselection the ncr jumps to this point.
994 ** The SFBR register is loaded with the encoded target id.
996 ** Jump to the first target.
1001 struct link jump_tcb;
1003 /*-----------------------------------------------
1005 **-----------------------------------------------
1007 ** virtual and physical addresses
1008 ** of the 53c810 chip.
1011 struct resource *reg_res;
1012 bus_space_tag_t bst;
1013 bus_space_handle_t bsh;
1016 struct resource *sram_res;
1017 bus_space_tag_t bst2;
1018 bus_space_handle_t bsh2;
1020 struct resource *irq_res;
1024 ** Scripts instance virtual address.
1026 struct script *script;
1027 struct scripth *scripth;
1030 ** Scripts instance physical address.
1036 ** The SCSI address of the host adapter.
1041 ** timing parameters
1043 u_char minsync; /* Minimum sync period factor */
1044 u_char maxsync; /* Maximum sync period factor */
1045 u_char maxoffs; /* Max scsi offset */
1046 u_char clock_divn; /* Number of clock divisors */
1047 u_long clock_khz; /* SCSI clock frequency in KHz */
1048 u_long features; /* Chip features map */
1049 u_char multiplier; /* Clock multiplier (1,2,4) */
1051 u_char maxburst; /* log base 2 of dwords burst */
1054 ** BIOS supplied PCI bus options
1065 /*-----------------------------------------------
1066 ** CAM SIM information for this instance
1067 **-----------------------------------------------
1070 struct cam_sim *sim;
1071 struct cam_path *path;
1073 /*-----------------------------------------------
1075 **-----------------------------------------------
1077 ** Commands from user
1084 struct tcb target[MAX_TARGET];
1089 u_int32_t squeue [MAX_START];
1099 struct callout_handle timeout_ch;
1101 /*-----------------------------------------------
1102 ** Debug and profiling
1103 **-----------------------------------------------
1107 struct ncr_reg regdump;
1113 struct profile profile;
1118 ** Head of list of all nccbs for this controller.
1124 ** Should be longword aligned,
1125 ** because they're written with a
1126 ** COPY script command.
1133 ** Buffer for STATUS_IN phase.
1138 ** controller chip dependent maximal transfer width.
1144 ** address of the ncr control registers in io space
1150 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1151 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1153 /*==========================================================
1156 ** Script for NCR-Processor.
1158 ** Use ncr_script_fill() to create the variable parts.
1159 ** Use ncr_script_copy_and_bind() to make a copy and
1160 ** bind to physical addresses.
1163 **==========================================================
1165 ** We have to know the offsets of all labels before
1166 ** we reach them (for forward jumps).
1167 ** Therefore we declare a struct here.
1168 ** If you make changes inside the script,
1169 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1171 **----------------------------------------------------------
1175 ** Script fragments which are loaded into the on-board RAM
1176 ** of 825A, 875 and 895 chips.
1182 ncrcmd startpos [ 1];
1187 ncrcmd select [ 18];
1188 ncrcmd prepare [ 4];
1189 ncrcmd loadpos [ 14];
1190 ncrcmd prepare2 [ 24];
1193 ncrcmd dispatch [ 33];
1194 ncrcmd no_data [ 17];
1195 ncrcmd checkatn [ 10];
1196 ncrcmd command [ 15];
1197 ncrcmd status [ 27];
1198 ncrcmd msg_in [ 26];
1199 ncrcmd msg_bad [ 6];
1200 ncrcmd complete [ 13];
1201 ncrcmd cleanup [ 12];
1202 ncrcmd cleanup0 [ 9];
1203 ncrcmd signal [ 12];
1204 ncrcmd save_dp [ 5];
1205 ncrcmd restore_dp [ 5];
1206 ncrcmd disconnect [ 12];
1207 ncrcmd disconnect0 [ 5];
1208 ncrcmd disconnect1 [ 23];
1209 ncrcmd msg_out [ 9];
1210 ncrcmd msg_out_done [ 7];
1211 ncrcmd badgetcc [ 6];
1212 ncrcmd reselect [ 8];
1213 ncrcmd reselect1 [ 8];
1214 ncrcmd reselect2 [ 8];
1215 ncrcmd resel_tmp [ 5];
1216 ncrcmd resel_lun [ 18];
1217 ncrcmd resel_tag [ 24];
1218 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1219 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1223 ** Script fragments which stay in main memory for all chips.
1226 ncrcmd tryloop [MAX_START*5+2];
1227 ncrcmd msg_parity [ 6];
1228 ncrcmd msg_reject [ 8];
1229 ncrcmd msg_ign_residue [ 32];
1230 ncrcmd msg_extended [ 18];
1231 ncrcmd msg_ext_2 [ 18];
1232 ncrcmd msg_wdtr [ 27];
1233 ncrcmd msg_ext_3 [ 18];
1234 ncrcmd msg_sdtr [ 27];
1235 ncrcmd msg_out_abort [ 10];
1238 #ifdef NCR_GETCC_WITHMSG
1239 ncrcmd getcc2 [ 29];
1241 ncrcmd getcc2 [ 14];
1244 ncrcmd aborttag [ 4];
1246 ncrcmd snooptest [ 9];
1247 ncrcmd snoopend [ 2];
1250 /*==========================================================
1253 ** Function headers.
1256 **==========================================================
1260 static nccb_p ncr_alloc_nccb(ncb_p np, u_long target, u_long lun);
1261 static void ncr_complete(ncb_p np, nccb_p cp);
1262 static int ncr_delta(int * from, int * to);
1263 static void ncr_exception(ncb_p np);
1264 static void ncr_free_nccb(ncb_p np, nccb_p cp);
1265 static void ncr_freeze_devq(ncb_p np, struct cam_path *path);
1266 static void ncr_selectclock(ncb_p np, u_char scntl3);
1267 static void ncr_getclock(ncb_p np, u_char multiplier);
1268 static nccb_p ncr_get_nccb(ncb_p np, u_long t,u_long l);
1270 static u_int32_t ncr_info(int unit);
1272 static void ncr_init(ncb_p np, char * msg, u_long code);
1273 static void ncr_intr(void *vnp);
1274 static void ncr_int_ma(ncb_p np, u_char dstat);
1275 static void ncr_int_sir(ncb_p np);
1276 static void ncr_int_sto(ncb_p np);
1278 static void ncr_min_phys(struct buf *bp);
1280 static void ncr_poll(struct cam_sim *sim);
1281 static void ncb_profile(ncb_p np, nccb_p cp);
1282 static void ncr_script_copy_and_bind(ncb_p np, ncrcmd *src, ncrcmd *dst,
1284 static void ncr_script_fill(struct script * scr, struct scripth *scrh);
1285 static int ncr_scatter(struct dsb* phys, vm_offset_t vaddr,
1287 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp,
1289 static void ncr_setsync(ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1291 static void ncr_setwide(ncb_p np, nccb_p cp, u_char wide, u_char ack);
1292 static int ncr_show_msg(u_char * msg);
1293 static int ncr_snooptest(ncb_p np);
1294 static void ncr_action(struct cam_sim *sim, union ccb *ccb);
1295 static void ncr_timeout(void *arg);
1296 static void ncr_wakeup(ncb_p np, u_long code);
1298 static int ncr_probe(device_t dev);
1299 static int ncr_attach(device_t dev);
1301 #endif /* _KERNEL */
1303 /*==========================================================
1306 ** Global static data.
1309 **==========================================================
1312 static const u_long ncr_version = NCR_VERSION * 11
1313 + (u_long) sizeof (struct ncb) * 7
1314 + (u_long) sizeof (struct nccb) * 5
1315 + (u_long) sizeof (struct lcb) * 3
1316 + (u_long) sizeof (struct tcb) * 2;
1320 static int ncr_debug = SCSI_NCR_DEBUG;
1321 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1323 static int ncr_cache; /* to be aligned _NOT_ static */
1325 /*==========================================================
1328 ** Global static data: auto configure
1331 **==========================================================
1334 #define NCR_810_ID (0x00011000ul)
1335 #define NCR_815_ID (0x00041000ul)
1336 #define NCR_820_ID (0x00021000ul)
1337 #define NCR_825_ID (0x00031000ul)
1338 #define NCR_860_ID (0x00061000ul)
1339 #define NCR_875_ID (0x000f1000ul)
1340 #define NCR_875_ID2 (0x008f1000ul)
1341 #define NCR_885_ID (0x000d1000ul)
1342 #define NCR_895_ID (0x000c1000ul)
1343 #define NCR_896_ID (0x000b1000ul)
1344 #define NCR_895A_ID (0x00121000ul)
1345 #define NCR_1510D_ID (0x000a1000ul)
1348 static char *ncr_name (ncb_p np)
1350 static char name[10];
1351 snprintf(name, sizeof(name), "ncr%d", np->unit);
1355 /*==========================================================
1358 ** Scripts for NCR-Processor.
1360 ** Use ncr_script_bind for binding to physical addresses.
1363 **==========================================================
1365 ** NADDR generates a reference to a field of the controller data.
1366 ** PADDR generates a reference to another part of the script.
1367 ** RADDR generates a reference to a script processor register.
1368 ** FADDR generates a reference to a script processor register
1371 **----------------------------------------------------------
1374 #define RELOC_SOFTC 0x40000000
1375 #define RELOC_LABEL 0x50000000
1376 #define RELOC_REGISTER 0x60000000
1377 #define RELOC_KVAR 0x70000000
1378 #define RELOC_LABELH 0x80000000
1379 #define RELOC_MASK 0xf0000000
1381 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1382 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1383 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1384 #define RADDR(label) (RELOC_REGISTER | REG(label))
1385 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1386 #define KVAR(which) (RELOC_KVAR | (which))
1388 #define KVAR_SECOND (0)
1389 #define KVAR_TICKS (1)
1390 #define KVAR_NCR_CACHE (2)
1392 #define SCRIPT_KVAR_FIRST (0)
1393 #define SCRIPT_KVAR_LAST (3)
1396 * Kernel variables referenced in the scripts.
1397 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1399 static void *script_kvars[] =
1400 { &time_second, &ticks, &ncr_cache };
1402 static struct script script0 = {
1403 /*--------------------------< START >-----------------------*/ {
1405 ** Claim to be still alive ...
1407 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1411 ** Make data structure address invalid.
1414 SCR_LOAD_REG (dsa, 0xff),
1416 SCR_FROM_REG (ctest2),
1418 }/*-------------------------< START0 >----------------------*/,{
1420 ** Hook for interrupted GetConditionCode.
1421 ** Will be patched to ... IFTRUE by
1422 ** the interrupt handler.
1424 SCR_INT ^ IFFALSE (0),
1427 }/*-------------------------< START1 >----------------------*/,{
1429 ** Hook for stalled start queue.
1430 ** Will be patched to IFTRUE by the interrupt handler.
1432 SCR_INT ^ IFFALSE (0),
1435 ** Then jump to a certain point in tryloop.
1436 ** Due to the lack of indirect addressing the code
1437 ** is self modifying here.
1440 }/*-------------------------< STARTPOS >--------------------*/,{
1443 }/*-------------------------< TRYSEL >----------------------*/,{
1446 ** DSA: Address of a Data Structure
1447 ** or Address of the IDLE-Label.
1449 ** TEMP: Address of a script, which tries to
1450 ** start the NEXT entry.
1452 ** Save the TEMP register into the SCRATCHA register.
1453 ** Then copy the DSA to TEMP and RETURN.
1454 ** This is kind of an indirect jump.
1455 ** (The script processor has NO stack, so the
1456 ** CALL is actually a jump and link, and the
1457 ** RETURN is an indirect jump.)
1459 ** If the slot was empty, DSA contains the address
1460 ** of the IDLE part of this script. The processor
1461 ** jumps to IDLE and waits for a reselect.
1462 ** It will wake up and try the same slot again
1463 ** after the SIGP bit becomes set by the host.
1465 ** If the slot was not empty, DSA contains
1466 ** the address of the phys-part of a nccb.
1467 ** The processor jumps to this address.
1468 ** phys starts with head,
1469 ** head starts with launch,
1470 ** so actually the processor jumps to
1472 ** If the entry is scheduled for execution,
1473 ** then launch contains a jump to SELECT.
1474 ** If it's not scheduled, it contains a jump to IDLE.
1485 }/*-------------------------< SKIP >------------------------*/,{
1487 ** This entry has been canceled.
1488 ** Next time use the next slot.
1494 ** patch the launch field.
1495 ** should look like an idle process.
1502 }/*-------------------------< SKIP2 >-----------------------*/,{
1506 }/*-------------------------< IDLE >------------------------*/,{
1509 ** Wait for reselect.
1514 }/*-------------------------< SELECT >----------------------*/,{
1516 ** DSA contains the address of a scheduled
1519 ** SCRATCHA contains the address of the script,
1520 ** which starts the next entry.
1522 ** Set Initiator mode.
1524 ** (Target mode is left as an exercise for the reader)
1529 SCR_LOAD_REG (HS_REG, 0xff),
1533 ** And try to select this target.
1535 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1539 ** Now there are 4 possibilities:
1541 ** (1) The ncr looses arbitration.
1542 ** This is ok, because it will try again,
1543 ** when the bus becomes idle.
1544 ** (But beware of the timeout function!)
1546 ** (2) The ncr is reselected.
1547 ** Then the script processor takes the jump
1548 ** to the RESELECT label.
1550 ** (3) The ncr completes the selection.
1551 ** Then it will execute the next statement.
1553 ** (4) There is a selection timeout.
1554 ** Then the ncr should interrupt the host and stop.
1555 ** Unfortunately, it seems to continue execution
1556 ** of the script. But it will fail with an
1557 ** IID-interrupt on the next WHEN.
1560 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1564 ** Send the IDENTIFY and SIMPLE_TAG messages
1565 ** (and the MSG_EXT_SDTR message)
1567 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1568 offsetof (struct dsb, smsg),
1569 #ifdef undef /* XXX better fail than try to deal with this ... */
1570 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1579 ** Selection complete.
1580 ** Next time use the next slot.
1585 }/*-------------------------< PREPARE >----------------------*/,{
1587 ** The ncr doesn't have an indirect load
1588 ** or store command. So we have to
1589 ** copy part of the control block to a
1590 ** fixed place, where we can access it.
1592 ** We patch the address part of a
1593 ** COPY command with the DSA-register.
1599 ** then we do the actual copy.
1601 SCR_COPY (sizeof (struct head)),
1603 ** continued after the next label ...
1606 }/*-------------------------< LOADPOS >---------------------*/,{
1610 ** Mark this nccb as not scheduled.
1614 NADDR (header.launch),
1616 ** Set a time stamp for this selection
1618 SCR_COPY (sizeof (ticks)),
1620 NADDR (header.stamp.select),
1622 ** load the savep (saved pointer) into
1623 ** the TEMP register (actual pointer)
1626 NADDR (header.savep),
1629 ** Initialize the status registers
1632 NADDR (header.status),
1635 }/*-------------------------< PREPARE2 >---------------------*/,{
1637 ** Load the synchronous mode register
1643 ** Load the wide mode and timing register
1649 ** Initialize the msgout buffer with a NOOP message.
1651 SCR_LOAD_REG (scratcha, MSG_NOOP),
1660 ** Message in phase ?
1662 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1665 ** Extended or reject message ?
1667 SCR_FROM_REG (sbdl),
1669 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1671 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1672 PADDRH (msg_reject),
1674 ** normal processing
1678 }/*-------------------------< SETMSG >----------------------*/,{
1684 }/*-------------------------< CLRACK >----------------------*/,{
1686 ** Terminate possible pending message phase.
1691 }/*-----------------------< DISPATCH >----------------------*/,{
1692 SCR_FROM_REG (HS_REG),
1694 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1697 ** remove bogus output signals
1699 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1701 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1703 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1705 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1707 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1709 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1711 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1714 ** Discard one illegal phase byte, if required.
1716 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1721 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1723 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1725 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1727 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1732 }/*-------------------------< NO_DATA >--------------------*/,{
1734 ** The target wants to tranfer too much data
1735 ** or in the wrong direction.
1736 ** Remember that in extended error.
1738 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1744 ** Discard one data byte, if required.
1746 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1748 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1750 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1752 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1755 ** .. and repeat as required.
1761 }/*-------------------------< CHECKATN >--------------------*/,{
1763 ** If AAP (bit 1 of scntl0 register) is set
1764 ** and a parity error is detected,
1765 ** the script processor asserts ATN.
1767 ** The target should switch to a MSG_OUT phase
1768 ** to get the message.
1770 SCR_FROM_REG (socl),
1772 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1777 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1780 ** Prepare a MSG_INITIATOR_DET_ERR message
1781 ** (initiator detected error).
1782 ** The target should retry the transfer.
1784 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1789 }/*-------------------------< COMMAND >--------------------*/,{
1791 ** If this is not a GETCC transfer ...
1793 SCR_FROM_REG (SS_REG),
1795 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1798 ** ... set a timestamp ...
1800 SCR_COPY (sizeof (ticks)),
1802 NADDR (header.stamp.command),
1804 ** ... and send the command
1806 SCR_MOVE_TBL ^ SCR_COMMAND,
1807 offsetof (struct dsb, cmd),
1811 ** Send the GETCC command
1813 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1814 offsetof (struct dsb, scmd),
1818 }/*-------------------------< STATUS >--------------------*/,{
1820 ** set the timestamp.
1822 SCR_COPY (sizeof (ticks)),
1824 NADDR (header.stamp.status),
1826 ** If this is a GETCC transfer,
1828 SCR_FROM_REG (SS_REG),
1830 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1835 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1838 ** Save status to scsi_status.
1839 ** Mark as complete.
1840 ** And wait for disconnect.
1842 SCR_TO_REG (SS_REG),
1844 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1846 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1851 ** If it was no GETCC transfer,
1852 ** save the status to scsi_status.
1854 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1856 SCR_TO_REG (SS_REG),
1859 ** if it was no check condition ...
1861 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1864 ** ... mark as complete.
1866 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1871 }/*-------------------------< MSG_IN >--------------------*/,{
1873 ** Get the first byte of the message
1874 ** and save it to SCRATCHA.
1876 ** The script processor doesn't negate the
1877 ** ACK signal after this transfer.
1879 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1882 ** Check for message parity error.
1884 SCR_TO_REG (scratcha),
1886 SCR_FROM_REG (socl),
1888 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1889 PADDRH (msg_parity),
1890 SCR_FROM_REG (scratcha),
1893 ** Parity was ok, handle this message.
1895 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1897 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1899 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1901 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1903 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1904 PADDRH (msg_extended),
1905 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1907 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1908 PADDRH (msg_reject),
1909 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1910 PADDRH (msg_ign_residue),
1912 ** Rest of the messages left as
1915 ** Unimplemented messages:
1916 ** fall through to MSG_BAD.
1918 }/*-------------------------< MSG_BAD >------------------*/,{
1920 ** unimplemented message - reject it.
1924 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1929 }/*-------------------------< COMPLETE >-----------------*/,{
1931 ** Complete message.
1933 ** If it's not the get condition code,
1934 ** copy TEMP register to LASTP in header.
1936 SCR_FROM_REG (SS_REG),
1938 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1942 NADDR (header.lastp),
1944 ** When we terminate the cycle by clearing ACK,
1945 ** the target may disconnect immediately.
1947 ** We don't want to be told of an
1948 ** "unexpected disconnect",
1949 ** so we disable this feature.
1951 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1954 ** Terminate cycle ...
1956 SCR_CLR (SCR_ACK|SCR_ATN),
1959 ** ... and wait for the disconnect.
1963 }/*-------------------------< CLEANUP >-------------------*/,{
1965 ** dsa: Pointer to nccb
1966 ** or xxxxxxFF (no nccb)
1968 ** HS_REG: Host-Status (<>0!)
1972 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1976 ** save the status registers
1980 NADDR (header.status),
1982 ** and copy back the header to the nccb.
1987 SCR_COPY (sizeof (struct head)),
1989 }/*-------------------------< CLEANUP0 >--------------------*/,{
1993 ** If command resulted in "check condition"
1994 ** status and is not yet completed,
1995 ** try to get the condition code.
1997 SCR_FROM_REG (HS_REG),
1999 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2001 SCR_FROM_REG (SS_REG),
2003 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
2005 }/*-------------------------< SIGNAL >----------------------*/,{
2007 ** if status = queue full,
2008 ** reinsert in startqueue and stall queue.
2010 /*>>>*/ SCR_FROM_REG (SS_REG),
2012 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2015 ** And make the DSA register invalid.
2017 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2020 ** if job completed ...
2022 SCR_FROM_REG (HS_REG),
2025 ** ... signal completion to the host
2027 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2030 ** Auf zu neuen Schandtaten!
2035 }/*-------------------------< SAVE_DP >------------------*/,{
2038 ** Copy TEMP register to SAVEP in header.
2042 NADDR (header.savep),
2045 }/*-------------------------< RESTORE_DP >---------------*/,{
2047 ** RESTORE_DP message:
2048 ** Copy SAVEP in header to TEMP register.
2051 NADDR (header.savep),
2056 }/*-------------------------< DISCONNECT >---------------*/,{
2058 ** If QUIRK_AUTOSAVE is set,
2059 ** do a "save pointer" operation.
2061 SCR_FROM_REG (QU_REG),
2063 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2066 ** like SAVE_DP message:
2067 ** Copy TEMP register to SAVEP in header.
2071 NADDR (header.savep),
2073 ** Check if temp==savep or temp==goalp:
2074 ** if not, log a missing save pointer message.
2075 ** In fact, it's a comparison mod 256.
2077 ** Hmmm, I hadn't thought that I would be urged to
2078 ** write this kind of ugly self modifying code.
2080 ** It's unbelievable, but the ncr53c8xx isn't able
2081 ** to subtract one register from another.
2083 SCR_FROM_REG (temp),
2086 ** You are not expected to understand this ..
2088 ** CAUTION: only little endian architectures supported! XXX
2091 NADDR (header.savep),
2092 PADDR (disconnect0),
2093 }/*-------------------------< DISCONNECT0 >--------------*/,{
2094 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2100 NADDR (header.goalp),
2101 PADDR (disconnect1),
2102 }/*-------------------------< DISCONNECT1 >--------------*/,{
2103 SCR_INT ^ IFFALSE (DATA (1)),
2108 ** DISCONNECTing ...
2110 ** disable the "unexpected disconnect" feature,
2111 ** and remove the ACK signal.
2113 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2115 SCR_CLR (SCR_ACK|SCR_ATN),
2118 ** Wait for the disconnect.
2124 ** Set a time stamp,
2125 ** and count the disconnects.
2127 SCR_COPY (sizeof (ticks)),
2129 NADDR (header.stamp.disconnect),
2133 SCR_REG_REG (temp, SCR_ADD, 0x01),
2139 ** Status is: DISCONNECTED.
2141 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2146 }/*-------------------------< MSG_OUT >-------------------*/,{
2148 ** The target requests a message.
2150 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2156 ** If it was no ABORT message ...
2158 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2159 PADDRH (msg_out_abort),
2161 ** ... wait for the next phase
2162 ** if it's a message out, send it again, ...
2164 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2166 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2168 ** ... else clear the message ...
2170 SCR_LOAD_REG (scratcha, MSG_NOOP),
2176 ** ... and process the next phase
2181 }/*------------------------< BADGETCC >---------------------*/,{
2183 ** If SIGP was set, clear it and try again.
2185 SCR_FROM_REG (ctest2),
2187 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2191 }/*-------------------------< RESELECT >--------------------*/,{
2193 ** This NOP will be patched with LED OFF
2194 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2200 ** make the DSA invalid.
2202 SCR_LOAD_REG (dsa, 0xff),
2207 ** Sleep waiting for a reselection.
2208 ** If SIGP is set, special treatment.
2210 ** Zu allem bereit ..
2214 }/*-------------------------< RESELECT1 >--------------------*/,{
2216 ** This NOP will be patched with LED ON
2217 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2222 ** ... zu nichts zu gebrauchen ?
2224 ** load the target id into the SFBR
2225 ** and jump to the control block.
2227 ** Look at the declarations of
2232 ** to understand what's going on.
2234 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2240 }/*-------------------------< RESELECT2 >-------------------*/,{
2242 ** This NOP will be patched with LED ON
2243 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2248 ** If it's not connected :(
2249 ** -> interrupted by SIGP bit.
2252 SCR_FROM_REG (ctest2),
2254 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2259 }/*-------------------------< RESEL_TMP >-------------------*/,{
2261 ** The return address in TEMP
2262 ** is in fact the data structure address,
2263 ** so copy it to the DSA register.
2271 }/*-------------------------< RESEL_LUN >-------------------*/,{
2273 ** come back to this point
2274 ** to get an IDENTIFY message
2275 ** Wait for a msg_in phase.
2277 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2281 ** It's not a sony, it's a trick:
2282 ** read the data without acknowledging it.
2284 SCR_FROM_REG (sbdl),
2286 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2289 ** It WAS an Identify message.
2290 ** get it and ack it!
2292 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2297 ** Mask out the lun.
2299 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2304 ** No message phase or no IDENTIFY message:
2307 /*>>>*/ SCR_LOAD_SFBR (0),
2312 }/*-------------------------< RESEL_TAG >-------------------*/,{
2314 ** come back to this point
2315 ** to get a SIMPLE_TAG message
2316 ** Wait for a MSG_IN phase.
2318 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2322 ** It's a trick - read the data
2323 ** without acknowledging it.
2325 SCR_FROM_REG (sbdl),
2327 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2330 ** It WAS a SIMPLE_TAG message.
2331 ** get it and ack it!
2333 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2338 ** Wait for the second byte (the tag)
2340 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2343 ** Get it and ack it!
2345 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2347 SCR_CLR (SCR_ACK|SCR_CARRY),
2352 ** No message phase or no SIMPLE_TAG message
2353 ** or no second byte: return 0.
2355 /*>>>*/ SCR_LOAD_SFBR (0),
2357 SCR_SET (SCR_CARRY),
2362 }/*-------------------------< DATA_IN >--------------------*/,{
2364 ** Because the size depends on the
2365 ** #define MAX_SCATTER parameter,
2366 ** it is filled in at runtime.
2368 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2370 ** SCR_COPY (sizeof (ticks)),
2371 ** KVAR (KVAR_TICKS),
2372 ** NADDR (header.stamp.data),
2373 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2374 ** offsetof (struct dsb, data[ 0]),
2376 ** ##===========< i=1; i<MAX_SCATTER >=========
2377 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2378 ** || PADDR (checkatn),
2379 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2380 ** || offsetof (struct dsb, data[ i]),
2381 ** ##==========================================
2384 ** PADDR (checkatn),
2389 }/*-------------------------< DATA_OUT >-------------------*/,{
2391 ** Because the size depends on the
2392 ** #define MAX_SCATTER parameter,
2393 ** it is filled in at runtime.
2395 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2397 ** SCR_COPY (sizeof (ticks)),
2398 ** KVAR (KVAR_TICKS),
2399 ** NADDR (header.stamp.data),
2400 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2401 ** offsetof (struct dsb, data[ 0]),
2403 ** ##===========< i=1; i<MAX_SCATTER >=========
2404 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2405 ** || PADDR (dispatch),
2406 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2407 ** || offsetof (struct dsb, data[ i]),
2408 ** ##==========================================
2411 ** PADDR (dispatch),
2415 **---------------------------------------------------------
2419 }/*--------------------------------------------------------*/
2423 static struct scripth scripth0 = {
2424 /*-------------------------< TRYLOOP >---------------------*/{
2426 ** Load an entry of the start queue into dsa
2427 ** and try to start it by jumping to TRYSEL.
2429 ** Because the size depends on the
2430 ** #define MAX_START parameter, it is filled
2433 **-----------------------------------------------------------
2435 ** ##===========< I=0; i<MAX_START >===========
2437 ** || NADDR (squeue[i]),
2440 ** || PADDR (trysel),
2441 ** ##==========================================
2446 **-----------------------------------------------------------
2449 }/*-------------------------< MSG_PARITY >---------------*/,{
2453 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2456 ** send a "message parity error" message.
2458 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2462 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2464 ** If a negotiation was in progress,
2465 ** negotiation failed.
2467 SCR_FROM_REG (HS_REG),
2469 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2472 ** else make host log this message
2474 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2475 SIR_REJECT_RECEIVED,
2479 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2485 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2488 ** get residue size.
2490 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2493 ** Check for message parity error.
2495 SCR_TO_REG (scratcha),
2497 SCR_FROM_REG (socl),
2499 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2500 PADDRH (msg_parity),
2501 SCR_FROM_REG (scratcha),
2504 ** Size is 0 .. ignore message.
2506 SCR_JUMP ^ IFTRUE (DATA (0)),
2509 ** Size is not 1 .. have to interrupt.
2511 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2514 ** Check for residue byte in swide register
2516 SCR_FROM_REG (scntl2),
2518 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2521 ** There IS data in the swide register.
2524 SCR_REG_REG (scntl2, SCR_OR, WSR),
2529 ** Load again the size to the sfbr register.
2531 /*>>>*/ SCR_FROM_REG (scratcha),
2538 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2544 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2549 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2552 ** Check for message parity error.
2554 SCR_TO_REG (scratcha),
2556 SCR_FROM_REG (socl),
2558 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2559 PADDRH (msg_parity),
2560 SCR_FROM_REG (scratcha),
2564 SCR_JUMP ^ IFTRUE (DATA (3)),
2566 SCR_JUMP ^ IFFALSE (DATA (2)),
2568 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2571 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2574 ** get extended message code.
2576 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2579 ** Check for message parity error.
2581 SCR_TO_REG (scratcha),
2583 SCR_FROM_REG (socl),
2585 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2586 PADDRH (msg_parity),
2587 SCR_FROM_REG (scratcha),
2589 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2592 ** unknown extended message
2596 }/*-------------------------< MSG_WDTR >-----------------*/,{
2599 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2602 ** get data bus width
2604 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2606 SCR_FROM_REG (socl),
2608 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2609 PADDRH (msg_parity),
2611 ** let the host do the real work.
2616 ** let the target fetch our answer.
2623 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2626 ** Send the MSG_EXT_WDTR
2628 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2636 PADDR (msg_out_done),
2638 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2641 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2644 ** get extended message code.
2646 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2649 ** Check for message parity error.
2651 SCR_TO_REG (scratcha),
2653 SCR_FROM_REG (socl),
2655 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2656 PADDRH (msg_parity),
2657 SCR_FROM_REG (scratcha),
2659 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2662 ** unknown extended message
2667 }/*-------------------------< MSG_SDTR >-----------------*/,{
2670 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2673 ** get period and offset
2675 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2677 SCR_FROM_REG (socl),
2679 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2680 PADDRH (msg_parity),
2682 ** let the host do the real work.
2687 ** let the target fetch our answer.
2694 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2697 ** Send the MSG_EXT_SDTR
2699 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2707 PADDR (msg_out_done),
2709 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2711 ** After ABORT message,
2713 ** expect an immediate disconnect, ...
2715 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2717 SCR_CLR (SCR_ACK|SCR_ATN),
2722 ** ... and set the status to "ABORTED"
2724 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2729 }/*-------------------------< GETCC >-----------------------*/,{
2731 ** The ncr doesn't have an indirect load
2732 ** or store command. So we have to
2733 ** copy part of the control block to a
2734 ** fixed place, where we can modify it.
2736 ** We patch the address part of a COPY command
2737 ** with the address of the dsa register ...
2743 ** ... then we do the actual copy.
2745 SCR_COPY (sizeof (struct head)),
2746 }/*-------------------------< GETCC1 >----------------------*/,{
2750 ** Initialize the status registers
2753 NADDR (header.status),
2755 }/*-------------------------< GETCC2 >----------------------*/,{
2757 ** Get the condition code from a target.
2759 ** DSA points to a data structure.
2760 ** Set TEMP to the script location
2761 ** that receives the condition code.
2763 ** Because there is no script command
2764 ** to load a longword into a register,
2765 ** we use a CALL command.
2770 ** Get the condition code.
2772 SCR_MOVE_TBL ^ SCR_DATA_IN,
2773 offsetof (struct dsb, sense),
2775 ** No data phase may follow!
2784 ** The CALL jumps to this point.
2785 ** Prepare for a RESTORE_POINTER message.
2786 ** Save the TEMP register into the saved pointer.
2790 NADDR (header.savep),
2792 ** Load scratcha, because in case of a selection timeout,
2793 ** the host will expect a new value for startpos in
2794 ** the scratcha register.
2799 #ifdef NCR_GETCC_WITHMSG
2801 ** If QUIRK_NOMSG is set, select without ATN.
2802 ** and don't send a message.
2804 SCR_FROM_REG (QU_REG),
2806 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2809 ** Then try to connect to the target.
2810 ** If we are reselected, special treatment
2811 ** of the current job is required before
2812 ** accepting the reselection.
2814 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2817 ** Send the IDENTIFY message.
2818 ** In case of short transfer, remove ATN.
2820 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2821 offsetof (struct dsb, smsg2),
2825 ** save the first byte of the message.
2834 }/*-------------------------< GETCC3 >----------------------*/,{
2836 ** Try to connect to the target.
2837 ** If we are reselected, special treatment
2838 ** of the current job is required before
2839 ** accepting the reselection.
2841 ** Silly target won't accept a message.
2842 ** Select without ATN.
2844 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2847 ** Force error if selection timeout
2849 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2856 }/*-------------------------< ABORTTAG >-------------------*/,{
2858 ** Abort a bad reselection.
2859 ** Set the message to ABORT vs. ABORT_TAG
2861 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2863 SCR_JUMPR ^ IFFALSE (CARRYSET),
2865 }/*-------------------------< ABORT >----------------------*/,{
2866 SCR_LOAD_REG (scratcha, MSG_ABORT),
2877 ** we expect an immediate disconnect
2879 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2881 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2886 SCR_CLR (SCR_ACK|SCR_ATN),
2892 }/*-------------------------< SNOOPTEST >-------------------*/,{
2894 ** Read the variable.
2897 KVAR (KVAR_NCR_CACHE),
2900 ** Write the variable.
2904 KVAR (KVAR_NCR_CACHE),
2906 ** Read back the variable.
2909 KVAR (KVAR_NCR_CACHE),
2911 }/*-------------------------< SNOOPEND >-------------------*/,{
2917 }/*--------------------------------------------------------*/
2921 /*==========================================================
2924 ** Fill in #define dependent parts of the script
2927 **==========================================================
2930 static void ncr_script_fill (struct script * scr, struct scripth * scrh)
2936 for (i=0; i<MAX_START; i++) {
2938 *p++ =NADDR (squeue[i]);
2941 *p++ =PADDR (trysel);
2944 *p++ =PADDRH(tryloop);
2946 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2950 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2951 *p++ =PADDR (no_data);
2952 *p++ =SCR_COPY (sizeof (ticks));
2953 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2954 *p++ =NADDR (header.stamp.data);
2955 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2956 *p++ =offsetof (struct dsb, data[ 0]);
2958 for (i=1; i<MAX_SCATTER; i++) {
2959 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2960 *p++ =PADDR (checkatn);
2961 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2962 *p++ =offsetof (struct dsb, data[i]);
2966 *p++ =PADDR (checkatn);
2968 *p++ =PADDR (no_data);
2970 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2974 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2975 *p++ =PADDR (no_data);
2976 *p++ =SCR_COPY (sizeof (ticks));
2977 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2978 *p++ =NADDR (header.stamp.data);
2979 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2980 *p++ =offsetof (struct dsb, data[ 0]);
2982 for (i=1; i<MAX_SCATTER; i++) {
2983 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2984 *p++ =PADDR (dispatch);
2985 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2986 *p++ =offsetof (struct dsb, data[i]);
2990 *p++ =PADDR (dispatch);
2992 *p++ =PADDR (no_data);
2994 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2997 /*==========================================================
3000 ** Copy and rebind a script.
3003 **==========================================================
3006 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3008 ncrcmd opcode, new, old, tmp1, tmp2;
3009 ncrcmd *start, *end;
3019 WRITESCRIPT_OFF(dst, offset, opcode);
3023 ** If we forget to change the length
3024 ** in struct script, a field will be
3025 ** padded with 0. This is an illegal
3030 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3031 ncr_name(np), (int) (src-start-1));
3035 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3036 printf ("%p: <%x>\n",
3037 (src-1), (unsigned)opcode);
3040 ** We don't have to decode ALL commands
3042 switch (opcode >> 28) {
3046 ** COPY has TWO arguments.
3050 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3053 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3055 if ((tmp1 ^ tmp2) & 3) {
3056 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3057 ncr_name(np), (int) (src-start-1));
3061 ** If PREFETCH feature not enabled, remove
3062 ** the NO FLUSH bit if present.
3064 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3065 WRITESCRIPT_OFF(dst, offset - 4,
3066 (opcode & ~SCR_NO_FLUSH));
3071 ** MOVE (absolute address)
3079 ** dont't relocate if relative :-)
3081 if (opcode & 0x00800000)
3103 switch (old & RELOC_MASK) {
3104 case RELOC_REGISTER:
3105 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3108 new = (old & ~RELOC_MASK) + np->p_script;
3111 new = (old & ~RELOC_MASK) + np->p_scripth;
3114 new = (old & ~RELOC_MASK) + vtophys(np);
3117 if (((old & ~RELOC_MASK) <
3118 SCRIPT_KVAR_FIRST) ||
3119 ((old & ~RELOC_MASK) >
3121 panic("ncr KVAR out of range");
3122 new = vtophys(script_kvars[old &
3126 /* Don't relocate a 0 address. */
3133 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3137 WRITESCRIPT_OFF(dst, offset, new);
3141 WRITESCRIPT_OFF(dst, offset, *src++);
3148 /*==========================================================
3151 ** Auto configuration.
3154 **==========================================================
3158 /*----------------------------------------------------------
3160 ** Reduce the transfer length to the max value
3161 ** we can transfer safely.
3163 ** Reading a block greater then MAX_SIZE from the
3164 ** raw (character) device exercises a memory leak
3165 ** in the vm subsystem. This is common to ALL devices.
3166 ** We have submitted a description of this bug to
3167 ** <FreeBSD-bugs@freefall.cdrom.com>.
3168 ** It should be fixed in the current release.
3170 **----------------------------------------------------------
3173 void ncr_min_phys (struct buf *bp)
3175 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3181 /*----------------------------------------------------------
3183 ** Maximal number of outstanding requests per target.
3185 **----------------------------------------------------------
3188 u_int32_t ncr_info (int unit)
3190 return (1); /* may be changed later */
3195 /*----------------------------------------------------------
3197 ** NCR chip devices table and chip look up function.
3198 ** Features bit are defined in ncrreg.h. Is it the
3201 **----------------------------------------------------------
3204 unsigned long device_id;
3205 unsigned short minrevid;
3207 unsigned char maxburst;
3208 unsigned char maxoffs;
3209 unsigned char clock_divn;
3210 unsigned int features;
3213 static ncr_chip ncr_chip_table[] = {
3214 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3217 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3218 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3220 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3223 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3226 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3227 FE_WIDE|FE_ERL|FE_BOF}
3229 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3230 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3232 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3233 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3235 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3236 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3238 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3239 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3241 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3242 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3244 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3245 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3247 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3248 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3250 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3251 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3253 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3254 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3256 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3257 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3260 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3265 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3266 if (device_id == ncr_chip_table[i].device_id &&
3267 ncr_chip_table[i].minrevid <= revision_id) {
3269 ncr_chip_table[found].minrevid
3270 < ncr_chip_table[i].minrevid) {
3278 /*----------------------------------------------------------
3280 ** Probe the hostadapter.
3282 **----------------------------------------------------------
3287 static int ncr_probe (device_t dev)
3291 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3293 device_set_desc(dev, ncr_chip_table[i].name);
3294 return (BUS_PROBE_DEFAULT);
3302 /*==========================================================
3304 ** NCR chip clock divisor table.
3305 ** Divisors are multiplied by 10,000,000 in order to make
3306 ** calculations more simple.
3308 **==========================================================
3312 static u_long div_10M[] =
3313 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3315 /*===============================================================
3317 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3318 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3319 ** We use log base 2 (burst length) as internal code, with
3320 ** value 0 meaning "burst disabled".
3322 **===============================================================
3326 * Burst length from burst code.
3328 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3331 * Burst code from io register bits.
3333 #define burst_code(dmode, ctest4, ctest5) \
3334 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3337 * Set initial io register bits from burst code.
3340 ncr_init_burst(ncb_p np, u_char bc)
3342 np->rv_ctest4 &= ~0x80;
3343 np->rv_dmode &= ~(0x3 << 6);
3344 np->rv_ctest5 &= ~0x4;
3347 np->rv_ctest4 |= 0x80;
3351 np->rv_dmode |= ((bc & 0x3) << 6);
3352 np->rv_ctest5 |= (bc & 0x4);
3356 /*==========================================================
3359 ** Auto configuration: attach and init a host adapter.
3362 **==========================================================
3367 ncr_attach (device_t dev)
3369 ncb_p np = (struct ncb*) device_get_softc(dev);
3375 struct cam_devq *devq;
3378 ** allocate and initialize structures.
3381 np->unit = device_get_unit(dev);
3384 ** Try to map the controller chip to
3385 ** virtual and physical memory.
3389 np->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3390 &np->reg_rid, RF_ACTIVE);
3392 device_printf(dev, "could not map memory\n");
3397 ** Make the controller's registers available.
3398 ** Now the INB INW INL OUTB OUTW OUTL macros
3399 ** can be used safely.
3402 np->bst = rman_get_bustag(np->reg_res);
3403 np->bsh = rman_get_bushandle(np->reg_res);
3408 ** Try to map the controller chip into iospace.
3411 if (!pci_map_port (config_id, 0x10, &np->port))
3417 ** Save some controller register default values
3420 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3421 np->rv_dmode = INB(nc_dmode) & 0xce;
3422 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3423 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3424 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3425 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3426 np->rv_gpcntl = INB(nc_gpcntl);
3427 np->rv_stest2 = INB(nc_stest2) & 0x20;
3429 if (bootverbose >= 2) {
3430 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3431 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3432 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3433 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3436 np->rv_dcntl |= NOCOM;
3439 ** Do chip dependent initialization.
3442 rev = pci_get_revid(dev);
3445 ** Get chip features from chips table.
3447 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3450 np->maxburst = ncr_chip_table[i].maxburst;
3451 np->maxoffs = ncr_chip_table[i].maxoffs;
3452 np->clock_divn = ncr_chip_table[i].clock_divn;
3453 np->features = ncr_chip_table[i].features;
3454 } else { /* Should'nt happen if probe() is ok */
3458 np->features = FE_ERL;
3461 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3462 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3463 if (np->features & FE_QUAD) np->multiplier = 4;
3464 else if (np->features & FE_DBLR) np->multiplier = 2;
3465 else np->multiplier = 1;
3468 ** Get the frequency of the chip's clock.
3469 ** Find the right value for scntl3.
3471 if (np->features & (FE_ULTRA|FE_ULTRA2))
3472 ncr_getclock(np, np->multiplier);
3474 #ifdef NCR_TEKRAM_EEPROM
3476 printf ("%s: Tekram EEPROM read %s\n",
3478 read_tekram_eeprom (np, NULL) ?
3479 "succeeded" : "failed");
3481 #endif /* NCR_TEKRAM_EEPROM */
3484 * If scntl3 != 0, we assume BIOS is present.
3487 np->features |= FE_BIOS;
3490 * Divisor to be used for async (timer pre-scaler).
3492 i = np->clock_divn - 1;
3495 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3500 np->rv_scntl3 = i+1;
3503 * Minimum synchronous period factor supported by the chip.
3504 * Btw, 'period' is in tenths of nanoseconds.
3507 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3508 if (period <= 250) np->minsync = 10;
3509 else if (period <= 303) np->minsync = 11;
3510 else if (period <= 500) np->minsync = 12;
3511 else np->minsync = (period + 40 - 1) / 40;
3514 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3517 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3519 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3523 * Maximum synchronous period factor supported by the chip.
3526 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3527 np->maxsync = period > 2540 ? 254 : period / 10;
3530 * Now, some features available with Symbios compatible boards.
3531 * LED support through GPIO0 and DIFF support.
3534 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3535 if (!(np->rv_gpcntl & 0x01))
3536 np->features |= FE_LED0;
3537 #if 0 /* Not safe enough without NVRAM support or user settable option */
3538 if (!(INB(nc_gpreg) & 0x08))
3539 np->features |= FE_DIFF;
3541 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3544 * Prepare initial IO registers settings.
3545 * Trust BIOS only if we believe we have one and if we want to.
3547 #ifdef SCSI_NCR_TRUST_BIOS
3548 if (!(np->features & FE_BIOS)) {
3553 np->rv_dcntl = NOCOM;
3555 np->rv_ctest4 = MPEE;
3559 if (np->features & FE_ERL)
3560 np->rv_dmode |= ERL; /* Enable Read Line */
3561 if (np->features & FE_BOF)
3562 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3563 if (np->features & FE_ERMP)
3564 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3565 if (np->features & FE_CLSE)
3566 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3567 if (np->features & FE_WRIE)
3568 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3569 if (np->features & FE_PFEN)
3570 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3571 if (np->features & FE_DFS)
3572 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3573 if (np->features & FE_DIFF)
3574 np->rv_stest2 |= 0x20; /* Differential mode */
3575 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3578 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3582 ** Get on-chip SRAM address, if supported
3584 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3585 np->sram_rid = 0x18;
3586 np->sram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3592 ** Allocate structure for script relocation.
3594 if (np->sram_res != NULL) {
3596 np->p_script = rman_get_start(np->sram_res);
3597 np->bst2 = rman_get_bustag(np->sram_res);
3598 np->bsh2 = rman_get_bushandle(np->sram_res);
3599 } else if (sizeof (struct script) > PAGE_SIZE) {
3600 np->script = (struct script*) contigmalloc
3601 (round_page(sizeof (struct script)), M_DEVBUF, M_WAITOK,
3602 0, 0xffffffff, PAGE_SIZE, 0);
3604 np->script = (struct script *)
3605 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3608 if (sizeof (struct scripth) > PAGE_SIZE) {
3609 np->scripth = (struct scripth*) contigmalloc
3610 (round_page(sizeof (struct scripth)), M_DEVBUF, M_WAITOK,
3611 0, 0xffffffff, PAGE_SIZE, 0);
3614 np->scripth = (struct scripth *)
3615 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3618 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3620 ** If cache line size is enabled, check PCI config space and
3621 ** try to fix it up if necessary.
3623 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3625 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3626 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3630 printf("%s: setting PCI cache line size register to %d.\n",
3631 ncr_name(np), (int)cachelnsz);
3632 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3635 if (!(command & (1<<4))) {
3637 printf("%s: setting PCI command write and invalidate.\n",
3639 pci_write_config(dev, PCIR_COMMAND, command, 2);
3642 #endif /* PCIR_CACHELNSZ */
3644 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3646 /* Initialize per-target user settings */
3648 if (SCSI_NCR_DFLT_SYNC) {
3649 usrsync = SCSI_NCR_DFLT_SYNC;
3650 if (usrsync > np->maxsync)
3651 usrsync = np->maxsync;
3652 if (usrsync < np->minsync)
3653 usrsync = np->minsync;
3656 usrwide = (SCSI_NCR_MAX_WIDE);
3657 if (usrwide > np->maxwide) usrwide=np->maxwide;
3659 for (i=0;i<MAX_TARGET;i++) {
3660 tcb_p tp = &np->target[i];
3662 tp->tinfo.user.period = usrsync;
3663 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3664 tp->tinfo.user.width = usrwide;
3665 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3672 ** Bells and whistles ;-)
3675 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3676 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3677 burst_length(np->maxburst),
3678 (np->rv_ctest5 & DFS) ? "large" : "normal");
3681 ** Print some complementary information that can be helpfull.
3684 printf("%s: %s, %s IRQ driver%s\n",
3686 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3687 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3688 np->sram_res ? ", using on-chip SRAM" : "");
3691 ** Patch scripts to physical addresses
3693 ncr_script_fill (&script0, &scripth0);
3696 np->p_script = vtophys(np->script);
3697 np->p_scripth = vtophys(np->scripth);
3699 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3700 (ncrcmd *) np->script, sizeof(struct script));
3702 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3703 (ncrcmd *) np->scripth, sizeof(struct scripth));
3706 ** Patch the script for LED support.
3709 if (np->features & FE_LED0) {
3710 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3711 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3712 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3716 ** init data structure
3719 np->jump_tcb.l_cmd = SCR_JUMP;
3720 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3723 ** Get SCSI addr of host adapter (set by bios?).
3726 np->myaddr = INB(nc_scid) & 0x07;
3727 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3731 ** Log the initial register contents
3735 for (reg=0; reg<256; reg+=4) {
3736 if (reg%16==0) printf ("reg[%2x]", reg);
3737 printf (" %08x", (int)pci_conf_read (config_id, reg));
3738 if (reg%16==12) printf ("\n");
3741 #endif /* NCR_DUMP_REG */
3747 OUTB (nc_istat, SRST);
3749 OUTB (nc_istat, 0 );
3753 ** Now check the cache handling of the pci chipset.
3756 if (ncr_snooptest (np)) {
3757 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3762 ** Install the interrupt handler.
3766 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3767 RF_SHAREABLE | RF_ACTIVE);
3768 if (np->irq_res == NULL) {
3770 "interruptless mode: reduced performance.\n");
3772 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
3773 ncr_intr, np, &np->irq_handle);
3777 ** Create the device queue. We only allow MAX_START-1 concurrent
3778 ** transactions so we can be sure to have one element free in our
3779 ** start queue to reset to the idle loop.
3781 devq = cam_simq_alloc(MAX_START - 1);
3786 ** Now tell the generic SCSI layer
3789 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3791 if (np->sim == NULL) {
3792 cam_simq_free(devq);
3797 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3798 cam_sim_free(np->sim, /*free_devq*/ TRUE);
3802 if (xpt_create_path(&np->path, /*periph*/NULL,
3803 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3804 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3805 xpt_bus_deregister(cam_sim_path(np->sim));
3806 cam_sim_free(np->sim, /*free_devq*/TRUE);
3811 ** start the timeout daemon
3819 /*==========================================================
3822 ** Process pending device interrupts.
3825 **==========================================================
3833 int oldspl = splcam();
3835 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3837 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3839 ** Repeat until no outstanding ints
3843 } while (INB(nc_istat) & (INTF|SIP|DIP));
3848 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3853 /*==========================================================
3856 ** Start execution of a SCSI command.
3857 ** This is called from the generic SCSI driver.
3860 **==========================================================
3864 ncr_action (struct cam_sim *sim, union ccb *ccb)
3868 np = (ncb_p) cam_sim_softc(sim);
3870 switch (ccb->ccb_h.func_code) {
3871 /* Common cases first */
3872 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3878 struct ccb_scsiio *csio;
3887 tp = &np->target[ccb->ccb_h.target_id];
3893 * Last time we need to check if this CCB needs to
3896 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3901 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3903 /*---------------------------------------------------
3905 ** Assign an nccb / bind ccb
3907 **----------------------------------------------------
3909 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3910 ccb->ccb_h.target_lun);
3912 /* XXX JGibbs - Freeze SIMQ */
3913 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3920 /*---------------------------------------------------
3924 **----------------------------------------------------
3927 ** XXX JGibbs - Isn't this expensive
3928 ** enough to be conditionalized??
3931 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3932 cp->phys.header.stamp.start = ticks;
3935 if (tp->nego_cp == NULL) {
3937 if (tp->tinfo.current.width
3938 != tp->tinfo.goal.width) {
3941 } else if ((tp->tinfo.current.period
3942 != tp->tinfo.goal.period)
3943 || (tp->tinfo.current.offset
3944 != tp->tinfo.goal.offset)) {
3950 /*---------------------------------------------------
3952 ** choose a new tag ...
3954 **----------------------------------------------------
3956 lp = tp->lp[ccb->ccb_h.target_lun];
3958 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3959 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3962 ** assign a tag to this nccb
3965 nccb_p cp2 = lp->next_nccb;
3966 lp->lasttag = lp->lasttag % 255 + 1;
3967 while (cp2 && cp2->tag != lp->lasttag)
3968 cp2 = cp2->next_nccb;
3970 cp->tag=lp->lasttag;
3971 if (DEBUG_FLAGS & DEBUG_TAGS) {
3973 printf ("using tag #%d.\n", cp->tag);
3980 /*----------------------------------------------------
3982 ** Build the identify / tag / sdtr message
3984 **----------------------------------------------------
3986 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3987 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3988 idmsg |= MSG_IDENTIFY_DISCFLAG;
3990 msgptr = cp->scsi_smsg;
3992 msgptr[msglen++] = idmsg;
3995 msgptr[msglen++] = ccb->csio.tag_action;
3996 msgptr[msglen++] = cp->tag;
4001 msgptr[msglen++] = MSG_EXTENDED;
4002 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
4003 msgptr[msglen++] = MSG_EXT_SDTR;
4004 msgptr[msglen++] = tp->tinfo.goal.period;
4005 msgptr[msglen++] = tp->tinfo.goal.offset;;
4006 if (DEBUG_FLAGS & DEBUG_NEGO) {
4008 printf ("sync msgout: ");
4009 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4014 msgptr[msglen++] = MSG_EXTENDED;
4015 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4016 msgptr[msglen++] = MSG_EXT_WDTR;
4017 msgptr[msglen++] = tp->tinfo.goal.width;
4018 if (DEBUG_FLAGS & DEBUG_NEGO) {
4020 printf ("wide msgout: ");
4021 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4027 /*----------------------------------------------------
4029 ** Build the identify message for getcc.
4031 **----------------------------------------------------
4034 cp->scsi_smsg2 [0] = idmsg;
4037 /*----------------------------------------------------
4039 ** Build the data descriptors
4041 **----------------------------------------------------
4044 /* XXX JGibbs - Handle other types of I/O */
4045 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4046 segments = ncr_scatter(&cp->phys,
4047 (vm_offset_t)csio->data_ptr,
4048 (vm_size_t)csio->dxfer_len);
4051 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4052 ncr_free_nccb(np, cp);
4057 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4058 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4059 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4060 } else { /* CAM_DIR_OUT */
4061 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4062 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4065 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4066 cp->phys.header.goalp = cp->phys.header.savep;
4069 cp->phys.header.lastp = cp->phys.header.savep;
4072 /*----------------------------------------------------
4076 **----------------------------------------------------
4079 ** physical -> virtual backlink
4080 ** Generic SCSI command
4082 cp->phys.header.cp = cp;
4086 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4087 cp->phys.header.launch.l_cmd = SCR_JUMP;
4091 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4092 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4093 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4097 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4098 cp->phys.smsg.size = msglen;
4100 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4101 cp->phys.smsg2.size = msglen2;
4105 /* XXX JGibbs - Support other command types */
4106 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4107 cp->phys.cmd.size = csio->cdb_len;
4111 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4112 cp->phys.scmd.size = 6;
4114 ** patch requested size into sense command
4116 cp->sensecmd[0] = 0x03;
4117 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4118 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4119 cp->sensecmd[4] = csio->sense_len;
4123 cp->phys.sense.addr = vtophys (&csio->sense_data);
4124 cp->phys.sense.size = csio->sense_len;
4128 cp->actualquirks = QUIRK_NOMSG;
4129 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4130 cp->s_status = SCSI_STATUS_ILLEGAL;
4131 cp->parity_status = 0;
4133 cp->xerr_status = XE_OK;
4134 cp->sync_status = tp->tinfo.sval;
4135 cp->nego_status = nego;
4136 cp->wide_status = tp->tinfo.wval;
4138 /*----------------------------------------------------
4140 ** Critical region: start this job.
4142 **----------------------------------------------------
4146 ** reselect pattern and activate this job.
4149 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4150 cp->tlimit = time_second
4151 + ccb->ccb_h.timeout / 1000 + 2;
4152 cp->magic = CCB_MAGIC;
4155 ** insert into start queue.
4158 qidx = np->squeueput + 1;
4159 if (qidx >= MAX_START)
4161 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4162 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4163 np->squeueput = qidx;
4165 if(DEBUG_FLAGS & DEBUG_QUEUE)
4166 printf("%s: queuepos=%d tryoffset=%d.\n",
4167 ncr_name (np), np->squeueput,
4168 (unsigned)(READSCRIPT(startpos[0]) -
4169 (NCB_SCRIPTH_PHYS (np, tryloop))));
4172 ** Script processor may be waiting for reselect.
4175 OUTB (nc_istat, SIGP);
4178 ** and reenable interrupts
4183 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4184 case XPT_EN_LUN: /* Enable LUN as a target */
4185 case XPT_TARGET_IO: /* Execute target I/O request */
4186 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4187 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4188 case XPT_ABORT: /* Abort the specified CCB */
4190 ccb->ccb_h.status = CAM_REQ_INVALID;
4193 case XPT_SET_TRAN_SETTINGS:
4195 struct ccb_trans_settings *cts;
4202 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
4203 update_type |= NCR_TRANS_GOAL;
4204 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
4205 update_type |= NCR_TRANS_USER;
4208 tp = &np->target[ccb->ccb_h.target_id];
4209 /* Tag and disc enables */
4210 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
4211 if (update_type & NCR_TRANS_GOAL) {
4212 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4213 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4215 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4218 if (update_type & NCR_TRANS_USER) {
4219 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4220 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4222 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4227 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
4228 if (update_type & NCR_TRANS_GOAL) {
4229 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4230 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4232 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4235 if (update_type & NCR_TRANS_USER) {
4236 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4237 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4239 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4243 /* Filter bus width and sync negotiation settings */
4244 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
4245 if (cts->bus_width > np->maxwide)
4246 cts->bus_width = np->maxwide;
4249 if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4250 || ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
4251 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
4252 if (cts->sync_period != 0
4253 && (cts->sync_period < np->minsync))
4254 cts->sync_period = np->minsync;
4256 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0) {
4257 if (cts->sync_offset == 0)
4258 cts->sync_period = 0;
4259 if (cts->sync_offset > np->maxoffs)
4260 cts->sync_offset = np->maxoffs;
4263 if ((update_type & NCR_TRANS_USER) != 0) {
4264 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4265 tp->tinfo.user.period = cts->sync_period;
4266 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4267 tp->tinfo.user.offset = cts->sync_offset;
4268 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4269 tp->tinfo.user.width = cts->bus_width;
4271 if ((update_type & NCR_TRANS_GOAL) != 0) {
4272 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4273 tp->tinfo.goal.period = cts->sync_period;
4275 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4276 tp->tinfo.goal.offset = cts->sync_offset;
4278 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4279 tp->tinfo.goal.width = cts->bus_width;
4282 ccb->ccb_h.status = CAM_REQ_CMP;
4286 case XPT_GET_TRAN_SETTINGS:
4287 /* Get default/user set transfer settings for the target */
4289 struct ccb_trans_settings *cts;
4290 struct ncr_transinfo *tinfo;
4295 tp = &np->target[ccb->ccb_h.target_id];
4298 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
4299 tinfo = &tp->tinfo.current;
4300 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4301 cts->flags |= CCB_TRANS_DISC_ENB;
4303 cts->flags &= ~CCB_TRANS_DISC_ENB;
4305 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4306 cts->flags |= CCB_TRANS_TAG_ENB;
4308 cts->flags &= ~CCB_TRANS_TAG_ENB;
4310 tinfo = &tp->tinfo.user;
4311 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4312 cts->flags |= CCB_TRANS_DISC_ENB;
4314 cts->flags &= ~CCB_TRANS_DISC_ENB;
4316 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4317 cts->flags |= CCB_TRANS_TAG_ENB;
4319 cts->flags &= ~CCB_TRANS_TAG_ENB;
4322 cts->sync_period = tinfo->period;
4323 cts->sync_offset = tinfo->offset;
4324 cts->bus_width = tinfo->width;
4328 cts->valid = CCB_TRANS_SYNC_RATE_VALID
4329 | CCB_TRANS_SYNC_OFFSET_VALID
4330 | CCB_TRANS_BUS_WIDTH_VALID
4331 | CCB_TRANS_DISC_VALID
4332 | CCB_TRANS_TQ_VALID;
4334 ccb->ccb_h.status = CAM_REQ_CMP;
4338 case XPT_CALC_GEOMETRY:
4340 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4341 * but it should be able to deal with Adaptec
4344 cam_calc_geometry(&ccb->ccg, /*extended*/1);
4348 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4350 OUTB (nc_scntl1, CRST);
4351 ccb->ccb_h.status = CAM_REQ_CMP;
4352 DELAY(10000); /* Wait until our interrupt handler sees it */
4356 case XPT_TERM_IO: /* Terminate the I/O process */
4358 ccb->ccb_h.status = CAM_REQ_INVALID;
4361 case XPT_PATH_INQ: /* Path routing inquiry */
4363 struct ccb_pathinq *cpi = &ccb->cpi;
4365 cpi->version_num = 1; /* XXX??? */
4366 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4367 if ((np->features & FE_WIDE) != 0)
4368 cpi->hba_inquiry |= PI_WIDE_16;
4369 cpi->target_sprt = 0;
4371 cpi->hba_eng_cnt = 0;
4372 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4373 cpi->max_lun = MAX_LUN - 1;
4374 cpi->initiator_id = np->myaddr;
4375 cpi->bus_id = cam_sim_bus(sim);
4376 cpi->base_transfer_speed = 3300;
4377 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4378 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4379 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4380 cpi->unit_number = cam_sim_unit(sim);
4381 cpi->ccb_h.status = CAM_REQ_CMP;
4386 ccb->ccb_h.status = CAM_REQ_INVALID;
4392 /*==========================================================
4395 ** Complete execution of a SCSI command.
4396 ** Signal completion to the generic SCSI driver.
4399 **==========================================================
4403 ncr_complete (ncb_p np, nccb_p cp)
4412 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4417 ** No Reselect anymore.
4419 cp->jump_nccb.l_cmd = (SCR_JUMP);
4424 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4429 ncb_profile (np, cp);
4431 if (DEBUG_FLAGS & DEBUG_TINY)
4432 printf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4433 cp->host_status,cp->s_status);
4437 tp = &np->target[ccb->ccb_h.target_id];
4440 ** We do not queue more than 1 nccb per target
4441 ** with negotiation at any time. If this nccb was
4442 ** used for negotiation, clear this info in the tcb.
4445 if (cp == tp->nego_cp)
4449 ** Check for parity errors.
4451 /* XXX JGibbs - What about reporting them??? */
4453 if (cp->parity_status) {
4455 printf ("%d parity error(s), fallback.\n", cp->parity_status);
4457 ** fallback to asynch transfer.
4459 tp->tinfo.goal.period = 0;
4460 tp->tinfo.goal.offset = 0;
4464 ** Check for extended errors.
4467 if (cp->xerr_status != XE_OK) {
4469 switch (cp->xerr_status) {
4471 printf ("extraneous data discarded.\n");
4474 printf ("illegal scsi phase (4/5).\n");
4477 printf ("extended error %d.\n", cp->xerr_status);
4480 if (cp->host_status==HS_COMPLETE)
4481 cp->host_status = HS_FAIL;
4485 ** Check the status.
4487 if (cp->host_status == HS_COMPLETE) {
4489 if (cp->s_status == SCSI_STATUS_OK) {
4494 /* XXX JGibbs - Properly calculate residual */
4496 tp->bytes += ccb->csio.dxfer_len;
4499 ccb->ccb_h.status = CAM_REQ_CMP;
4500 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4503 * XXX Could be TERMIO too. Should record
4506 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4507 cp->s_status &= ~SCSI_STATUS_SENSE;
4508 if (cp->s_status == SCSI_STATUS_OK) {
4510 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4512 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4515 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4516 ccb->csio.scsi_status = cp->s_status;
4520 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4523 ** Device failed selection
4525 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4527 } else if (cp->host_status == HS_TIMEOUT) {
4532 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4533 } else if (cp->host_status == HS_STALL) {
4534 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4538 ** Other protocol messes
4541 printf ("COMMAND FAILED (%x %x) @%p.\n",
4542 cp->host_status, cp->s_status, cp);
4544 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4547 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4548 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4549 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4555 ncr_free_nccb (np, cp);
4558 ** signal completion to generic driver.
4563 /*==========================================================
4566 ** Signal all (or one) control block done.
4569 **==========================================================
4573 ncr_wakeup (ncb_p np, u_long code)
4576 ** Starting at the default nccb and following
4577 ** the links, complete all jobs with a
4578 ** host_status greater than "disconnect".
4580 ** If the "code" parameter is not zero,
4581 ** complete all jobs that are not IDLE.
4584 nccb_p cp = np->link_nccb;
4586 switch (cp->host_status) {
4592 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D");
4598 cp->host_status = code;
4603 ncr_complete (np, cp);
4606 cp = cp -> link_nccb;
4611 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4618 ** Starting at the first nccb and following
4619 ** the links, complete all jobs that match
4620 ** the passed in path and are in the start queue.
4627 switch (cp->host_status) {
4631 if ((cp->phys.header.launch.l_paddr
4632 == NCB_SCRIPT_PHYS (np, select))
4633 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4635 /* Mark for removal from the start queue */
4636 for (i = 1; i < MAX_START; i++) {
4639 idx = np->squeueput - i;
4642 idx = MAX_START + idx;
4644 == CCB_PHYS(cp, phys)) {
4646 NCB_SCRIPT_PHYS (np, skip);
4652 cp->host_status=HS_STALL;
4653 ncr_complete (np, cp);
4667 /* Compress the start queue */
4669 bidx = np->squeueput;
4670 i = np->squeueput - firstskip;
4677 bidx = MAX_START + bidx;
4679 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4681 } else if (j != 0) {
4682 np->squeue[bidx] = np->squeue[i];
4683 if (np->squeue[bidx]
4684 == NCB_SCRIPT_PHYS(np, idle))
4687 i = (i + 1) % MAX_START;
4689 np->squeueput = bidx;
4693 /*==========================================================
4699 **==========================================================
4703 ncr_init(ncb_p np, char * msg, u_long code)
4711 OUTB (nc_istat, SRST);
4719 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg);
4722 ** Clear Start Queue
4725 for (i=0;i<MAX_START;i++)
4726 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4729 ** Start at first entry.
4733 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4734 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4737 ** Wakeup all pending jobs.
4740 ncr_wakeup (np, code);
4746 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4747 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4748 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4749 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4750 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4751 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4752 OUTB (nc_istat , SIGP ); /* Signal Process */
4753 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4754 OUTB (nc_dcntl , np->rv_dcntl);
4755 OUTB (nc_ctest3, np->rv_ctest3);
4756 OUTB (nc_ctest5, np->rv_ctest5);
4757 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4758 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4759 OUTB (nc_stest3, TE ); /* TolerANT enable */
4760 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4762 if (bootverbose >= 2) {
4763 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4764 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4765 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4766 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4770 ** Enable GPIO0 pin for writing if LED support.
4773 if (np->features & FE_LED0) {
4774 OUTOFFB (nc_gpcntl, 0x01);
4778 ** Fill in target structure.
4780 for (i=0;i<MAX_TARGET;i++) {
4781 tcb_p tp = &np->target[i];
4784 tp->tinfo.wval = np->rv_scntl3;
4786 tp->tinfo.current.period = 0;
4787 tp->tinfo.current.offset = 0;
4788 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4795 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4796 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4799 ** Start script processor.
4802 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4805 * Notify the XPT of the event
4807 if (code == HS_RESET)
4808 xpt_async(AC_BUS_RESET, np->path, NULL);
4812 ncr_poll(struct cam_sim *sim)
4814 ncr_intr(cam_sim_softc(sim));
4818 /*==========================================================
4820 ** Get clock factor and sync divisor for a given
4821 ** synchronous factor period.
4822 ** Returns the clock factor (in sxfer) and scntl3
4823 ** synchronous divisor field.
4825 **==========================================================
4828 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4830 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4831 int div = np->clock_divn; /* Number of divisors supported */
4832 u_long fak; /* Sync factor in sxfer */
4833 u_long per; /* Period in tenths of ns */
4834 u_long kpc; /* (per * clk) */
4837 ** Compute the synchronous period in tenths of nano-seconds
4839 if (sfac <= 10) per = 250;
4840 else if (sfac == 11) per = 303;
4841 else if (sfac == 12) per = 500;
4842 else per = 40 * sfac;
4845 ** Look for the greatest clock divisor that allows an
4846 ** input speed faster than the period.
4850 if (kpc >= (div_10M[div] * 4)) break;
4853 ** Calculate the lowest clock factor that allows an output
4854 ** speed not faster than the period.
4856 fak = (kpc - 1) / div_10M[div] + 1;
4858 #if 0 /* You can #if 1 if you think this optimization is usefull */
4860 per = (fak * div_10M[div]) / clk;
4863 ** Why not to try the immediate lower divisor and to choose
4864 ** the one that allows the fastest output speed ?
4865 ** We dont want input speed too much greater than output speed.
4867 if (div >= 1 && fak < 6) {
4869 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4870 per2 = (fak2 * div_10M[div-1]) / clk;
4871 if (per2 < per && fak2 <= 6) {
4879 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4882 ** Compute and return sync parameters for the ncr
4885 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4888 /*==========================================================
4890 ** Switch sync mode for current job and its target
4892 **==========================================================
4896 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4899 struct ccb_trans_settings neg;
4902 u_int target = INB (nc_sdid) & 0x0f;
4911 assert (target == ccb->ccb_h.target_id);
4913 tp = &np->target[target];
4915 if (!scntl3 || !(sxfer & 0x1f))
4916 scntl3 = np->rv_scntl3;
4917 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4918 | (np->rv_scntl3 & 0x07);
4921 ** Deduce the value of controller sync period from scntl3.
4922 ** period is in tenths of nano-seconds.
4925 div = ((scntl3 >> 4) & 0x7);
4926 if ((sxfer & 0x1f) && div)
4928 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4932 tp->tinfo.goal.period = period;
4933 tp->tinfo.goal.offset = sxfer & 0x1f;
4934 tp->tinfo.current.period = period;
4935 tp->tinfo.current.offset = sxfer & 0x1f;
4938 ** Stop there if sync parameters are unchanged
4940 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4941 tp->tinfo.sval = sxfer;
4942 tp->tinfo.wval = scntl3;
4946 ** Disable extended Sreq/Sack filtering
4948 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4952 ** Tell the SCSI layer about the
4953 ** new transfer parameters.
4955 neg.sync_period = period;
4956 neg.sync_offset = sxfer & 0x1f;
4957 neg.valid = CCB_TRANS_SYNC_RATE_VALID
4958 | CCB_TRANS_SYNC_OFFSET_VALID;
4959 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4961 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4964 ** set actual value and sync_status
4966 OUTB (nc_sxfer, sxfer);
4967 np->sync_st = sxfer;
4968 OUTB (nc_scntl3, scntl3);
4969 np->wide_st = scntl3;
4972 ** patch ALL nccbs of this target.
4974 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4975 if (!cp->ccb) continue;
4976 if (cp->ccb->ccb_h.target_id != target) continue;
4977 cp->sync_status = sxfer;
4978 cp->wide_status = scntl3;
4982 /*==========================================================
4984 ** Switch wide mode for current job and its target
4985 ** SCSI specs say: a SCSI device that accepts a WDTR
4986 ** message shall reset the synchronous agreement to
4987 ** asynchronous mode.
4989 **==========================================================
4992 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
4995 struct ccb_trans_settings neg;
4996 u_int target = INB (nc_sdid) & 0x0f;
5007 assert (target == ccb->ccb_h.target_id);
5009 tp = &np->target[target];
5010 tp->tinfo.current.width = wide;
5011 tp->tinfo.goal.width = wide;
5012 tp->tinfo.current.period = 0;
5013 tp->tinfo.current.offset = 0;
5015 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5017 sxfer = ack ? 0 : tp->tinfo.sval;
5020 ** Stop there if sync/wide parameters are unchanged
5022 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5023 tp->tinfo.sval = sxfer;
5024 tp->tinfo.wval = scntl3;
5026 /* Tell the SCSI layer about the new transfer params */
5027 neg.bus_width = (scntl3 & EWS) ? MSG_EXT_WDTR_BUS_16_BIT
5028 : MSG_EXT_WDTR_BUS_8_BIT;
5029 neg.sync_period = 0;
5030 neg.sync_offset = 0;
5031 neg.valid = CCB_TRANS_BUS_WIDTH_VALID
5032 | CCB_TRANS_SYNC_RATE_VALID
5033 | CCB_TRANS_SYNC_OFFSET_VALID;
5034 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
5036 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5039 ** set actual value and sync_status
5041 OUTB (nc_sxfer, sxfer);
5042 np->sync_st = sxfer;
5043 OUTB (nc_scntl3, scntl3);
5044 np->wide_st = scntl3;
5047 ** patch ALL nccbs of this target.
5049 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5050 if (!cp->ccb) continue;
5051 if (cp->ccb->ccb_h.target_id != target) continue;
5052 cp->sync_status = sxfer;
5053 cp->wide_status = scntl3;
5057 /*==========================================================
5060 ** ncr timeout handler.
5063 **==========================================================
5065 ** Misused to keep the driver running when
5066 ** interrupts are not configured correctly.
5068 **----------------------------------------------------------
5072 ncr_timeout (void *arg)
5075 time_t thistime = time_second;
5076 ticks_t step = np->ticks;
5081 if (np->lasttime != thistime) {
5083 ** block ncr interrupts
5085 int oldspl = splcam();
5086 np->lasttime = thistime;
5088 /*----------------------------------------------------
5090 ** handle ncr chip timeouts
5093 ** We have a chance to arbitrate for the
5094 ** SCSI bus at least every 10 seconds.
5096 **----------------------------------------------------
5099 t = thistime - np->heartbeat;
5101 if (t<2) np->latetime=0; else np->latetime++;
5103 if (np->latetime>2) {
5105 ** If there are no requests, the script
5106 ** processor will sleep on SEL_WAIT_RESEL.
5107 ** But we have to check whether it died.
5108 ** Let's try to wake it up.
5110 OUTB (nc_istat, SIGP);
5113 /*----------------------------------------------------
5115 ** handle nccb timeouts
5117 **----------------------------------------------------
5120 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5122 ** look for timed out nccbs.
5124 if (!cp->host_status) continue;
5126 if (cp->tlimit > thistime) continue;
5129 ** Disable reselect.
5130 ** Remove it from startqueue.
5132 cp->jump_nccb.l_cmd = (SCR_JUMP);
5133 if (cp->phys.header.launch.l_paddr ==
5134 NCB_SCRIPT_PHYS (np, select)) {
5135 printf ("%s: timeout nccb=%p (skip)\n",
5137 cp->phys.header.launch.l_paddr
5138 = NCB_SCRIPT_PHYS (np, skip);
5141 switch (cp->host_status) {
5147 cp->host_status=HS_TIMEOUT;
5152 ** wakeup this nccb.
5154 ncr_complete (np, cp);
5160 timeout (ncr_timeout, (caddr_t) np, step ? step : 1);
5162 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5165 ** Process pending interrupts.
5168 int oldspl = splcam();
5169 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{");
5171 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}");
5176 /*==========================================================
5178 ** log message for real hard errors
5180 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5181 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5183 ** exception register:
5188 ** so: control lines as driver by NCR.
5189 ** si: control lines as seen by NCR.
5190 ** sd: scsi data lines as seen by NCR.
5193 ** sxfer: (see the manual)
5194 ** scntl3: (see the manual)
5196 ** current script command:
5197 ** dsp: script address (relative to start of script).
5198 ** dbc: first word of script command.
5200 ** First 16 register of the chip:
5203 **==========================================================
5206 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5212 u_char *script_base;
5217 if (np->p_script < dsp &&
5218 dsp <= np->p_script + sizeof(struct script)) {
5219 script_ofs = dsp - np->p_script;
5220 script_size = sizeof(struct script);
5221 script_base = (u_char *) np->script;
5222 script_name = "script";
5224 else if (np->p_scripth < dsp &&
5225 dsp <= np->p_scripth + sizeof(struct scripth)) {
5226 script_ofs = dsp - np->p_scripth;
5227 script_size = sizeof(struct scripth);
5228 script_base = (u_char *) np->scripth;
5229 script_name = "scripth";
5234 script_name = "mem";
5237 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5238 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5239 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5240 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5241 (unsigned)INL (nc_dbc));
5243 if (((script_ofs & 3) == 0) &&
5244 (unsigned)script_ofs < script_size) {
5245 printf ("%s: script cmd = %08x\n", ncr_name(np),
5246 (int)READSCRIPT_OFF(script_base, script_ofs));
5249 printf ("%s: regdump:", ncr_name(np));
5251 printf (" %02x", (unsigned)INB_OFF(i));
5255 /*==========================================================
5258 ** ncr chip exception handler.
5261 **==========================================================
5264 static void ncr_exception (ncb_p np)
5266 u_char istat, dstat;
5270 ** interrupt on the fly ?
5272 while ((istat = INB (nc_istat)) & INTF) {
5273 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
5274 OUTB (nc_istat, INTF);
5275 np->profile.num_fly++;
5278 if (!(istat & (SIP|DIP))) {
5283 ** Steinbach's Guideline for Systems Programming:
5284 ** Never test for an error condition you don't know how to handle.
5287 sist = (istat & SIP) ? INW (nc_sist) : 0;
5288 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5289 np->profile.num_int++;
5291 if (DEBUG_FLAGS & DEBUG_TINY)
5292 printf ("<%d|%x:%x|%x:%x>",
5295 (unsigned)INL(nc_dsp),
5296 (unsigned)INL(nc_dbc));
5297 if ((dstat==DFE) && (sist==PAR)) return;
5299 /*==========================================================
5301 ** First the normal cases.
5303 **==========================================================
5305 /*-------------------------------------------
5307 **-------------------------------------------
5311 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5315 /*-------------------------------------------
5316 ** selection timeout
5318 ** IID excluded from dstat mask!
5320 **-------------------------------------------
5324 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5325 !(dstat & (MDPE|BF|ABRT|SIR))) {
5330 /*-------------------------------------------
5332 **-------------------------------------------
5336 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5337 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5338 ncr_int_ma (np, dstat);
5342 /*----------------------------------------
5343 ** move command with length 0
5344 **----------------------------------------
5347 if ((dstat & IID) &&
5348 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5349 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5350 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5352 ** Target wants more data than available.
5353 ** The "no_data" script will do it.
5355 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5359 /*-------------------------------------------
5360 ** Programmed interrupt
5361 **-------------------------------------------
5364 if ((dstat & SIR) &&
5365 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5366 !(dstat & (MDPE|BF|ABRT|IID)) &&
5367 (INB(nc_dsps) <= SIR_MAX)) {
5372 /*========================================
5373 ** log message for real hard errors
5374 **========================================
5377 ncr_log_hard_error(np, sist, dstat);
5379 /*========================================
5380 ** do the register dump
5381 **========================================
5384 if (time_second - np->regtime > 10) {
5386 np->regtime = time_second;
5387 for (i=0; i<sizeof(np->regdump); i++)
5388 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5389 np->regdump.nc_dstat = dstat;
5390 np->regdump.nc_sist = sist;
5394 /*----------------------------------------
5395 ** clean up the dma fifo
5396 **----------------------------------------
5399 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5400 (INB(nc_sstat1) & (FF3210) ) ||
5401 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5403 printf ("%s: have to clear fifos.\n", ncr_name (np));
5404 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5405 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5406 /* clear dma fifo */
5409 /*----------------------------------------
5410 ** handshake timeout
5411 **----------------------------------------
5415 printf ("%s: handshake timeout\n", ncr_name(np));
5416 OUTB (nc_scntl1, CRST);
5418 OUTB (nc_scntl1, 0x00);
5419 OUTB (nc_scr0, HS_FAIL);
5420 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5424 /*----------------------------------------
5425 ** unexpected disconnect
5426 **----------------------------------------
5430 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5431 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5432 OUTB (nc_scr0, HS_UNEXPECTED);
5433 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5437 /*----------------------------------------
5438 ** cannot disconnect
5439 **----------------------------------------
5442 if ((dstat & IID) &&
5443 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5444 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5445 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5447 ** Unexpected data cycle while waiting for disconnect.
5449 if (INB(nc_sstat2) & LDSC) {
5451 ** It's an early reconnect.
5452 ** Let's continue ...
5454 OUTB (nc_dcntl, np->rv_dcntl | STD);
5458 printf ("%s: INFO: LDSC while IID.\n",
5462 printf ("%s: target %d doesn't release the bus.\n",
5463 ncr_name (np), INB (nc_sdid)&0x0f);
5465 ** return without restarting the NCR.
5466 ** timeout will do the real work.
5471 /*----------------------------------------
5473 **----------------------------------------
5476 if ((dstat & SSI) &&
5477 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5478 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5479 OUTB (nc_dcntl, np->rv_dcntl | STD);
5484 ** @RECOVER@ HTH, SGE, ABRT.
5486 ** We should try to recover from these interrupts.
5487 ** They may occur if there are problems with synch transfers, or
5488 ** if targets are switched on or off while the driver is running.
5492 /* clear scsi offsets */
5493 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5497 ** Freeze controller to be able to read the messages.
5500 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5503 for (i=0; i<0x60; i++) {
5507 printf ("%s: reg[%d0]: ",
5516 val = bus_space_read_1(np->bst, np->bsh, i);
5517 printf (" %x%x", val/16, val%16);
5518 if (i%16==15) printf (".\n");
5521 untimeout (ncr_timeout, (caddr_t) np, np->timeout_ch);
5523 printf ("%s: halted!\n", ncr_name(np));
5525 ** don't restart controller ...
5527 OUTB (nc_istat, SRST);
5533 ** Freeze system to be able to read the messages.
5535 printf ("ncr: fatal error: system halted - press reset to reboot ...");
5541 ** sorry, have to kill ALL jobs ...
5544 ncr_init (np, "fatal error", HS_FAIL);
5547 /*==========================================================
5549 ** ncr chip exception handler for selection timeout
5551 **==========================================================
5553 ** There seems to be a bug in the 53c810.
5554 ** Although a STO-Interrupt is pending,
5555 ** it continues executing script commands.
5556 ** But it will fail and interrupt (IID) on
5557 ** the next instruction where it's looking
5558 ** for a valid phase.
5560 **----------------------------------------------------------
5563 static void ncr_int_sto (ncb_p np)
5565 u_long dsa, scratcha, diff;
5567 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
5570 ** look for nccb and set the status.
5575 while (cp && (CCB_PHYS (cp, phys) != dsa))
5579 cp-> host_status = HS_SEL_TIMEOUT;
5580 ncr_complete (np, cp);
5584 ** repair start queue
5587 scratcha = INL (nc_scratcha);
5588 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5590 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5592 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5593 WRITESCRIPT(startpos[0], scratcha);
5594 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5597 ncr_init (np, "selection timeout", HS_FAIL);
5600 /*==========================================================
5603 ** ncr chip exception handler for phase errors.
5606 **==========================================================
5608 ** We have to construct a new transfer descriptor,
5609 ** to transfer the rest of the current block.
5611 **----------------------------------------------------------
5614 static void ncr_int_ma (ncb_p np, u_char dstat)
5621 volatile void *vdsp_base;
5623 u_int32_t oadr, olen;
5624 u_int32_t *tblp, *newcmd;
5625 u_char cmd, sbcl, ss0, ss2, ctest5;
5632 ss0 = INB (nc_sstat0);
5633 ss2 = INB (nc_sstat2);
5634 sbcl= INB (nc_sbcl);
5637 rest= dbc & 0xffffff;
5639 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5641 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5643 delta=(INB (nc_dfifo) - rest) & 0x7f;
5647 ** The data in the dma fifo has not been transfered to
5648 ** the target -> add the amount to the rest
5649 ** and clear the data.
5650 ** Check the sstat2 register in case of wide transfer.
5653 if (!(dstat & DFE)) rest += delta;
5654 if (ss0 & OLF) rest++;
5655 if (ss0 & ORF) rest++;
5656 if (INB(nc_scntl3) & EWS) {
5657 if (ss2 & OLF1) rest++;
5658 if (ss2 & ORF1) rest++;
5660 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5661 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5664 ** locate matching cp
5667 while (cp && (CCB_PHYS (cp, phys) != dsa))
5671 printf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5672 ncr_name (np), (void *) np->header.cp);
5675 if (cp != np->header.cp) {
5676 printf ("%s: SCSI phase error fixup: CCB address mismatch "
5677 "(%p != %p) np->nccb = %p\n",
5678 ncr_name (np), (void *)cp, (void *)np->header.cp,
5679 (void *)np->link_nccb);
5684 ** find the interrupted script command,
5685 ** and the address at which to continue.
5688 if (dsp == vtophys (&cp->patch[2])) {
5690 vdsp_off = offsetof(struct nccb, patch[0]);
5691 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5692 } else if (dsp == vtophys (&cp->patch[6])) {
5694 vdsp_off = offsetof(struct nccb, patch[4]);
5695 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5696 } else if (dsp > np->p_script &&
5697 dsp <= np->p_script + sizeof(struct script)) {
5698 vdsp_base = np->script;
5699 vdsp_off = dsp - np->p_script - 8;
5702 vdsp_base = np->scripth;
5703 vdsp_off = dsp - np->p_scripth - 8;
5708 ** log the information
5710 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5711 printf ("P%x%x ",cmd&7, sbcl&7);
5712 printf ("RL=%d D=%d SS0=%x ",
5713 (unsigned) rest, (unsigned) delta, ss0);
5715 if (DEBUG_FLAGS & DEBUG_PHASE) {
5716 printf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5719 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5723 ** get old startaddress and old length.
5726 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5728 if (cmd & 0x10) { /* Table indirect */
5729 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5733 tblp = (u_int32_t *) 0;
5734 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5737 if (DEBUG_FLAGS & DEBUG_PHASE) {
5738 printf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5739 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5746 ** if old phase not dataphase, leave here.
5749 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5750 PRINT_ADDR(cp->ccb);
5751 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5753 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5758 PRINT_ADDR(cp->ccb);
5759 printf ("phase change %x-%x %d@%08x resid=%d.\n",
5760 cmd&7, sbcl&7, (unsigned)olen,
5761 (unsigned)oadr, (unsigned)rest);
5763 OUTB (nc_dcntl, np->rv_dcntl | STD);
5768 ** choose the correct patch area.
5769 ** if savep points to one, choose the other.
5773 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5776 ** fillin the commands
5779 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5780 newcmd[1] = oadr + olen - rest;
5781 newcmd[2] = SCR_JUMP;
5784 if (DEBUG_FLAGS & DEBUG_PHASE) {
5785 PRINT_ADDR(cp->ccb);
5786 printf ("newcmd[%d] %x %x %x %x.\n",
5787 (int)(newcmd - cp->patch),
5788 (unsigned)newcmd[0],
5789 (unsigned)newcmd[1],
5790 (unsigned)newcmd[2],
5791 (unsigned)newcmd[3]);
5794 ** fake the return address (to the patch).
5795 ** and restart script processor at dispatcher.
5797 np->profile.num_break++;
5798 OUTL (nc_temp, vtophys (newcmd));
5800 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5802 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5805 /*==========================================================
5808 ** ncr chip exception handler for programmed interrupts.
5811 **==========================================================
5814 static int ncr_show_msg (u_char * msg)
5818 if (*msg==MSG_EXTENDED) {
5820 if (i-1>msg[1]) break;
5821 printf ("-%x",msg[i]);
5824 } else if ((*msg & 0xf0) == 0x20) {
5825 printf ("-%x",msg[1]);
5831 static void ncr_int_sir (ncb_p np)
5834 u_char chg, ofs, per, fak, wide;
5835 u_char num = INB (nc_dsps);
5838 u_int target = INB (nc_sdid) & 0x0f;
5839 tcb_p tp = &np->target[target];
5841 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
5844 case SIR_SENSE_RESTART:
5845 case SIR_STALL_RESTART:
5854 while (cp && (CCB_PHYS (cp, phys) != dsa))
5860 assert (cp == np->header.cp);
5861 if (cp != np->header.cp)
5867 /*--------------------------------------------------------------------
5869 ** Processing of interrupted getcc selects
5871 **--------------------------------------------------------------------
5874 case SIR_SENSE_RESTART:
5875 /*------------------------------------------
5876 ** Script processor is idle.
5877 ** Look for interrupted "check cond"
5878 **------------------------------------------
5881 if (DEBUG_FLAGS & DEBUG_RESTART)
5882 printf ("%s: int#%d",ncr_name (np),num);
5884 for (i=0; i<MAX_TARGET; i++) {
5885 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i);
5886 tp = &np->target[i];
5887 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5890 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5891 if ((cp->host_status==HS_BUSY) &&
5892 (cp->s_status==SCSI_STATUS_CHECK_COND))
5894 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)");
5895 tp->hold_cp = cp = (nccb_p) 0;
5899 if (DEBUG_FLAGS & DEBUG_RESTART)
5900 printf ("+ restart job ..\n");
5901 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5902 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5907 ** no job, resume normal processing
5909 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n");
5910 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5913 case SIR_SENSE_FAILED:
5914 /*-------------------------------------------
5915 ** While trying to select for
5916 ** getting the condition code,
5917 ** a target reselected us.
5918 **-------------------------------------------
5920 if (DEBUG_FLAGS & DEBUG_RESTART) {
5921 PRINT_ADDR(cp->ccb);
5922 printf ("in getcc reselect by t%d.\n",
5923 INB(nc_ssid) & 0x0f);
5929 cp->host_status = HS_BUSY;
5930 cp->s_status = SCSI_STATUS_CHECK_COND;
5931 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5934 ** And patch code to restart it.
5936 WRITESCRIPT(start0[0], SCR_INT);
5939 /*-----------------------------------------------------------------------------
5941 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5943 ** We try to negotiate sync and wide transfer only after
5944 ** a successfull inquire command. We look at byte 7 of the
5945 ** inquire data to determine the capabilities if the target.
5947 ** When we try to negotiate, we append the negotiation message
5948 ** to the identify and (maybe) simple tag message.
5949 ** The host status field is set to HS_NEGOTIATE to mark this
5952 ** If the target doesn't answer this message immidiately
5953 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5954 ** will be raised eventually.
5955 ** The handler removes the HS_NEGOTIATE status, and sets the
5956 ** negotiated value to the default (async / nowide).
5958 ** If we receive a matching answer immediately, we check it
5959 ** for validity, and set the values.
5961 ** If we receive a Reject message immediately, we assume the
5962 ** negotiation has failed, and fall back to standard values.
5964 ** If we receive a negotiation message while not in HS_NEGOTIATE
5965 ** state, it's a target initiated negotiation. We prepare a
5966 ** (hopefully) valid answer, set our parameters, and send back
5967 ** this answer to the target.
5969 ** If the target doesn't fetch the answer (no message out phase),
5970 ** we assume the negotiation has failed, and fall back to default
5973 ** When we set the values, we adjust them in all nccbs belonging
5974 ** to this target, in the controller's register, and in the "phys"
5975 ** field of the controller's struct ncb.
5977 ** Possible cases: hs sir msg_in value send goto
5978 ** We try try to negotiate:
5979 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
5980 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
5981 ** -> target answered (ok) NEG SYNC sdtr set - clrack
5982 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
5983 ** -> target answered (ok) NEG WIDE wdtr set - clrack
5984 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
5985 ** -> any other msgin NEG FAIL noop defa. - dispatch
5987 ** Target tries to negotiate:
5988 ** -> incoming message --- SYNC sdtr set SDTR -
5989 ** -> incoming message --- WIDE wdtr set WDTR -
5990 ** We sent our answer:
5991 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
5993 **-----------------------------------------------------------------------------
5996 case SIR_NEGO_FAILED:
5997 /*-------------------------------------------------------
5999 ** Negotiation failed.
6000 ** Target doesn't send an answer message,
6001 ** or target rejected our message.
6003 ** Remove negotiation request.
6005 **-------------------------------------------------------
6007 OUTB (HS_PRT, HS_BUSY);
6011 case SIR_NEGO_PROTO:
6012 /*-------------------------------------------------------
6014 ** Negotiation failed.
6015 ** Target doesn't fetch the answer message.
6017 **-------------------------------------------------------
6020 if (DEBUG_FLAGS & DEBUG_NEGO) {
6021 PRINT_ADDR(cp->ccb);
6022 printf ("negotiation failed sir=%x status=%x.\n",
6023 num, cp->nego_status);
6027 ** any error in negotiation:
6028 ** fall back to default mode.
6030 switch (cp->nego_status) {
6033 ncr_setsync (np, cp, 0, 0xe0, 0);
6037 ncr_setwide (np, cp, 0, 0);
6041 np->msgin [0] = MSG_NOOP;
6042 np->msgout[0] = MSG_NOOP;
6043 cp->nego_status = 0;
6044 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6049 ** Synchronous request message received.
6052 if (DEBUG_FLAGS & DEBUG_NEGO) {
6053 PRINT_ADDR(cp->ccb);
6054 printf ("sync msgin: ");
6055 (void) ncr_show_msg (np->msgin);
6060 ** get requested values.
6066 if (ofs==0) per=255;
6069 ** check values against driver limits.
6071 if (per < np->minsync)
6072 {chg = 1; per = np->minsync;}
6073 if (per < tp->tinfo.user.period)
6074 {chg = 1; per = tp->tinfo.user.period;}
6075 if (ofs > tp->tinfo.user.offset)
6076 {chg = 1; ofs = tp->tinfo.user.offset;}
6079 ** Check against controller limits.
6085 ncr_getsync(np, per, &fak, &scntl3);
6097 if (DEBUG_FLAGS & DEBUG_NEGO) {
6098 PRINT_ADDR(cp->ccb);
6099 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6100 per, scntl3, ofs, fak, chg);
6103 if (INB (HS_PRT) == HS_NEGOTIATE) {
6104 OUTB (HS_PRT, HS_BUSY);
6105 switch (cp->nego_status) {
6109 ** This was an answer message
6113 ** Answer wasn't acceptable.
6115 ncr_setsync (np, cp, 0, 0xe0, 0);
6116 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6121 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6122 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6127 ncr_setwide (np, cp, 0, 0);
6133 ** It was a request. Set value and
6134 ** prepare an answer message
6137 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6139 np->msgout[0] = MSG_EXTENDED;
6141 np->msgout[2] = MSG_EXT_SDTR;
6142 np->msgout[3] = per;
6143 np->msgout[4] = ofs;
6145 cp->nego_status = NS_SYNC;
6147 if (DEBUG_FLAGS & DEBUG_NEGO) {
6148 PRINT_ADDR(cp->ccb);
6149 printf ("sync msgout: ");
6150 (void) ncr_show_msg (np->msgout);
6155 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6158 np->msgin [0] = MSG_NOOP;
6164 ** Wide request message received.
6166 if (DEBUG_FLAGS & DEBUG_NEGO) {
6167 PRINT_ADDR(cp->ccb);
6168 printf ("wide msgin: ");
6169 (void) ncr_show_msg (np->msgin);
6174 ** get requested values.
6178 wide = np->msgin[3];
6181 ** check values against driver limits.
6184 if (wide > tp->tinfo.user.width)
6185 {chg = 1; wide = tp->tinfo.user.width;}
6187 if (DEBUG_FLAGS & DEBUG_NEGO) {
6188 PRINT_ADDR(cp->ccb);
6189 printf ("wide: wide=%d chg=%d.\n", wide, chg);
6192 if (INB (HS_PRT) == HS_NEGOTIATE) {
6193 OUTB (HS_PRT, HS_BUSY);
6194 switch (cp->nego_status) {
6198 ** This was an answer message
6202 ** Answer wasn't acceptable.
6204 ncr_setwide (np, cp, 0, 1);
6205 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6210 ncr_setwide (np, cp, wide, 1);
6211 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6216 ncr_setsync (np, cp, 0, 0xe0, 0);
6222 ** It was a request, set value and
6223 ** prepare an answer message
6226 ncr_setwide (np, cp, wide, 1);
6228 np->msgout[0] = MSG_EXTENDED;
6230 np->msgout[2] = MSG_EXT_WDTR;
6231 np->msgout[3] = wide;
6233 np->msgin [0] = MSG_NOOP;
6235 cp->nego_status = NS_WIDE;
6237 if (DEBUG_FLAGS & DEBUG_NEGO) {
6238 PRINT_ADDR(cp->ccb);
6239 printf ("wide msgout: ");
6240 (void) ncr_show_msg (np->msgout);
6245 /*--------------------------------------------------------------------
6247 ** Processing of special messages
6249 **--------------------------------------------------------------------
6252 case SIR_REJECT_RECEIVED:
6253 /*-----------------------------------------------
6255 ** We received a MSG_MESSAGE_REJECT message.
6257 **-----------------------------------------------
6260 PRINT_ADDR(cp->ccb);
6261 printf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6262 (unsigned)np->lastmsg, np->msgout[0]);
6265 case SIR_REJECT_SENT:
6266 /*-----------------------------------------------
6268 ** We received an unknown message
6270 **-----------------------------------------------
6273 PRINT_ADDR(cp->ccb);
6274 printf ("MSG_MESSAGE_REJECT sent for ");
6275 (void) ncr_show_msg (np->msgin);
6279 /*--------------------------------------------------------------------
6281 ** Processing of special messages
6283 **--------------------------------------------------------------------
6286 case SIR_IGN_RESIDUE:
6287 /*-----------------------------------------------
6289 ** We received an IGNORE RESIDUE message,
6290 ** which couldn't be handled by the script.
6292 **-----------------------------------------------
6295 PRINT_ADDR(cp->ccb);
6296 printf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6299 case SIR_MISSING_SAVE:
6300 /*-----------------------------------------------
6302 ** We received an DISCONNECT message,
6303 ** but the datapointer wasn't saved before.
6305 **-----------------------------------------------
6308 PRINT_ADDR(cp->ccb);
6309 printf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6310 "\tdata=%x save=%x goal=%x.\n",
6311 (unsigned) INL (nc_temp),
6312 (unsigned) np->header.savep,
6313 (unsigned) np->header.goalp);
6316 /*--------------------------------------------------------------------
6318 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6320 ** XXX JGibbs - We should do the same thing for BUSY status.
6322 ** The current command has been rejected,
6323 ** because there are too many in the command queue.
6324 ** We have started too many commands for that target.
6326 **--------------------------------------------------------------------
6328 case SIR_STALL_QUEUE:
6329 cp->xerr_status = XE_OK;
6330 cp->host_status = HS_COMPLETE;
6331 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6332 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6333 ncr_complete(np, cp);
6337 case SIR_STALL_RESTART:
6338 /*-----------------------------------------------
6340 ** Enable selecting again,
6341 ** if NO disconnected jobs.
6343 **-----------------------------------------------
6346 ** Look for a disconnected job.
6349 while (cp && cp->host_status != HS_DISCONNECT)
6353 ** if there is one, ...
6357 ** wait for reselection
6359 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6364 ** else remove the interrupt.
6367 printf ("%s: queue empty.\n", ncr_name (np));
6368 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6373 OUTB (nc_dcntl, np->rv_dcntl | STD);
6376 /*==========================================================
6379 ** Aquire a control block
6382 **==========================================================
6385 static nccb_p ncr_get_nccb
6386 (ncb_p np, u_long target, u_long lun)
6392 /* Keep our timeout handler out */
6396 ** Lun structure available ?
6399 lp = np->target[target].lp[lun];
6404 ** Look for free CCB
6407 while (cp && cp->magic) {
6413 ** if nothing available, create one.
6417 cp = ncr_alloc_nccb(np, target, lun);
6421 printf("%s: Bogus free cp found\n", ncr_name(np));
6431 /*==========================================================
6434 ** Release one control block
6437 **==========================================================
6440 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6446 assert (cp != NULL);
6448 cp -> host_status = HS_IDLE;
6452 /*==========================================================
6455 ** Allocation of resources for Targets/Luns/Tags.
6458 **==========================================================
6462 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6468 assert (np != NULL);
6470 if (target>=MAX_TARGET) return(NULL);
6471 if (lun >=MAX_LUN ) return(NULL);
6473 tp=&np->target[target];
6475 if (!tp->jump_tcb.l_cmd) {
6480 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6481 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6484 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6485 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6486 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6488 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6489 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6490 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6492 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6493 (offsetof(struct tcb ,tinfo)
6494 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6495 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6496 (offsetof(struct tcb, tinfo)
6497 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6499 tp->call_lun.l_cmd = (SCR_CALL);
6500 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6502 tp->jump_lcb.l_cmd = (SCR_JUMP);
6503 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6504 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6508 ** Logic unit control block
6515 lp = (lcb_p) malloc (sizeof (struct lcb), M_DEVBUF,
6517 if (!lp) return(NULL);
6522 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6523 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6525 lp->call_tag.l_cmd = (SCR_CALL);
6526 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6528 lp->jump_nccb.l_cmd = (SCR_JUMP);
6529 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6534 ** Chain into LUN list
6536 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6544 cp = (nccb_p) malloc (sizeof (struct nccb), M_DEVBUF, M_NOWAIT|M_ZERO);
6549 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6550 printf ("new nccb @%p.\n", cp);
6554 ** Fill in physical addresses
6557 cp->p_nccb = vtophys (cp);
6560 ** Chain into reselect list
6562 cp->jump_nccb.l_cmd = SCR_JUMP;
6563 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6564 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6565 cp->call_tmp.l_cmd = SCR_CALL;
6566 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6569 ** Chain into wakeup list
6571 cp->link_nccb = np->link_nccb;
6575 ** Chain into CCB list
6577 cp->next_nccb = lp->next_nccb;
6583 /*==========================================================
6586 ** Build Scatter Gather Block
6589 **==========================================================
6591 ** The transfer area may be scattered among
6592 ** several non adjacent physical pages.
6594 ** We may use MAX_SCATTER blocks.
6596 **----------------------------------------------------------
6599 static int ncr_scatter
6600 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6602 u_long paddr, pnext;
6604 u_short segment = 0;
6605 u_long segsize, segaddr;
6606 u_long size, csize = 0;
6607 u_long chunk = MAX_SIZE;
6610 bzero (&phys->data, sizeof (phys->data));
6611 if (!datalen) return (0);
6613 paddr = vtophys (vaddr);
6616 ** insert extra break points at a distance of chunk.
6617 ** We try to reduce the number of interrupts caused
6618 ** by unexpected phase changes due to disconnects.
6619 ** A typical harddisk may disconnect before ANY block.
6620 ** If we wanted to avoid unexpected phase changes at all
6621 ** we had to use a break point every 512 bytes.
6622 ** Of course the number of scatter/gather blocks is
6626 free = MAX_SCATTER - 1;
6628 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6631 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6634 if(DEBUG_FLAGS & DEBUG_SCATTER)
6635 printf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6636 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6639 ** Build data descriptors.
6641 while (datalen && (segment < MAX_SCATTER)) {
6644 ** this segment is empty
6650 if (!csize) csize = chunk;
6652 while ((datalen) && (paddr == pnext) && (csize)) {
6655 ** continue this segment
6657 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6663 size = pnext - paddr; /* page size */
6664 if (size > datalen) size = datalen; /* data size */
6665 if (size > csize ) size = csize ; /* chunksize */
6671 paddr = vtophys (vaddr);
6674 if(DEBUG_FLAGS & DEBUG_SCATTER)
6675 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6679 (unsigned) datalen);
6681 phys->data[segment].addr = segaddr;
6682 phys->data[segment].size = segsize;
6687 printf("ncr?: scatter/gather failed (residue=%d).\n",
6688 (unsigned) datalen);
6695 /*==========================================================
6698 ** Test the pci bus snoop logic :-(
6700 ** Has to be called with interrupts disabled.
6703 **==========================================================
6706 #ifndef NCR_IOMAPPED
6707 static int ncr_regtest (struct ncb* np)
6709 register volatile u_int32_t data;
6711 ** ncr registers may NOT be cached.
6712 ** write 0xffffffff to a read only register area,
6713 ** and try to read it back.
6716 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6717 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6719 if (data == 0xffffffff) {
6721 if ((data & 0xe2f0fffd) != 0x02000080) {
6723 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6731 static int ncr_snooptest (struct ncb* np)
6733 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6735 #ifndef NCR_IOMAPPED
6736 err |= ncr_regtest (np);
6737 if (err) return (err);
6742 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6746 ** Set memory and register.
6748 ncr_cache = host_wr;
6749 OUTL (nc_temp, ncr_wr);
6751 ** Start script (exchange values)
6755 ** Wait 'til done (with timeout)
6757 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6758 if (INB(nc_istat) & (INTF|SIP|DIP))
6761 ** Save termination position.
6765 ** Read memory and register.
6767 host_rd = ncr_cache;
6768 ncr_rd = INL (nc_scratcha);
6769 ncr_bk = INL (nc_temp);
6773 OUTB (nc_istat, SRST);
6775 OUTB (nc_istat, 0 );
6777 ** check for timeout
6779 if (i>=NCR_SNOOP_TIMEOUT) {
6780 printf ("CACHE TEST FAILED: timeout.\n");
6784 ** Check termination position.
6786 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6787 printf ("CACHE TEST FAILED: script execution failed.\n");
6788 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6789 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6790 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6796 if (host_wr != ncr_rd) {
6797 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6798 (int) host_wr, (int) ncr_rd);
6801 if (host_rd != ncr_wr) {
6802 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6803 (int) ncr_wr, (int) host_rd);
6806 if (ncr_bk != ncr_wr) {
6807 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6808 (int) ncr_wr, (int) ncr_bk);
6814 /*==========================================================
6817 ** Profiling the drivers and targets performance.
6820 **==========================================================
6824 ** Compute the difference in milliseconds.
6827 static int ncr_delta (int *from, int *to)
6829 if (!from) return (-1);
6830 if (!to) return (-2);
6831 return ((to - from) * 1000 / hz);
6834 #define PROFILE cp->phys.header.stamp
6835 static void ncb_profile (ncb_p np, nccb_p cp)
6837 int co, da, st, en, di, se, post,work,disc;
6840 PROFILE.end = ticks;
6842 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6843 if (st<0) return; /* status not reached */
6845 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6846 if (da<0) return; /* No data transfer phase */
6848 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6849 if (co<0) return; /* command not executed */
6851 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6852 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6853 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6857 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6860 if (di>=0) disc = se-di; else disc = 0;
6862 work = (st - co) - disc;
6864 diff = (np->disc_phys - np->disc_ref) & 0xff;
6865 np->disc_ref += diff;
6867 np->profile.num_trans += 1;
6869 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6870 np->profile.num_disc += diff;
6871 np->profile.ms_setup += co;
6872 np->profile.ms_data += work;
6873 np->profile.ms_disc += disc;
6874 np->profile.ms_post += post;
6878 /*==========================================================
6880 ** Determine the ncr's clock frequency.
6881 ** This is essential for the negotiation
6882 ** of the synchronous transfer rate.
6884 **==========================================================
6886 ** Note: we have to return the correct value.
6887 ** THERE IS NO SAVE DEFAULT VALUE.
6889 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6890 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6891 ** do not have a clock doubler and so are provided with a
6892 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6893 ** and so should be delivered with a 40 MHz clock.
6894 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6895 ** and provide a clock quadrupler (160 Mhz). The code below
6896 ** tries to deal as cleverly as possible with all this stuff.
6898 **----------------------------------------------------------
6902 * Select NCR SCSI clock frequency
6904 static void ncr_selectclock(ncb_p np, u_char scntl3)
6906 if (np->multiplier < 2) {
6907 OUTB(nc_scntl3, scntl3);
6911 if (bootverbose >= 2)
6912 printf ("%s: enabling clock multiplier\n", ncr_name(np));
6914 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6915 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6917 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6920 printf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6921 } else /* Wait 20 micro-seconds for doubler */
6923 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6924 OUTB(nc_scntl3, scntl3);
6925 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6926 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6930 * calculate NCR SCSI clock frequency (in KHz)
6933 ncrgetfreq (ncb_p np, int gen)
6937 * Measure GEN timer delay in order
6938 * to calculate SCSI clock frequency
6940 * This code will never execute too
6941 * many loop iterations (if DELAY is
6942 * reasonably correct). It could get
6943 * too low a delay (too high a freq.)
6944 * if the CPU is slow executing the
6945 * loop for some reason (an NMI, for
6946 * example). For this reason we will
6947 * if multiple measurements are to be
6948 * performed trust the higher delay
6949 * (lower frequency returned).
6951 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6952 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6953 (void) INW (nc_sist); /* clear pending scsi interrupt */
6954 OUTB (nc_dien , 0); /* mask all dma interrupts */
6955 (void) INW (nc_sist); /* another one, just to be sure :) */
6956 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6957 OUTB (nc_stime1, 0); /* disable general purpose timer */
6958 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6959 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6960 DELAY(1000); /* count ms */
6961 OUTB (nc_stime1, 0); /* disable general purpose timer */
6962 OUTB (nc_scntl3, 0);
6964 * Set prescaler to divide by whatever "0" means.
6965 * "0" ought to choose divide by 2, but appears
6966 * to set divide by 3.5 mode in my 53c810 ...
6968 OUTB (nc_scntl3, 0);
6970 if (bootverbose >= 2)
6971 printf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6973 * adjust for prescaler, and convert into KHz
6975 return ms ? ((1 << gen) * 4440) / ms : 0;
6978 static void ncr_getclock (ncb_p np, u_char multiplier)
6980 unsigned char scntl3;
6981 unsigned char stest1;
6982 scntl3 = INB(nc_scntl3);
6983 stest1 = INB(nc_stest1);
6987 if (multiplier > 1) {
6988 np->multiplier = multiplier;
6989 np->clock_khz = 40000 * multiplier;
6991 if ((scntl3 & 7) == 0) {
6993 /* throw away first result */
6994 (void) ncrgetfreq (np, 11);
6995 f1 = ncrgetfreq (np, 11);
6996 f2 = ncrgetfreq (np, 11);
6998 if (bootverbose >= 2)
6999 printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
7000 if (f1 > f2) f1 = f2; /* trust lower result */
7002 scntl3 = 5; /* >45Mhz: assume 80MHz */
7004 scntl3 = 3; /* <45Mhz: assume 40MHz */
7007 else if ((scntl3 & 7) == 5)
7008 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7012 /*=========================================================================*/
7014 #ifdef NCR_TEKRAM_EEPROM
7016 struct tekram_eeprom_dev {
7018 #define TKR_PARCHK 0x01
7019 #define TKR_TRYSYNC 0x02
7020 #define TKR_ENDISC 0x04
7021 #define TKR_STARTUNIT 0x08
7022 #define TKR_USETAGS 0x10
7023 #define TKR_TRYWIDE 0x20
7024 u_char syncparam; /* max. sync transfer rate (table ?) */
7030 struct tekram_eeprom {
7031 struct tekram_eeprom_dev
7035 #define TKR_ADPT_GT2DRV 0x01
7036 #define TKR_ADPT_GT1GB 0x02
7037 #define TKR_ADPT_RSTBUS 0x04
7038 #define TKR_ADPT_ACTNEG 0x08
7039 #define TKR_ADPT_NOSEEK 0x10
7040 #define TKR_ADPT_MORLUN 0x20
7041 u_char delay; /* unit ? ( table ??? ) */
7042 u_char tags; /* use 4 times as many ... */
7047 tekram_write_bit (ncb_p np, int bit)
7049 u_char val = 0x10 + ((bit & 1) << 1);
7052 OUTB (nc_gpreg, val);
7054 OUTB (nc_gpreg, val | 0x04);
7056 OUTB (nc_gpreg, val);
7061 tekram_read_bit (ncb_p np)
7063 OUTB (nc_gpreg, 0x10);
7065 OUTB (nc_gpreg, 0x14);
7067 return INB (nc_gpreg) & 1;
7071 read_tekram_eeprom_reg (ncb_p np, int reg)
7075 int cmd = 0x80 | reg;
7077 OUTB (nc_gpreg, 0x10);
7079 tekram_write_bit (np, 1);
7080 for (bit = 7; bit >= 0; bit--)
7082 tekram_write_bit (np, cmd >> bit);
7085 for (bit = 0; bit < 16; bit++)
7088 result |= tekram_read_bit (np);
7091 OUTB (nc_gpreg, 0x00);
7096 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7098 u_short *p = (u_short *) buffer;
7102 if (INB (nc_gpcntl) != 0x09)
7106 for (i = 0; i < 64; i++)
7109 if((i&0x0f) == 0) printf ("%02x:", i*2);
7110 val = read_tekram_eeprom_reg (np, i);
7114 if((i&0x01) == 0x00) printf (" ");
7115 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7116 if((i&0x0f) == 0x0f) printf ("\n");
7118 printf ("Sum = %04x\n", sum);
7119 return sum == 0x1234;
7121 #endif /* NCR_TEKRAM_EEPROM */
7123 static device_method_t ncr_methods[] = {
7124 /* Device interface */
7125 DEVMETHOD(device_probe, ncr_probe),
7126 DEVMETHOD(device_attach, ncr_attach),
7131 static driver_t ncr_driver = {
7137 static devclass_t ncr_devclass;
7139 DRIVER_MODULE(ncr, pci, ncr_driver, ncr_devclass, 0, 0);
7140 MODULE_DEPEND(ncr, cam, 1, 1, 1);
7141 MODULE_DEPEND(ncr, pci, 1, 1, 1);
7143 /*=========================================================================*/
7144 #endif /* _KERNEL */