1 /**************************************************************************
4 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **-------------------------------------------------------------------------
8 ** Written for 386bsd and FreeBSD by
9 ** Wolfgang Stanglmeier <wolf@cologne.de>
10 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **-------------------------------------------------------------------------
14 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
16 ** Redistribution and use in source and binary forms, with or without
17 ** modification, are permitted provided that the following conditions
19 ** 1. Redistributions of source code must retain the above copyright
20 ** notice, this list of conditions and the following disclaimer.
21 ** 2. Redistributions in binary form must reproduce the above copyright
22 ** notice, this list of conditions and the following disclaimer in the
23 ** documentation and/or other materials provided with the distribution.
24 ** 3. The name of the author may not be used to endorse or promote products
25 ** derived from this software without specific prior written permission.
27 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
28 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
31 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
32 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
36 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 ***************************************************************************
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
45 #define NCR_DATE "pl30 98/1/1"
47 #define NCR_VERSION (2)
48 #define MAX_UNITS (16)
50 #define NCR_GETCC_WITHMSG
52 #if defined (__FreeBSD__) && defined(_KERNEL)
56 /*==========================================================
58 ** Configuration and Debugging
60 ** May be overwritten in <arch/conf/xxxx>
62 **==========================================================
66 ** SCSI address of this device.
67 ** The boot routines should have set it.
71 #ifndef SCSI_NCR_MYADDR
72 #define SCSI_NCR_MYADDR (7)
73 #endif /* SCSI_NCR_MYADDR */
76 ** The default synchronous period factor
78 ** If maximum synchronous frequency is defined, use it instead.
81 #ifndef SCSI_NCR_MAX_SYNC
83 #ifndef SCSI_NCR_DFLT_SYNC
84 #define SCSI_NCR_DFLT_SYNC (12)
85 #endif /* SCSI_NCR_DFLT_SYNC */
89 #if SCSI_NCR_MAX_SYNC == 0
90 #define SCSI_NCR_DFLT_SYNC 0
92 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
98 ** The minimal asynchronous pre-scaler period (ns)
102 #ifndef SCSI_NCR_MIN_ASYNC
103 #define SCSI_NCR_MIN_ASYNC (40)
104 #endif /* SCSI_NCR_MIN_ASYNC */
107 ** The maximal bus with (in log2 byte)
108 ** (0=8 bit, 1=16 bit)
111 #ifndef SCSI_NCR_MAX_WIDE
112 #define SCSI_NCR_MAX_WIDE (1)
113 #endif /* SCSI_NCR_MAX_WIDE */
115 /*==========================================================
117 ** Configuration and Debugging
119 **==========================================================
123 ** Number of targets supported by the driver.
124 ** n permits target numbers 0..n-1.
125 ** Default is 7, meaning targets #0..#6.
129 #define MAX_TARGET (16)
132 ** Number of logic units supported by the driver.
133 ** n enables logic unit numbers 0..n-1.
134 ** The common SCSI devices require only
135 ** one lun, so take 1 as the default.
143 ** The maximum number of jobs scheduled for starting.
144 ** There should be one slot per target, and one slot
145 ** for each tag of each target in use.
148 #define MAX_START (256)
151 ** The maximum number of segments a transfer is split into.
154 #define MAX_SCATTER (33)
157 ** The maximum transfer length (should be >= 64k).
158 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
161 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
167 #define NCR_SNOOP_TIMEOUT (1000000)
169 /*==========================================================
173 **==========================================================
176 #include <sys/param.h>
177 #include <sys/time.h>
180 #include <sys/systm.h>
181 #include <sys/malloc.h>
183 #include <sys/kernel.h>
184 #include <sys/module.h>
185 #include <sys/sysctl.h>
187 #include <machine/md_var.h>
188 #include <machine/bus.h>
189 #include <machine/resource.h>
190 #include <sys/rman.h>
193 #include <vm/vm_extern.h>
196 #include <dev/pci/pcivar.h>
197 #include <dev/pci/pcireg.h>
198 #include <pci/ncrreg.h>
201 #include <cam/cam_ccb.h>
202 #include <cam/cam_sim.h>
203 #include <cam/cam_xpt_sim.h>
204 #include <cam/cam_debug.h>
206 #include <cam/scsi/scsi_all.h>
207 #include <cam/scsi/scsi_message.h>
209 /*==========================================================
213 **==========================================================
216 #define DEBUG_ALLOC (0x0001)
217 #define DEBUG_PHASE (0x0002)
218 #define DEBUG_POLL (0x0004)
219 #define DEBUG_QUEUE (0x0008)
220 #define DEBUG_RESULT (0x0010)
221 #define DEBUG_SCATTER (0x0020)
222 #define DEBUG_SCRIPT (0x0040)
223 #define DEBUG_TINY (0x0080)
224 #define DEBUG_TIMING (0x0100)
225 #define DEBUG_NEGO (0x0200)
226 #define DEBUG_TAGS (0x0400)
227 #define DEBUG_FREEZE (0x0800)
228 #define DEBUG_RESTART (0x1000)
231 ** Enable/Disable debug messages.
232 ** Can be changed at runtime too.
234 #ifdef SCSI_NCR_DEBUG
235 #define DEBUG_FLAGS ncr_debug
236 #else /* SCSI_NCR_DEBUG */
237 #define SCSI_NCR_DEBUG 0
238 #define DEBUG_FLAGS 0
239 #endif /* SCSI_NCR_DEBUG */
243 /*==========================================================
247 **==========================================================
249 ** modified copy from 386bsd:/usr/include/sys/assert.h
251 **----------------------------------------------------------
255 #define assert(expression) { \
256 if (!(expression)) { \
257 (void)printf("assertion \"%s\" failed: " \
258 "file \"%s\", line %d\n", \
259 #expression, __FILE__, __LINE__); \
264 #define assert(expression) { \
265 if (!(expression)) { \
266 (void)printf("assertion \"%s\" failed: " \
267 "file \"%s\", line %d\n", \
268 #expression, __FILE__, __LINE__); \
273 /*==========================================================
275 ** Access to the controller chip.
277 **==========================================================
283 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
286 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
287 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
288 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
290 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
291 offsetof(struct ncr_reg, r), val)
292 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
293 offsetof(struct ncr_reg, r), val)
294 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
295 offsetof(struct ncr_reg, r), val)
296 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
298 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
299 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
300 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
302 #define READSCRIPT_OFF(base, off) \
303 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
304 bus_space_read_4(np->bst2, np->bsh2, off))
306 #define WRITESCRIPT_OFF(base, off, val) \
309 *((volatile u_int32_t *) \
310 ((volatile char *)base + (off))) = (val); \
312 bus_space_write_4(np->bst2, np->bsh2, off, val); \
315 #define READSCRIPT(r) \
316 READSCRIPT_OFF(np->script, offsetof(struct script, r))
318 #define WRITESCRIPT(r, val) \
319 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
322 ** Set bit field ON, OFF
325 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
326 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
327 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
328 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
329 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
330 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
332 /*==========================================================
334 ** Command control block states.
336 **==========================================================
341 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
342 #define HS_DISCONNECT (3) /* Disconnected by target */
344 #define HS_COMPLETE (4)
345 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
346 #define HS_RESET (6) /* SCSI reset */
347 #define HS_ABORTED (7) /* Transfer aborted */
348 #define HS_TIMEOUT (8) /* Software timeout */
349 #define HS_FAIL (9) /* SCSI or PCI bus errors */
350 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
351 #define HS_STALL (11) /* QUEUE FULL or BUSY */
353 #define HS_DONEMASK (0xfc)
355 /*==========================================================
357 ** Software Interrupt Codes
359 **==========================================================
362 #define SIR_SENSE_RESTART (1)
363 #define SIR_SENSE_FAILED (2)
364 #define SIR_STALL_RESTART (3)
365 #define SIR_STALL_QUEUE (4)
366 #define SIR_NEGO_SYNC (5)
367 #define SIR_NEGO_WIDE (6)
368 #define SIR_NEGO_FAILED (7)
369 #define SIR_NEGO_PROTO (8)
370 #define SIR_REJECT_RECEIVED (9)
371 #define SIR_REJECT_SENT (10)
372 #define SIR_IGN_RESIDUE (11)
373 #define SIR_MISSING_SAVE (12)
376 /*==========================================================
378 ** Extended error codes.
379 ** xerr_status field of struct nccb.
381 **==========================================================
385 #define XE_EXTRA_DATA (1) /* unexpected data phase */
386 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
388 /*==========================================================
390 ** Negotiation status.
391 ** nego_status field of struct nccb.
393 **==========================================================
399 /*==========================================================
401 ** XXX These are no longer used. Remove once the
402 ** script is updated.
403 ** "Special features" of targets.
404 ** quirks field of struct tcb.
405 ** actualquirks field of struct nccb.
407 **==========================================================
410 #define QUIRK_AUTOSAVE (0x01)
411 #define QUIRK_NOMSG (0x02)
412 #define QUIRK_NOSYNC (0x10)
413 #define QUIRK_NOWIDE16 (0x20)
414 #define QUIRK_NOTAGS (0x40)
415 #define QUIRK_UPDATE (0x80)
417 /*==========================================================
421 **==========================================================
424 #define CCB_MAGIC (0xf2691ad2)
425 #define MAX_TAGS (32) /* hard limit */
427 /*==========================================================
431 **==========================================================
434 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
436 /*==========================================================
438 ** Declaration of structs.
440 **==========================================================
449 typedef struct ncb * ncb_p;
450 typedef struct tcb * tcb_p;
451 typedef struct lcb * lcb_p;
452 typedef struct nccb * nccb_p;
466 #define UC_SETSYNC 10
467 #define UC_SETTAGS 11
468 #define UC_SETDEBUG 12
469 #define UC_SETORDER 13
470 #define UC_SETWIDE 14
471 #define UC_SETFLAG 15
473 #define UF_TRACE (0x01)
475 /*---------------------------------------
477 ** Timestamps for profiling
479 **---------------------------------------
482 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
496 ** profiling data (per device)
512 /*==========================================================
514 ** Declaration of structs: target control block
516 **==========================================================
519 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
520 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
521 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
522 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
524 struct ncr_transinfo {
530 struct ncr_target_tinfo {
531 /* Hardware version of our sync settings */
533 #define NCR_CUR_DISCENB 0x01
534 #define NCR_CUR_TAGENB 0x02
535 #define NCR_USR_DISCENB 0x04
536 #define NCR_USR_TAGENB 0x08
538 struct ncr_transinfo current;
539 struct ncr_transinfo goal;
540 struct ncr_transinfo user;
541 /* Hardware version of our wide settings */
547 ** during reselection the ncr jumps to this point
548 ** with SFBR set to the encoded target number
550 ** if it's not this target, jump to the next.
552 ** JUMP IF (SFBR != #target#)
556 struct link jump_tcb;
559 ** load the actual values for the sxfer and the scntl3
560 ** register (sync/wide mode).
563 ** @(sval field of this tcb)
566 ** @(wval field of this tcb)
567 ** @(scntl3 register)
573 ** if next message is "identify"
574 ** then load the message to SFBR,
575 ** else load 0 to SFBR.
581 struct link call_lun;
584 ** now look for the right lun.
587 ** @(first nccb of this lun)
590 struct link jump_lcb;
593 ** pointer to interrupted getcc nccb
599 ** pointer to nccb used for negotiating.
600 ** Avoid to start a nego for all queued commands
601 ** when tagged command queuing is enabled.
614 ** user settable limits for sync transfer
615 ** and tagged commands.
618 struct ncr_target_tinfo tinfo;
621 ** the lcb's of this tcb
627 /*==========================================================
629 ** Declaration of structs: lun control block
631 **==========================================================
636 ** during reselection the ncr jumps to this point
637 ** with SFBR set to the "Identify" message.
638 ** if it's not this lun, jump to the next.
640 ** JUMP IF (SFBR != #lun#)
641 ** @(next lcb of this target)
644 struct link jump_lcb;
647 ** if next message is "simple tag",
648 ** then load the tag to SFBR,
649 ** else load 0 to SFBR.
655 struct link call_tag;
658 ** now look for the right nccb.
661 ** @(first nccb of this lun)
664 struct link jump_nccb;
667 ** start of the nccb chain
673 ** Control of tagged queueing
683 /*==========================================================
685 ** Declaration of structs: COMMAND control block
687 **==========================================================
689 ** This substructure is copied from the nccb to a
690 ** global address after selection (or reselection)
691 ** and copied back before disconnect.
693 ** These fields are accessible to the script processor.
695 **----------------------------------------------------------
700 ** Execution of a nccb starts at this point.
701 ** It's a jump to the "SELECT" label
704 ** After successful selection the script
705 ** processor overwrites it with a jump to
706 ** the IDLE label of the script.
712 ** Saved data pointer.
713 ** Points to the position in the script
714 ** responsible for the actual transfer
716 ** It's written after reception of a
717 ** "SAVE_DATA_POINTER" message.
718 ** The goalpointer points after
719 ** the last transfer command.
727 ** The virtual address of the nccb
728 ** containing this header.
734 ** space for some timestamps to gather
735 ** profiling data about devices and this driver.
748 ** The status bytes are used by the host and the script processor.
750 ** The first four byte are copied to the scratchb register
751 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
752 ** and copied back just after disconnecting.
753 ** Inside the script the XX_REG are used.
755 ** The last four bytes are used inside the script by "COPY" commands.
756 ** Because source and destination must have the same alignment
757 ** in a longword, the fields HAVE to be at the choosen offsets.
758 ** xerr_st (4) 0 (0x34) scratcha
759 ** sync_st (5) 1 (0x05) sxfer
760 ** wide_st (7) 3 (0x03) scntl3
764 ** First four bytes (script)
768 #define HS_PRT nc_scr1
773 ** First four bytes (host)
775 #define actualquirks phys.header.status[0]
776 #define host_status phys.header.status[1]
777 #define s_status phys.header.status[2]
778 #define parity_status phys.header.status[3]
781 ** Last four bytes (script)
783 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
784 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
785 #define nego_st header.status[6]
786 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
789 ** Last four bytes (host)
791 #define xerr_status phys.xerr_st
792 #define sync_status phys.sync_st
793 #define nego_status phys.nego_st
794 #define wide_status phys.wide_st
796 /*==========================================================
798 ** Declaration of structs: Data structure block
800 **==========================================================
802 ** During execution of a nccb by the script processor,
803 ** the DSA (data structure address) register points
804 ** to this substructure of the nccb.
805 ** This substructure contains the header with
806 ** the script-processor-changable data and
807 ** data blocks for the indirect move commands.
809 **----------------------------------------------------------
816 ** Has to be the first entry,
817 ** because it's jumped to by the
824 ** Table data for Script
827 struct scr_tblsel select;
828 struct scr_tblmove smsg ;
829 struct scr_tblmove smsg2 ;
830 struct scr_tblmove cmd ;
831 struct scr_tblmove scmd ;
832 struct scr_tblmove sense ;
833 struct scr_tblmove data [MAX_SCATTER];
836 /*==========================================================
838 ** Declaration of structs: Command control block.
840 **==========================================================
842 ** During execution of a nccb by the script processor,
843 ** the DSA (data structure address) register points
844 ** to this substructure of the nccb.
845 ** This substructure contains the header with
846 ** the script-processor-changable data and then
847 ** data blocks for the indirect move commands.
849 **----------------------------------------------------------
855 ** This filler ensures that the global header is
856 ** cache line size aligned.
861 ** during reselection the ncr jumps to this point.
862 ** If a "SIMPLE_TAG" message was received,
863 ** then SFBR is set to the tag.
864 ** else SFBR is set to 0
865 ** If looking for another tag, jump to the next nccb.
867 ** JUMP IF (SFBR != #TAG#)
868 ** @(next nccb of this lun)
871 struct link jump_nccb;
874 ** After execution of this call, the return address
875 ** (in the TEMP register) points to the following
876 ** data structure block.
877 ** So copy it to the DSA register, and start
878 ** processing of this data structure.
884 struct link call_tmp;
887 ** This is the data structure which is
888 ** to be executed by the script processor.
894 ** If a data transfer phase is terminated too early
895 ** (after reception of a message (i.e. DISCONNECT)),
896 ** we have to prepare a mini script to transfer
897 ** the rest of the data.
903 ** The general SCSI driver provides a
904 ** pointer to a control block.
910 ** We prepare a message to be sent after selection,
911 ** and a second one to be sent after getcc selection.
912 ** Contents are IDENTIFY and SIMPLE_TAG.
913 ** While negotiating sync or wide transfer,
914 ** a SDTM or WDTM message is appended.
917 u_char scsi_smsg [8];
918 u_char scsi_smsg2[8];
922 ** Flag is used while looking for a free nccb.
928 ** Physical address of this instance of nccb
934 ** Completion time out for this job.
935 ** It's set to time of start + allowed number of seconds.
941 ** All nccbs of one hostadapter are chained.
947 ** All nccbs of one target/lun are chained.
959 ** Tag for this transfer.
960 ** It's patched into jump_nccb.
961 ** If it's not zero, a SIMPLE_TAG
962 ** message is included in smsg.
968 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
970 /*==========================================================
972 ** Declaration of structs: NCR device descriptor
974 **==========================================================
979 ** The global header.
980 ** Accessible to both the host and the
982 ** We assume it is cache line size aligned.
988 /*-----------------------------------------------
990 **-----------------------------------------------
992 ** During reselection the ncr jumps to this point.
993 ** The SFBR register is loaded with the encoded target id.
995 ** Jump to the first target.
1000 struct link jump_tcb;
1002 /*-----------------------------------------------
1004 **-----------------------------------------------
1006 ** virtual and physical addresses
1007 ** of the 53c810 chip.
1010 struct resource *reg_res;
1011 bus_space_tag_t bst;
1012 bus_space_handle_t bsh;
1015 struct resource *sram_res;
1016 bus_space_tag_t bst2;
1017 bus_space_handle_t bsh2;
1019 struct resource *irq_res;
1023 ** Scripts instance virtual address.
1025 struct script *script;
1026 struct scripth *scripth;
1029 ** Scripts instance physical address.
1035 ** The SCSI address of the host adapter.
1040 ** timing parameters
1042 u_char minsync; /* Minimum sync period factor */
1043 u_char maxsync; /* Maximum sync period factor */
1044 u_char maxoffs; /* Max scsi offset */
1045 u_char clock_divn; /* Number of clock divisors */
1046 u_long clock_khz; /* SCSI clock frequency in KHz */
1047 u_long features; /* Chip features map */
1048 u_char multiplier; /* Clock multiplier (1,2,4) */
1050 u_char maxburst; /* log base 2 of dwords burst */
1053 ** BIOS supplied PCI bus options
1064 /*-----------------------------------------------
1065 ** CAM SIM information for this instance
1066 **-----------------------------------------------
1069 struct cam_sim *sim;
1070 struct cam_path *path;
1072 /*-----------------------------------------------
1074 **-----------------------------------------------
1076 ** Commands from user
1083 struct tcb target[MAX_TARGET];
1088 u_int32_t squeue [MAX_START];
1098 struct callout_handle timeout_ch;
1100 /*-----------------------------------------------
1101 ** Debug and profiling
1102 **-----------------------------------------------
1106 struct ncr_reg regdump;
1112 struct profile profile;
1117 ** Head of list of all nccbs for this controller.
1123 ** Should be longword aligned,
1124 ** because they're written with a
1125 ** COPY script command.
1132 ** Buffer for STATUS_IN phase.
1137 ** controller chip dependent maximal transfer width.
1143 ** address of the ncr control registers in io space
1149 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1150 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1152 /*==========================================================
1155 ** Script for NCR-Processor.
1157 ** Use ncr_script_fill() to create the variable parts.
1158 ** Use ncr_script_copy_and_bind() to make a copy and
1159 ** bind to physical addresses.
1162 **==========================================================
1164 ** We have to know the offsets of all labels before
1165 ** we reach them (for forward jumps).
1166 ** Therefore we declare a struct here.
1167 ** If you make changes inside the script,
1168 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1170 **----------------------------------------------------------
1174 ** Script fragments which are loaded into the on-board RAM
1175 ** of 825A, 875 and 895 chips.
1181 ncrcmd startpos [ 1];
1186 ncrcmd select [ 18];
1187 ncrcmd prepare [ 4];
1188 ncrcmd loadpos [ 14];
1189 ncrcmd prepare2 [ 24];
1192 ncrcmd dispatch [ 33];
1193 ncrcmd no_data [ 17];
1194 ncrcmd checkatn [ 10];
1195 ncrcmd command [ 15];
1196 ncrcmd status [ 27];
1197 ncrcmd msg_in [ 26];
1198 ncrcmd msg_bad [ 6];
1199 ncrcmd complete [ 13];
1200 ncrcmd cleanup [ 12];
1201 ncrcmd cleanup0 [ 9];
1202 ncrcmd signal [ 12];
1203 ncrcmd save_dp [ 5];
1204 ncrcmd restore_dp [ 5];
1205 ncrcmd disconnect [ 12];
1206 ncrcmd disconnect0 [ 5];
1207 ncrcmd disconnect1 [ 23];
1208 ncrcmd msg_out [ 9];
1209 ncrcmd msg_out_done [ 7];
1210 ncrcmd badgetcc [ 6];
1211 ncrcmd reselect [ 8];
1212 ncrcmd reselect1 [ 8];
1213 ncrcmd reselect2 [ 8];
1214 ncrcmd resel_tmp [ 5];
1215 ncrcmd resel_lun [ 18];
1216 ncrcmd resel_tag [ 24];
1217 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1218 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1222 ** Script fragments which stay in main memory for all chips.
1225 ncrcmd tryloop [MAX_START*5+2];
1226 ncrcmd msg_parity [ 6];
1227 ncrcmd msg_reject [ 8];
1228 ncrcmd msg_ign_residue [ 32];
1229 ncrcmd msg_extended [ 18];
1230 ncrcmd msg_ext_2 [ 18];
1231 ncrcmd msg_wdtr [ 27];
1232 ncrcmd msg_ext_3 [ 18];
1233 ncrcmd msg_sdtr [ 27];
1234 ncrcmd msg_out_abort [ 10];
1237 #ifdef NCR_GETCC_WITHMSG
1238 ncrcmd getcc2 [ 29];
1240 ncrcmd getcc2 [ 14];
1243 ncrcmd aborttag [ 4];
1245 ncrcmd snooptest [ 9];
1246 ncrcmd snoopend [ 2];
1249 /*==========================================================
1252 ** Function headers.
1255 **==========================================================
1259 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1260 static void ncr_complete (ncb_p np, nccb_p cp);
1261 static int ncr_delta (int * from, int * to);
1262 static void ncr_exception (ncb_p np);
1263 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1264 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1265 static void ncr_selectclock (ncb_p np, u_char scntl3);
1266 static void ncr_getclock (ncb_p np, u_char multiplier);
1267 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1269 static u_int32_t ncr_info (int unit);
1271 static void ncr_init (ncb_p np, char * msg, u_long code);
1272 static void ncr_intr (void *vnp);
1273 static void ncr_int_ma (ncb_p np, u_char dstat);
1274 static void ncr_int_sir (ncb_p np);
1275 static void ncr_int_sto (ncb_p np);
1277 static void ncr_min_phys (struct buf *bp);
1279 static void ncr_poll (struct cam_sim *sim);
1280 static void ncb_profile (ncb_p np, nccb_p cp);
1281 static void ncr_script_copy_and_bind
1282 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1283 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1284 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1286 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1288 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1290 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1291 static int ncr_show_msg (u_char * msg);
1292 static int ncr_snooptest (ncb_p np);
1293 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1294 static void ncr_timeout (void *arg);
1295 static void ncr_wakeup (ncb_p np, u_long code);
1297 static int ncr_probe (device_t dev);
1298 static int ncr_attach (device_t dev);
1300 #endif /* _KERNEL */
1302 /*==========================================================
1305 ** Global static data.
1308 **==========================================================
1311 static const u_long ncr_version = NCR_VERSION * 11
1312 + (u_long) sizeof (struct ncb) * 7
1313 + (u_long) sizeof (struct nccb) * 5
1314 + (u_long) sizeof (struct lcb) * 3
1315 + (u_long) sizeof (struct tcb) * 2;
1319 static int ncr_debug = SCSI_NCR_DEBUG;
1320 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1322 static int ncr_cache; /* to be aligned _NOT_ static */
1324 /*==========================================================
1327 ** Global static data: auto configure
1330 **==========================================================
1333 #define NCR_810_ID (0x00011000ul)
1334 #define NCR_815_ID (0x00041000ul)
1335 #define NCR_820_ID (0x00021000ul)
1336 #define NCR_825_ID (0x00031000ul)
1337 #define NCR_860_ID (0x00061000ul)
1338 #define NCR_875_ID (0x000f1000ul)
1339 #define NCR_875_ID2 (0x008f1000ul)
1340 #define NCR_885_ID (0x000d1000ul)
1341 #define NCR_895_ID (0x000c1000ul)
1342 #define NCR_896_ID (0x000b1000ul)
1343 #define NCR_895A_ID (0x00121000ul)
1344 #define NCR_1510D_ID (0x000a1000ul)
1347 static char *ncr_name (ncb_p np)
1349 static char name[10];
1350 snprintf(name, sizeof(name), "ncr%d", np->unit);
1354 /*==========================================================
1357 ** Scripts for NCR-Processor.
1359 ** Use ncr_script_bind for binding to physical addresses.
1362 **==========================================================
1364 ** NADDR generates a reference to a field of the controller data.
1365 ** PADDR generates a reference to another part of the script.
1366 ** RADDR generates a reference to a script processor register.
1367 ** FADDR generates a reference to a script processor register
1370 **----------------------------------------------------------
1373 #define RELOC_SOFTC 0x40000000
1374 #define RELOC_LABEL 0x50000000
1375 #define RELOC_REGISTER 0x60000000
1376 #define RELOC_KVAR 0x70000000
1377 #define RELOC_LABELH 0x80000000
1378 #define RELOC_MASK 0xf0000000
1380 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1381 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1382 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1383 #define RADDR(label) (RELOC_REGISTER | REG(label))
1384 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1385 #define KVAR(which) (RELOC_KVAR | (which))
1387 #define KVAR_SECOND (0)
1388 #define KVAR_TICKS (1)
1389 #define KVAR_NCR_CACHE (2)
1391 #define SCRIPT_KVAR_FIRST (0)
1392 #define SCRIPT_KVAR_LAST (3)
1395 * Kernel variables referenced in the scripts.
1396 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1398 static void *script_kvars[] =
1399 { &time_second, &ticks, &ncr_cache };
1401 static struct script script0 = {
1402 /*--------------------------< START >-----------------------*/ {
1404 ** Claim to be still alive ...
1406 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1410 ** Make data structure address invalid.
1413 SCR_LOAD_REG (dsa, 0xff),
1415 SCR_FROM_REG (ctest2),
1417 }/*-------------------------< START0 >----------------------*/,{
1419 ** Hook for interrupted GetConditionCode.
1420 ** Will be patched to ... IFTRUE by
1421 ** the interrupt handler.
1423 SCR_INT ^ IFFALSE (0),
1426 }/*-------------------------< START1 >----------------------*/,{
1428 ** Hook for stalled start queue.
1429 ** Will be patched to IFTRUE by the interrupt handler.
1431 SCR_INT ^ IFFALSE (0),
1434 ** Then jump to a certain point in tryloop.
1435 ** Due to the lack of indirect addressing the code
1436 ** is self modifying here.
1439 }/*-------------------------< STARTPOS >--------------------*/,{
1442 }/*-------------------------< TRYSEL >----------------------*/,{
1445 ** DSA: Address of a Data Structure
1446 ** or Address of the IDLE-Label.
1448 ** TEMP: Address of a script, which tries to
1449 ** start the NEXT entry.
1451 ** Save the TEMP register into the SCRATCHA register.
1452 ** Then copy the DSA to TEMP and RETURN.
1453 ** This is kind of an indirect jump.
1454 ** (The script processor has NO stack, so the
1455 ** CALL is actually a jump and link, and the
1456 ** RETURN is an indirect jump.)
1458 ** If the slot was empty, DSA contains the address
1459 ** of the IDLE part of this script. The processor
1460 ** jumps to IDLE and waits for a reselect.
1461 ** It will wake up and try the same slot again
1462 ** after the SIGP bit becomes set by the host.
1464 ** If the slot was not empty, DSA contains
1465 ** the address of the phys-part of a nccb.
1466 ** The processor jumps to this address.
1467 ** phys starts with head,
1468 ** head starts with launch,
1469 ** so actually the processor jumps to
1471 ** If the entry is scheduled for execution,
1472 ** then launch contains a jump to SELECT.
1473 ** If it's not scheduled, it contains a jump to IDLE.
1484 }/*-------------------------< SKIP >------------------------*/,{
1486 ** This entry has been canceled.
1487 ** Next time use the next slot.
1493 ** patch the launch field.
1494 ** should look like an idle process.
1501 }/*-------------------------< SKIP2 >-----------------------*/,{
1505 }/*-------------------------< IDLE >------------------------*/,{
1508 ** Wait for reselect.
1513 }/*-------------------------< SELECT >----------------------*/,{
1515 ** DSA contains the address of a scheduled
1518 ** SCRATCHA contains the address of the script,
1519 ** which starts the next entry.
1521 ** Set Initiator mode.
1523 ** (Target mode is left as an exercise for the reader)
1528 SCR_LOAD_REG (HS_REG, 0xff),
1532 ** And try to select this target.
1534 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1538 ** Now there are 4 possibilities:
1540 ** (1) The ncr looses arbitration.
1541 ** This is ok, because it will try again,
1542 ** when the bus becomes idle.
1543 ** (But beware of the timeout function!)
1545 ** (2) The ncr is reselected.
1546 ** Then the script processor takes the jump
1547 ** to the RESELECT label.
1549 ** (3) The ncr completes the selection.
1550 ** Then it will execute the next statement.
1552 ** (4) There is a selection timeout.
1553 ** Then the ncr should interrupt the host and stop.
1554 ** Unfortunately, it seems to continue execution
1555 ** of the script. But it will fail with an
1556 ** IID-interrupt on the next WHEN.
1559 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1563 ** Send the IDENTIFY and SIMPLE_TAG messages
1564 ** (and the MSG_EXT_SDTR message)
1566 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1567 offsetof (struct dsb, smsg),
1568 #ifdef undef /* XXX better fail than try to deal with this ... */
1569 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1578 ** Selection complete.
1579 ** Next time use the next slot.
1584 }/*-------------------------< PREPARE >----------------------*/,{
1586 ** The ncr doesn't have an indirect load
1587 ** or store command. So we have to
1588 ** copy part of the control block to a
1589 ** fixed place, where we can access it.
1591 ** We patch the address part of a
1592 ** COPY command with the DSA-register.
1598 ** then we do the actual copy.
1600 SCR_COPY (sizeof (struct head)),
1602 ** continued after the next label ...
1605 }/*-------------------------< LOADPOS >---------------------*/,{
1609 ** Mark this nccb as not scheduled.
1613 NADDR (header.launch),
1615 ** Set a time stamp for this selection
1617 SCR_COPY (sizeof (ticks)),
1619 NADDR (header.stamp.select),
1621 ** load the savep (saved pointer) into
1622 ** the TEMP register (actual pointer)
1625 NADDR (header.savep),
1628 ** Initialize the status registers
1631 NADDR (header.status),
1634 }/*-------------------------< PREPARE2 >---------------------*/,{
1636 ** Load the synchronous mode register
1642 ** Load the wide mode and timing register
1648 ** Initialize the msgout buffer with a NOOP message.
1650 SCR_LOAD_REG (scratcha, MSG_NOOP),
1659 ** Message in phase ?
1661 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1664 ** Extended or reject message ?
1666 SCR_FROM_REG (sbdl),
1668 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1670 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1671 PADDRH (msg_reject),
1673 ** normal processing
1677 }/*-------------------------< SETMSG >----------------------*/,{
1683 }/*-------------------------< CLRACK >----------------------*/,{
1685 ** Terminate possible pending message phase.
1690 }/*-----------------------< DISPATCH >----------------------*/,{
1691 SCR_FROM_REG (HS_REG),
1693 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1696 ** remove bogus output signals
1698 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1700 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1702 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1704 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1706 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1708 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1710 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1713 ** Discard one illegal phase byte, if required.
1715 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1720 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1722 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1724 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1726 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1731 }/*-------------------------< NO_DATA >--------------------*/,{
1733 ** The target wants to tranfer too much data
1734 ** or in the wrong direction.
1735 ** Remember that in extended error.
1737 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1743 ** Discard one data byte, if required.
1745 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1747 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1749 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1751 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1754 ** .. and repeat as required.
1760 }/*-------------------------< CHECKATN >--------------------*/,{
1762 ** If AAP (bit 1 of scntl0 register) is set
1763 ** and a parity error is detected,
1764 ** the script processor asserts ATN.
1766 ** The target should switch to a MSG_OUT phase
1767 ** to get the message.
1769 SCR_FROM_REG (socl),
1771 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1776 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1779 ** Prepare a MSG_INITIATOR_DET_ERR message
1780 ** (initiator detected error).
1781 ** The target should retry the transfer.
1783 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1788 }/*-------------------------< COMMAND >--------------------*/,{
1790 ** If this is not a GETCC transfer ...
1792 SCR_FROM_REG (SS_REG),
1794 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1797 ** ... set a timestamp ...
1799 SCR_COPY (sizeof (ticks)),
1801 NADDR (header.stamp.command),
1803 ** ... and send the command
1805 SCR_MOVE_TBL ^ SCR_COMMAND,
1806 offsetof (struct dsb, cmd),
1810 ** Send the GETCC command
1812 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1813 offsetof (struct dsb, scmd),
1817 }/*-------------------------< STATUS >--------------------*/,{
1819 ** set the timestamp.
1821 SCR_COPY (sizeof (ticks)),
1823 NADDR (header.stamp.status),
1825 ** If this is a GETCC transfer,
1827 SCR_FROM_REG (SS_REG),
1829 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1834 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1837 ** Save status to scsi_status.
1838 ** Mark as complete.
1839 ** And wait for disconnect.
1841 SCR_TO_REG (SS_REG),
1843 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1845 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1850 ** If it was no GETCC transfer,
1851 ** save the status to scsi_status.
1853 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1855 SCR_TO_REG (SS_REG),
1858 ** if it was no check condition ...
1860 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1863 ** ... mark as complete.
1865 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1870 }/*-------------------------< MSG_IN >--------------------*/,{
1872 ** Get the first byte of the message
1873 ** and save it to SCRATCHA.
1875 ** The script processor doesn't negate the
1876 ** ACK signal after this transfer.
1878 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1881 ** Check for message parity error.
1883 SCR_TO_REG (scratcha),
1885 SCR_FROM_REG (socl),
1887 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1888 PADDRH (msg_parity),
1889 SCR_FROM_REG (scratcha),
1892 ** Parity was ok, handle this message.
1894 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1896 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1898 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1900 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1902 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1903 PADDRH (msg_extended),
1904 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1906 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1907 PADDRH (msg_reject),
1908 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1909 PADDRH (msg_ign_residue),
1911 ** Rest of the messages left as
1914 ** Unimplemented messages:
1915 ** fall through to MSG_BAD.
1917 }/*-------------------------< MSG_BAD >------------------*/,{
1919 ** unimplemented message - reject it.
1923 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1928 }/*-------------------------< COMPLETE >-----------------*/,{
1930 ** Complete message.
1932 ** If it's not the get condition code,
1933 ** copy TEMP register to LASTP in header.
1935 SCR_FROM_REG (SS_REG),
1937 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1941 NADDR (header.lastp),
1943 ** When we terminate the cycle by clearing ACK,
1944 ** the target may disconnect immediately.
1946 ** We don't want to be told of an
1947 ** "unexpected disconnect",
1948 ** so we disable this feature.
1950 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1953 ** Terminate cycle ...
1955 SCR_CLR (SCR_ACK|SCR_ATN),
1958 ** ... and wait for the disconnect.
1962 }/*-------------------------< CLEANUP >-------------------*/,{
1964 ** dsa: Pointer to nccb
1965 ** or xxxxxxFF (no nccb)
1967 ** HS_REG: Host-Status (<>0!)
1971 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1975 ** save the status registers
1979 NADDR (header.status),
1981 ** and copy back the header to the nccb.
1986 SCR_COPY (sizeof (struct head)),
1988 }/*-------------------------< CLEANUP0 >--------------------*/,{
1992 ** If command resulted in "check condition"
1993 ** status and is not yet completed,
1994 ** try to get the condition code.
1996 SCR_FROM_REG (HS_REG),
1998 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
2000 SCR_FROM_REG (SS_REG),
2002 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
2004 }/*-------------------------< SIGNAL >----------------------*/,{
2006 ** if status = queue full,
2007 ** reinsert in startqueue and stall queue.
2009 /*>>>*/ SCR_FROM_REG (SS_REG),
2011 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2014 ** And make the DSA register invalid.
2016 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2019 ** if job completed ...
2021 SCR_FROM_REG (HS_REG),
2024 ** ... signal completion to the host
2026 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2029 ** Auf zu neuen Schandtaten!
2034 }/*-------------------------< SAVE_DP >------------------*/,{
2037 ** Copy TEMP register to SAVEP in header.
2041 NADDR (header.savep),
2044 }/*-------------------------< RESTORE_DP >---------------*/,{
2046 ** RESTORE_DP message:
2047 ** Copy SAVEP in header to TEMP register.
2050 NADDR (header.savep),
2055 }/*-------------------------< DISCONNECT >---------------*/,{
2057 ** If QUIRK_AUTOSAVE is set,
2058 ** do a "save pointer" operation.
2060 SCR_FROM_REG (QU_REG),
2062 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2065 ** like SAVE_DP message:
2066 ** Copy TEMP register to SAVEP in header.
2070 NADDR (header.savep),
2072 ** Check if temp==savep or temp==goalp:
2073 ** if not, log a missing save pointer message.
2074 ** In fact, it's a comparison mod 256.
2076 ** Hmmm, I hadn't thought that I would be urged to
2077 ** write this kind of ugly self modifying code.
2079 ** It's unbelievable, but the ncr53c8xx isn't able
2080 ** to subtract one register from another.
2082 SCR_FROM_REG (temp),
2085 ** You are not expected to understand this ..
2087 ** CAUTION: only little endian architectures supported! XXX
2090 NADDR (header.savep),
2091 PADDR (disconnect0),
2092 }/*-------------------------< DISCONNECT0 >--------------*/,{
2093 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2099 NADDR (header.goalp),
2100 PADDR (disconnect1),
2101 }/*-------------------------< DISCONNECT1 >--------------*/,{
2102 SCR_INT ^ IFFALSE (DATA (1)),
2107 ** DISCONNECTing ...
2109 ** disable the "unexpected disconnect" feature,
2110 ** and remove the ACK signal.
2112 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2114 SCR_CLR (SCR_ACK|SCR_ATN),
2117 ** Wait for the disconnect.
2123 ** Set a time stamp,
2124 ** and count the disconnects.
2126 SCR_COPY (sizeof (ticks)),
2128 NADDR (header.stamp.disconnect),
2132 SCR_REG_REG (temp, SCR_ADD, 0x01),
2138 ** Status is: DISCONNECTED.
2140 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2145 }/*-------------------------< MSG_OUT >-------------------*/,{
2147 ** The target requests a message.
2149 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2155 ** If it was no ABORT message ...
2157 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2158 PADDRH (msg_out_abort),
2160 ** ... wait for the next phase
2161 ** if it's a message out, send it again, ...
2163 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2165 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2167 ** ... else clear the message ...
2169 SCR_LOAD_REG (scratcha, MSG_NOOP),
2175 ** ... and process the next phase
2180 }/*------------------------< BADGETCC >---------------------*/,{
2182 ** If SIGP was set, clear it and try again.
2184 SCR_FROM_REG (ctest2),
2186 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2190 }/*-------------------------< RESELECT >--------------------*/,{
2192 ** This NOP will be patched with LED OFF
2193 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2199 ** make the DSA invalid.
2201 SCR_LOAD_REG (dsa, 0xff),
2206 ** Sleep waiting for a reselection.
2207 ** If SIGP is set, special treatment.
2209 ** Zu allem bereit ..
2213 }/*-------------------------< RESELECT1 >--------------------*/,{
2215 ** This NOP will be patched with LED ON
2216 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2221 ** ... zu nichts zu gebrauchen ?
2223 ** load the target id into the SFBR
2224 ** and jump to the control block.
2226 ** Look at the declarations of
2231 ** to understand what's going on.
2233 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2239 }/*-------------------------< RESELECT2 >-------------------*/,{
2241 ** This NOP will be patched with LED ON
2242 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2247 ** If it's not connected :(
2248 ** -> interrupted by SIGP bit.
2251 SCR_FROM_REG (ctest2),
2253 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2258 }/*-------------------------< RESEL_TMP >-------------------*/,{
2260 ** The return address in TEMP
2261 ** is in fact the data structure address,
2262 ** so copy it to the DSA register.
2270 }/*-------------------------< RESEL_LUN >-------------------*/,{
2272 ** come back to this point
2273 ** to get an IDENTIFY message
2274 ** Wait for a msg_in phase.
2276 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2280 ** It's not a sony, it's a trick:
2281 ** read the data without acknowledging it.
2283 SCR_FROM_REG (sbdl),
2285 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2288 ** It WAS an Identify message.
2289 ** get it and ack it!
2291 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2296 ** Mask out the lun.
2298 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2303 ** No message phase or no IDENTIFY message:
2306 /*>>>*/ SCR_LOAD_SFBR (0),
2311 }/*-------------------------< RESEL_TAG >-------------------*/,{
2313 ** come back to this point
2314 ** to get a SIMPLE_TAG message
2315 ** Wait for a MSG_IN phase.
2317 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2321 ** It's a trick - read the data
2322 ** without acknowledging it.
2324 SCR_FROM_REG (sbdl),
2326 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2329 ** It WAS a SIMPLE_TAG message.
2330 ** get it and ack it!
2332 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2337 ** Wait for the second byte (the tag)
2339 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2342 ** Get it and ack it!
2344 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2346 SCR_CLR (SCR_ACK|SCR_CARRY),
2351 ** No message phase or no SIMPLE_TAG message
2352 ** or no second byte: return 0.
2354 /*>>>*/ SCR_LOAD_SFBR (0),
2356 SCR_SET (SCR_CARRY),
2361 }/*-------------------------< DATA_IN >--------------------*/,{
2363 ** Because the size depends on the
2364 ** #define MAX_SCATTER parameter,
2365 ** it is filled in at runtime.
2367 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2369 ** SCR_COPY (sizeof (ticks)),
2370 ** KVAR (KVAR_TICKS),
2371 ** NADDR (header.stamp.data),
2372 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2373 ** offsetof (struct dsb, data[ 0]),
2375 ** ##===========< i=1; i<MAX_SCATTER >=========
2376 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2377 ** || PADDR (checkatn),
2378 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2379 ** || offsetof (struct dsb, data[ i]),
2380 ** ##==========================================
2383 ** PADDR (checkatn),
2388 }/*-------------------------< DATA_OUT >-------------------*/,{
2390 ** Because the size depends on the
2391 ** #define MAX_SCATTER parameter,
2392 ** it is filled in at runtime.
2394 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2396 ** SCR_COPY (sizeof (ticks)),
2397 ** KVAR (KVAR_TICKS),
2398 ** NADDR (header.stamp.data),
2399 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2400 ** offsetof (struct dsb, data[ 0]),
2402 ** ##===========< i=1; i<MAX_SCATTER >=========
2403 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2404 ** || PADDR (dispatch),
2405 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2406 ** || offsetof (struct dsb, data[ i]),
2407 ** ##==========================================
2410 ** PADDR (dispatch),
2414 **---------------------------------------------------------
2418 }/*--------------------------------------------------------*/
2422 static struct scripth scripth0 = {
2423 /*-------------------------< TRYLOOP >---------------------*/{
2425 ** Load an entry of the start queue into dsa
2426 ** and try to start it by jumping to TRYSEL.
2428 ** Because the size depends on the
2429 ** #define MAX_START parameter, it is filled
2432 **-----------------------------------------------------------
2434 ** ##===========< I=0; i<MAX_START >===========
2436 ** || NADDR (squeue[i]),
2439 ** || PADDR (trysel),
2440 ** ##==========================================
2445 **-----------------------------------------------------------
2448 }/*-------------------------< MSG_PARITY >---------------*/,{
2452 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2455 ** send a "message parity error" message.
2457 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2461 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2463 ** If a negotiation was in progress,
2464 ** negotiation failed.
2466 SCR_FROM_REG (HS_REG),
2468 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2471 ** else make host log this message
2473 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2474 SIR_REJECT_RECEIVED,
2478 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2484 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2487 ** get residue size.
2489 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2492 ** Check for message parity error.
2494 SCR_TO_REG (scratcha),
2496 SCR_FROM_REG (socl),
2498 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2499 PADDRH (msg_parity),
2500 SCR_FROM_REG (scratcha),
2503 ** Size is 0 .. ignore message.
2505 SCR_JUMP ^ IFTRUE (DATA (0)),
2508 ** Size is not 1 .. have to interrupt.
2510 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2513 ** Check for residue byte in swide register
2515 SCR_FROM_REG (scntl2),
2517 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2520 ** There IS data in the swide register.
2523 SCR_REG_REG (scntl2, SCR_OR, WSR),
2528 ** Load again the size to the sfbr register.
2530 /*>>>*/ SCR_FROM_REG (scratcha),
2537 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2543 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2548 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2551 ** Check for message parity error.
2553 SCR_TO_REG (scratcha),
2555 SCR_FROM_REG (socl),
2557 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2558 PADDRH (msg_parity),
2559 SCR_FROM_REG (scratcha),
2563 SCR_JUMP ^ IFTRUE (DATA (3)),
2565 SCR_JUMP ^ IFFALSE (DATA (2)),
2567 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2570 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2573 ** get extended message code.
2575 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2578 ** Check for message parity error.
2580 SCR_TO_REG (scratcha),
2582 SCR_FROM_REG (socl),
2584 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2585 PADDRH (msg_parity),
2586 SCR_FROM_REG (scratcha),
2588 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2591 ** unknown extended message
2595 }/*-------------------------< MSG_WDTR >-----------------*/,{
2598 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2601 ** get data bus width
2603 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2605 SCR_FROM_REG (socl),
2607 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2608 PADDRH (msg_parity),
2610 ** let the host do the real work.
2615 ** let the target fetch our answer.
2622 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2625 ** Send the MSG_EXT_WDTR
2627 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2635 PADDR (msg_out_done),
2637 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2640 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2643 ** get extended message code.
2645 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2648 ** Check for message parity error.
2650 SCR_TO_REG (scratcha),
2652 SCR_FROM_REG (socl),
2654 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2655 PADDRH (msg_parity),
2656 SCR_FROM_REG (scratcha),
2658 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2661 ** unknown extended message
2666 }/*-------------------------< MSG_SDTR >-----------------*/,{
2669 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2672 ** get period and offset
2674 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2676 SCR_FROM_REG (socl),
2678 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2679 PADDRH (msg_parity),
2681 ** let the host do the real work.
2686 ** let the target fetch our answer.
2693 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2696 ** Send the MSG_EXT_SDTR
2698 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2706 PADDR (msg_out_done),
2708 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2710 ** After ABORT message,
2712 ** expect an immediate disconnect, ...
2714 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2716 SCR_CLR (SCR_ACK|SCR_ATN),
2721 ** ... and set the status to "ABORTED"
2723 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2728 }/*-------------------------< GETCC >-----------------------*/,{
2730 ** The ncr doesn't have an indirect load
2731 ** or store command. So we have to
2732 ** copy part of the control block to a
2733 ** fixed place, where we can modify it.
2735 ** We patch the address part of a COPY command
2736 ** with the address of the dsa register ...
2742 ** ... then we do the actual copy.
2744 SCR_COPY (sizeof (struct head)),
2745 }/*-------------------------< GETCC1 >----------------------*/,{
2749 ** Initialize the status registers
2752 NADDR (header.status),
2754 }/*-------------------------< GETCC2 >----------------------*/,{
2756 ** Get the condition code from a target.
2758 ** DSA points to a data structure.
2759 ** Set TEMP to the script location
2760 ** that receives the condition code.
2762 ** Because there is no script command
2763 ** to load a longword into a register,
2764 ** we use a CALL command.
2769 ** Get the condition code.
2771 SCR_MOVE_TBL ^ SCR_DATA_IN,
2772 offsetof (struct dsb, sense),
2774 ** No data phase may follow!
2783 ** The CALL jumps to this point.
2784 ** Prepare for a RESTORE_POINTER message.
2785 ** Save the TEMP register into the saved pointer.
2789 NADDR (header.savep),
2791 ** Load scratcha, because in case of a selection timeout,
2792 ** the host will expect a new value for startpos in
2793 ** the scratcha register.
2798 #ifdef NCR_GETCC_WITHMSG
2800 ** If QUIRK_NOMSG is set, select without ATN.
2801 ** and don't send a message.
2803 SCR_FROM_REG (QU_REG),
2805 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2808 ** Then try to connect to the target.
2809 ** If we are reselected, special treatment
2810 ** of the current job is required before
2811 ** accepting the reselection.
2813 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2816 ** Send the IDENTIFY message.
2817 ** In case of short transfer, remove ATN.
2819 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2820 offsetof (struct dsb, smsg2),
2824 ** save the first byte of the message.
2833 }/*-------------------------< GETCC3 >----------------------*/,{
2835 ** Try to connect to the target.
2836 ** If we are reselected, special treatment
2837 ** of the current job is required before
2838 ** accepting the reselection.
2840 ** Silly target won't accept a message.
2841 ** Select without ATN.
2843 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2846 ** Force error if selection timeout
2848 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2855 }/*-------------------------< ABORTTAG >-------------------*/,{
2857 ** Abort a bad reselection.
2858 ** Set the message to ABORT vs. ABORT_TAG
2860 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2862 SCR_JUMPR ^ IFFALSE (CARRYSET),
2864 }/*-------------------------< ABORT >----------------------*/,{
2865 SCR_LOAD_REG (scratcha, MSG_ABORT),
2876 ** we expect an immediate disconnect
2878 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2880 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2885 SCR_CLR (SCR_ACK|SCR_ATN),
2891 }/*-------------------------< SNOOPTEST >-------------------*/,{
2893 ** Read the variable.
2896 KVAR (KVAR_NCR_CACHE),
2899 ** Write the variable.
2903 KVAR (KVAR_NCR_CACHE),
2905 ** Read back the variable.
2908 KVAR (KVAR_NCR_CACHE),
2910 }/*-------------------------< SNOOPEND >-------------------*/,{
2916 }/*--------------------------------------------------------*/
2920 /*==========================================================
2923 ** Fill in #define dependent parts of the script
2926 **==========================================================
2929 static void ncr_script_fill (struct script * scr, struct scripth * scrh)
2935 for (i=0; i<MAX_START; i++) {
2937 *p++ =NADDR (squeue[i]);
2940 *p++ =PADDR (trysel);
2943 *p++ =PADDRH(tryloop);
2945 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2949 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2950 *p++ =PADDR (no_data);
2951 *p++ =SCR_COPY (sizeof (ticks));
2952 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2953 *p++ =NADDR (header.stamp.data);
2954 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2955 *p++ =offsetof (struct dsb, data[ 0]);
2957 for (i=1; i<MAX_SCATTER; i++) {
2958 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2959 *p++ =PADDR (checkatn);
2960 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2961 *p++ =offsetof (struct dsb, data[i]);
2965 *p++ =PADDR (checkatn);
2967 *p++ =PADDR (no_data);
2969 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2973 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2974 *p++ =PADDR (no_data);
2975 *p++ =SCR_COPY (sizeof (ticks));
2976 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2977 *p++ =NADDR (header.stamp.data);
2978 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2979 *p++ =offsetof (struct dsb, data[ 0]);
2981 for (i=1; i<MAX_SCATTER; i++) {
2982 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2983 *p++ =PADDR (dispatch);
2984 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2985 *p++ =offsetof (struct dsb, data[i]);
2989 *p++ =PADDR (dispatch);
2991 *p++ =PADDR (no_data);
2993 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2996 /*==========================================================
2999 ** Copy and rebind a script.
3002 **==========================================================
3005 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3007 ncrcmd opcode, new, old, tmp1, tmp2;
3008 ncrcmd *start, *end;
3018 WRITESCRIPT_OFF(dst, offset, opcode);
3022 ** If we forget to change the length
3023 ** in struct script, a field will be
3024 ** padded with 0. This is an illegal
3029 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3030 ncr_name(np), (int) (src-start-1));
3034 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3035 printf ("%p: <%x>\n",
3036 (src-1), (unsigned)opcode);
3039 ** We don't have to decode ALL commands
3041 switch (opcode >> 28) {
3045 ** COPY has TWO arguments.
3049 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3052 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3054 if ((tmp1 ^ tmp2) & 3) {
3055 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3056 ncr_name(np), (int) (src-start-1));
3060 ** If PREFETCH feature not enabled, remove
3061 ** the NO FLUSH bit if present.
3063 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3064 WRITESCRIPT_OFF(dst, offset - 4,
3065 (opcode & ~SCR_NO_FLUSH));
3070 ** MOVE (absolute address)
3078 ** dont't relocate if relative :-)
3080 if (opcode & 0x00800000)
3102 switch (old & RELOC_MASK) {
3103 case RELOC_REGISTER:
3104 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3107 new = (old & ~RELOC_MASK) + np->p_script;
3110 new = (old & ~RELOC_MASK) + np->p_scripth;
3113 new = (old & ~RELOC_MASK) + vtophys(np);
3116 if (((old & ~RELOC_MASK) <
3117 SCRIPT_KVAR_FIRST) ||
3118 ((old & ~RELOC_MASK) >
3120 panic("ncr KVAR out of range");
3121 new = vtophys(script_kvars[old &
3125 /* Don't relocate a 0 address. */
3132 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3136 WRITESCRIPT_OFF(dst, offset, new);
3140 WRITESCRIPT_OFF(dst, offset, *src++);
3147 /*==========================================================
3150 ** Auto configuration.
3153 **==========================================================
3157 /*----------------------------------------------------------
3159 ** Reduce the transfer length to the max value
3160 ** we can transfer safely.
3162 ** Reading a block greater then MAX_SIZE from the
3163 ** raw (character) device exercises a memory leak
3164 ** in the vm subsystem. This is common to ALL devices.
3165 ** We have submitted a description of this bug to
3166 ** <FreeBSD-bugs@freefall.cdrom.com>.
3167 ** It should be fixed in the current release.
3169 **----------------------------------------------------------
3172 void ncr_min_phys (struct buf *bp)
3174 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3180 /*----------------------------------------------------------
3182 ** Maximal number of outstanding requests per target.
3184 **----------------------------------------------------------
3187 u_int32_t ncr_info (int unit)
3189 return (1); /* may be changed later */
3194 /*----------------------------------------------------------
3196 ** NCR chip devices table and chip look up function.
3197 ** Features bit are defined in ncrreg.h. Is it the
3200 **----------------------------------------------------------
3203 unsigned long device_id;
3204 unsigned short minrevid;
3206 unsigned char maxburst;
3207 unsigned char maxoffs;
3208 unsigned char clock_divn;
3209 unsigned int features;
3212 static ncr_chip ncr_chip_table[] = {
3213 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3216 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3217 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3219 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3222 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3225 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3226 FE_WIDE|FE_ERL|FE_BOF}
3228 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3229 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3231 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3232 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3234 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3235 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3237 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3238 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3240 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3241 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3243 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3244 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3246 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3247 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3249 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3250 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3252 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3253 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3255 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3256 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3259 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3264 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3265 if (device_id == ncr_chip_table[i].device_id &&
3266 ncr_chip_table[i].minrevid <= revision_id) {
3268 ncr_chip_table[found].minrevid
3269 < ncr_chip_table[i].minrevid) {
3277 /*----------------------------------------------------------
3279 ** Probe the hostadapter.
3281 **----------------------------------------------------------
3286 static int ncr_probe (device_t dev)
3290 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3292 device_set_desc(dev, ncr_chip_table[i].name);
3301 /*==========================================================
3303 ** NCR chip clock divisor table.
3304 ** Divisors are multiplied by 10,000,000 in order to make
3305 ** calculations more simple.
3307 **==========================================================
3311 static u_long div_10M[] =
3312 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3314 /*===============================================================
3316 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3317 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3318 ** We use log base 2 (burst length) as internal code, with
3319 ** value 0 meaning "burst disabled".
3321 **===============================================================
3325 * Burst length from burst code.
3327 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3330 * Burst code from io register bits.
3332 #define burst_code(dmode, ctest4, ctest5) \
3333 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3336 * Set initial io register bits from burst code.
3339 ncr_init_burst(ncb_p np, u_char bc)
3341 np->rv_ctest4 &= ~0x80;
3342 np->rv_dmode &= ~(0x3 << 6);
3343 np->rv_ctest5 &= ~0x4;
3346 np->rv_ctest4 |= 0x80;
3350 np->rv_dmode |= ((bc & 0x3) << 6);
3351 np->rv_ctest5 |= (bc & 0x4);
3355 /*==========================================================
3358 ** Auto configuration: attach and init a host adapter.
3361 **==========================================================
3366 ncr_attach (device_t dev)
3368 ncb_p np = (struct ncb*) device_get_softc(dev);
3374 struct cam_devq *devq;
3377 ** allocate and initialize structures.
3380 np->unit = device_get_unit(dev);
3383 ** Try to map the controller chip to
3384 ** virtual and physical memory.
3388 np->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3389 &np->reg_rid, RF_ACTIVE);
3391 device_printf(dev, "could not map memory\n");
3396 ** Make the controller's registers available.
3397 ** Now the INB INW INL OUTB OUTW OUTL macros
3398 ** can be used safely.
3401 np->bst = rman_get_bustag(np->reg_res);
3402 np->bsh = rman_get_bushandle(np->reg_res);
3407 ** Try to map the controller chip into iospace.
3410 if (!pci_map_port (config_id, 0x10, &np->port))
3416 ** Save some controller register default values
3419 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3420 np->rv_dmode = INB(nc_dmode) & 0xce;
3421 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3422 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3423 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3424 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3425 np->rv_gpcntl = INB(nc_gpcntl);
3426 np->rv_stest2 = INB(nc_stest2) & 0x20;
3428 if (bootverbose >= 2) {
3429 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3430 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3431 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3432 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3435 np->rv_dcntl |= NOCOM;
3438 ** Do chip dependent initialization.
3441 rev = pci_get_revid(dev);
3444 ** Get chip features from chips table.
3446 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3449 np->maxburst = ncr_chip_table[i].maxburst;
3450 np->maxoffs = ncr_chip_table[i].maxoffs;
3451 np->clock_divn = ncr_chip_table[i].clock_divn;
3452 np->features = ncr_chip_table[i].features;
3453 } else { /* Should'nt happen if probe() is ok */
3457 np->features = FE_ERL;
3460 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3461 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3462 if (np->features & FE_QUAD) np->multiplier = 4;
3463 else if (np->features & FE_DBLR) np->multiplier = 2;
3464 else np->multiplier = 1;
3467 ** Get the frequency of the chip's clock.
3468 ** Find the right value for scntl3.
3470 if (np->features & (FE_ULTRA|FE_ULTRA2))
3471 ncr_getclock(np, np->multiplier);
3473 #ifdef NCR_TEKRAM_EEPROM
3475 printf ("%s: Tekram EEPROM read %s\n",
3477 read_tekram_eeprom (np, NULL) ?
3478 "succeeded" : "failed");
3480 #endif /* NCR_TEKRAM_EEPROM */
3483 * If scntl3 != 0, we assume BIOS is present.
3486 np->features |= FE_BIOS;
3489 * Divisor to be used for async (timer pre-scaler).
3491 i = np->clock_divn - 1;
3494 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3499 np->rv_scntl3 = i+1;
3502 * Minimum synchronous period factor supported by the chip.
3503 * Btw, 'period' is in tenths of nanoseconds.
3506 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3507 if (period <= 250) np->minsync = 10;
3508 else if (period <= 303) np->minsync = 11;
3509 else if (period <= 500) np->minsync = 12;
3510 else np->minsync = (period + 40 - 1) / 40;
3513 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3516 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3518 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3522 * Maximum synchronous period factor supported by the chip.
3525 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3526 np->maxsync = period > 2540 ? 254 : period / 10;
3529 * Now, some features available with Symbios compatible boards.
3530 * LED support through GPIO0 and DIFF support.
3533 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3534 if (!(np->rv_gpcntl & 0x01))
3535 np->features |= FE_LED0;
3536 #if 0 /* Not safe enough without NVRAM support or user settable option */
3537 if (!(INB(nc_gpreg) & 0x08))
3538 np->features |= FE_DIFF;
3540 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3543 * Prepare initial IO registers settings.
3544 * Trust BIOS only if we believe we have one and if we want to.
3546 #ifdef SCSI_NCR_TRUST_BIOS
3547 if (!(np->features & FE_BIOS)) {
3552 np->rv_dcntl = NOCOM;
3554 np->rv_ctest4 = MPEE;
3558 if (np->features & FE_ERL)
3559 np->rv_dmode |= ERL; /* Enable Read Line */
3560 if (np->features & FE_BOF)
3561 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3562 if (np->features & FE_ERMP)
3563 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3564 if (np->features & FE_CLSE)
3565 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3566 if (np->features & FE_WRIE)
3567 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3568 if (np->features & FE_PFEN)
3569 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3570 if (np->features & FE_DFS)
3571 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3572 if (np->features & FE_DIFF)
3573 np->rv_stest2 |= 0x20; /* Differential mode */
3574 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3577 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3581 ** Get on-chip SRAM address, if supported
3583 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3584 np->sram_rid = 0x18;
3585 np->sram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3591 ** Allocate structure for script relocation.
3593 if (np->sram_res != NULL) {
3595 np->p_script = rman_get_start(np->sram_res);
3596 np->bst2 = rman_get_bustag(np->sram_res);
3597 np->bsh2 = rman_get_bushandle(np->sram_res);
3598 } else if (sizeof (struct script) > PAGE_SIZE) {
3599 np->script = (struct script*) contigmalloc
3600 (round_page(sizeof (struct script)), M_DEVBUF, M_WAITOK,
3601 0, 0xffffffff, PAGE_SIZE, 0);
3603 np->script = (struct script *)
3604 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3607 if (sizeof (struct scripth) > PAGE_SIZE) {
3608 np->scripth = (struct scripth*) contigmalloc
3609 (round_page(sizeof (struct scripth)), M_DEVBUF, M_WAITOK,
3610 0, 0xffffffff, PAGE_SIZE, 0);
3613 np->scripth = (struct scripth *)
3614 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3617 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3619 ** If cache line size is enabled, check PCI config space and
3620 ** try to fix it up if necessary.
3622 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3624 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3625 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3629 printf("%s: setting PCI cache line size register to %d.\n",
3630 ncr_name(np), (int)cachelnsz);
3631 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3634 if (!(command & (1<<4))) {
3636 printf("%s: setting PCI command write and invalidate.\n",
3638 pci_write_config(dev, PCIR_COMMAND, command, 2);
3641 #endif /* PCIR_CACHELNSZ */
3643 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3645 /* Initialize per-target user settings */
3647 if (SCSI_NCR_DFLT_SYNC) {
3648 usrsync = SCSI_NCR_DFLT_SYNC;
3649 if (usrsync > np->maxsync)
3650 usrsync = np->maxsync;
3651 if (usrsync < np->minsync)
3652 usrsync = np->minsync;
3655 usrwide = (SCSI_NCR_MAX_WIDE);
3656 if (usrwide > np->maxwide) usrwide=np->maxwide;
3658 for (i=0;i<MAX_TARGET;i++) {
3659 tcb_p tp = &np->target[i];
3661 tp->tinfo.user.period = usrsync;
3662 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3663 tp->tinfo.user.width = usrwide;
3664 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3671 ** Bells and whistles ;-)
3674 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3675 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3676 burst_length(np->maxburst),
3677 (np->rv_ctest5 & DFS) ? "large" : "normal");
3680 ** Print some complementary information that can be helpfull.
3683 printf("%s: %s, %s IRQ driver%s\n",
3685 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3686 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3687 np->sram_res ? ", using on-chip SRAM" : "");
3690 ** Patch scripts to physical addresses
3692 ncr_script_fill (&script0, &scripth0);
3695 np->p_script = vtophys(np->script);
3696 np->p_scripth = vtophys(np->scripth);
3698 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3699 (ncrcmd *) np->script, sizeof(struct script));
3701 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3702 (ncrcmd *) np->scripth, sizeof(struct scripth));
3705 ** Patch the script for LED support.
3708 if (np->features & FE_LED0) {
3709 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3710 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3711 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3715 ** init data structure
3718 np->jump_tcb.l_cmd = SCR_JUMP;
3719 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3722 ** Get SCSI addr of host adapter (set by bios?).
3725 np->myaddr = INB(nc_scid) & 0x07;
3726 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3730 ** Log the initial register contents
3734 for (reg=0; reg<256; reg+=4) {
3735 if (reg%16==0) printf ("reg[%2x]", reg);
3736 printf (" %08x", (int)pci_conf_read (config_id, reg));
3737 if (reg%16==12) printf ("\n");
3740 #endif /* NCR_DUMP_REG */
3746 OUTB (nc_istat, SRST);
3748 OUTB (nc_istat, 0 );
3752 ** Now check the cache handling of the pci chipset.
3755 if (ncr_snooptest (np)) {
3756 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3761 ** Install the interrupt handler.
3765 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3766 RF_SHAREABLE | RF_ACTIVE);
3767 if (np->irq_res == NULL) {
3769 "interruptless mode: reduced performance.\n");
3771 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
3772 ncr_intr, np, &np->irq_handle);
3776 ** Create the device queue. We only allow MAX_START-1 concurrent
3777 ** transactions so we can be sure to have one element free in our
3778 ** start queue to reset to the idle loop.
3780 devq = cam_simq_alloc(MAX_START - 1);
3785 ** Now tell the generic SCSI layer
3788 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3790 if (np->sim == NULL) {
3791 cam_simq_free(devq);
3796 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3797 cam_sim_free(np->sim, /*free_devq*/ TRUE);
3801 if (xpt_create_path(&np->path, /*periph*/NULL,
3802 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3803 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3804 xpt_bus_deregister(cam_sim_path(np->sim));
3805 cam_sim_free(np->sim, /*free_devq*/TRUE);
3810 ** start the timeout daemon
3818 /*==========================================================
3821 ** Process pending device interrupts.
3824 **==========================================================
3832 int oldspl = splcam();
3834 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3836 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3838 ** Repeat until no outstanding ints
3842 } while (INB(nc_istat) & (INTF|SIP|DIP));
3847 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3852 /*==========================================================
3855 ** Start execution of a SCSI command.
3856 ** This is called from the generic SCSI driver.
3859 **==========================================================
3863 ncr_action (struct cam_sim *sim, union ccb *ccb)
3867 np = (ncb_p) cam_sim_softc(sim);
3869 switch (ccb->ccb_h.func_code) {
3870 /* Common cases first */
3871 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3877 struct ccb_scsiio *csio;
3886 tp = &np->target[ccb->ccb_h.target_id];
3892 * Last time we need to check if this CCB needs to
3895 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3900 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3902 /*---------------------------------------------------
3904 ** Assign an nccb / bind ccb
3906 **----------------------------------------------------
3908 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3909 ccb->ccb_h.target_lun);
3911 /* XXX JGibbs - Freeze SIMQ */
3912 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3919 /*---------------------------------------------------
3923 **----------------------------------------------------
3926 ** XXX JGibbs - Isn't this expensive
3927 ** enough to be conditionalized??
3930 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3931 cp->phys.header.stamp.start = ticks;
3934 if (tp->nego_cp == NULL) {
3936 if (tp->tinfo.current.width
3937 != tp->tinfo.goal.width) {
3940 } else if ((tp->tinfo.current.period
3941 != tp->tinfo.goal.period)
3942 || (tp->tinfo.current.offset
3943 != tp->tinfo.goal.offset)) {
3949 /*---------------------------------------------------
3951 ** choose a new tag ...
3953 **----------------------------------------------------
3955 lp = tp->lp[ccb->ccb_h.target_lun];
3957 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3958 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3961 ** assign a tag to this nccb
3964 nccb_p cp2 = lp->next_nccb;
3965 lp->lasttag = lp->lasttag % 255 + 1;
3966 while (cp2 && cp2->tag != lp->lasttag)
3967 cp2 = cp2->next_nccb;
3969 cp->tag=lp->lasttag;
3970 if (DEBUG_FLAGS & DEBUG_TAGS) {
3972 printf ("using tag #%d.\n", cp->tag);
3979 /*----------------------------------------------------
3981 ** Build the identify / tag / sdtr message
3983 **----------------------------------------------------
3985 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3986 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3987 idmsg |= MSG_IDENTIFY_DISCFLAG;
3989 msgptr = cp->scsi_smsg;
3991 msgptr[msglen++] = idmsg;
3994 msgptr[msglen++] = ccb->csio.tag_action;
3995 msgptr[msglen++] = cp->tag;
4000 msgptr[msglen++] = MSG_EXTENDED;
4001 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
4002 msgptr[msglen++] = MSG_EXT_SDTR;
4003 msgptr[msglen++] = tp->tinfo.goal.period;
4004 msgptr[msglen++] = tp->tinfo.goal.offset;;
4005 if (DEBUG_FLAGS & DEBUG_NEGO) {
4007 printf ("sync msgout: ");
4008 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4013 msgptr[msglen++] = MSG_EXTENDED;
4014 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4015 msgptr[msglen++] = MSG_EXT_WDTR;
4016 msgptr[msglen++] = tp->tinfo.goal.width;
4017 if (DEBUG_FLAGS & DEBUG_NEGO) {
4019 printf ("wide msgout: ");
4020 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4026 /*----------------------------------------------------
4028 ** Build the identify message for getcc.
4030 **----------------------------------------------------
4033 cp->scsi_smsg2 [0] = idmsg;
4036 /*----------------------------------------------------
4038 ** Build the data descriptors
4040 **----------------------------------------------------
4043 /* XXX JGibbs - Handle other types of I/O */
4044 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4045 segments = ncr_scatter(&cp->phys,
4046 (vm_offset_t)csio->data_ptr,
4047 (vm_size_t)csio->dxfer_len);
4050 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4051 ncr_free_nccb(np, cp);
4056 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4057 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4058 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4059 } else { /* CAM_DIR_OUT */
4060 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4061 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4064 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4065 cp->phys.header.goalp = cp->phys.header.savep;
4068 cp->phys.header.lastp = cp->phys.header.savep;
4071 /*----------------------------------------------------
4075 **----------------------------------------------------
4078 ** physical -> virtual backlink
4079 ** Generic SCSI command
4081 cp->phys.header.cp = cp;
4085 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4086 cp->phys.header.launch.l_cmd = SCR_JUMP;
4090 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4091 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4092 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4096 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4097 cp->phys.smsg.size = msglen;
4099 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4100 cp->phys.smsg2.size = msglen2;
4104 /* XXX JGibbs - Support other command types */
4105 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4106 cp->phys.cmd.size = csio->cdb_len;
4110 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4111 cp->phys.scmd.size = 6;
4113 ** patch requested size into sense command
4115 cp->sensecmd[0] = 0x03;
4116 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4117 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4118 cp->sensecmd[4] = csio->sense_len;
4122 cp->phys.sense.addr = vtophys (&csio->sense_data);
4123 cp->phys.sense.size = csio->sense_len;
4127 cp->actualquirks = QUIRK_NOMSG;
4128 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4129 cp->s_status = SCSI_STATUS_ILLEGAL;
4130 cp->parity_status = 0;
4132 cp->xerr_status = XE_OK;
4133 cp->sync_status = tp->tinfo.sval;
4134 cp->nego_status = nego;
4135 cp->wide_status = tp->tinfo.wval;
4137 /*----------------------------------------------------
4139 ** Critical region: start this job.
4141 **----------------------------------------------------
4145 ** reselect pattern and activate this job.
4148 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4149 cp->tlimit = time_second
4150 + ccb->ccb_h.timeout / 1000 + 2;
4151 cp->magic = CCB_MAGIC;
4154 ** insert into start queue.
4157 qidx = np->squeueput + 1;
4158 if (qidx >= MAX_START)
4160 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4161 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4162 np->squeueput = qidx;
4164 if(DEBUG_FLAGS & DEBUG_QUEUE)
4165 printf("%s: queuepos=%d tryoffset=%d.\n",
4166 ncr_name (np), np->squeueput,
4167 (unsigned)(READSCRIPT(startpos[0]) -
4168 (NCB_SCRIPTH_PHYS (np, tryloop))));
4171 ** Script processor may be waiting for reselect.
4174 OUTB (nc_istat, SIGP);
4177 ** and reenable interrupts
4182 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4183 case XPT_EN_LUN: /* Enable LUN as a target */
4184 case XPT_TARGET_IO: /* Execute target I/O request */
4185 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4186 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4187 case XPT_ABORT: /* Abort the specified CCB */
4189 ccb->ccb_h.status = CAM_REQ_INVALID;
4192 case XPT_SET_TRAN_SETTINGS:
4194 struct ccb_trans_settings *cts;
4201 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
4202 update_type |= NCR_TRANS_GOAL;
4203 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
4204 update_type |= NCR_TRANS_USER;
4207 tp = &np->target[ccb->ccb_h.target_id];
4208 /* Tag and disc enables */
4209 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
4210 if (update_type & NCR_TRANS_GOAL) {
4211 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4212 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4214 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4217 if (update_type & NCR_TRANS_USER) {
4218 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4219 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4221 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4226 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
4227 if (update_type & NCR_TRANS_GOAL) {
4228 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4229 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4231 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4234 if (update_type & NCR_TRANS_USER) {
4235 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4236 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4238 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4242 /* Filter bus width and sync negotiation settings */
4243 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
4244 if (cts->bus_width > np->maxwide)
4245 cts->bus_width = np->maxwide;
4248 if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4249 || ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
4250 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
4251 if (cts->sync_period != 0
4252 && (cts->sync_period < np->minsync))
4253 cts->sync_period = np->minsync;
4255 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0) {
4256 if (cts->sync_offset == 0)
4257 cts->sync_period = 0;
4258 if (cts->sync_offset > np->maxoffs)
4259 cts->sync_offset = np->maxoffs;
4262 if ((update_type & NCR_TRANS_USER) != 0) {
4263 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4264 tp->tinfo.user.period = cts->sync_period;
4265 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4266 tp->tinfo.user.offset = cts->sync_offset;
4267 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4268 tp->tinfo.user.width = cts->bus_width;
4270 if ((update_type & NCR_TRANS_GOAL) != 0) {
4271 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4272 tp->tinfo.goal.period = cts->sync_period;
4274 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4275 tp->tinfo.goal.offset = cts->sync_offset;
4277 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4278 tp->tinfo.goal.width = cts->bus_width;
4281 ccb->ccb_h.status = CAM_REQ_CMP;
4285 case XPT_GET_TRAN_SETTINGS:
4286 /* Get default/user set transfer settings for the target */
4288 struct ccb_trans_settings *cts;
4289 struct ncr_transinfo *tinfo;
4294 tp = &np->target[ccb->ccb_h.target_id];
4297 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
4298 tinfo = &tp->tinfo.current;
4299 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4300 cts->flags |= CCB_TRANS_DISC_ENB;
4302 cts->flags &= ~CCB_TRANS_DISC_ENB;
4304 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4305 cts->flags |= CCB_TRANS_TAG_ENB;
4307 cts->flags &= ~CCB_TRANS_TAG_ENB;
4309 tinfo = &tp->tinfo.user;
4310 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4311 cts->flags |= CCB_TRANS_DISC_ENB;
4313 cts->flags &= ~CCB_TRANS_DISC_ENB;
4315 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4316 cts->flags |= CCB_TRANS_TAG_ENB;
4318 cts->flags &= ~CCB_TRANS_TAG_ENB;
4321 cts->sync_period = tinfo->period;
4322 cts->sync_offset = tinfo->offset;
4323 cts->bus_width = tinfo->width;
4327 cts->valid = CCB_TRANS_SYNC_RATE_VALID
4328 | CCB_TRANS_SYNC_OFFSET_VALID
4329 | CCB_TRANS_BUS_WIDTH_VALID
4330 | CCB_TRANS_DISC_VALID
4331 | CCB_TRANS_TQ_VALID;
4333 ccb->ccb_h.status = CAM_REQ_CMP;
4337 case XPT_CALC_GEOMETRY:
4339 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4340 * but it should be able to deal with Adaptec
4343 cam_calc_geometry(&ccb->ccg, /*extended*/1);
4347 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4349 OUTB (nc_scntl1, CRST);
4350 ccb->ccb_h.status = CAM_REQ_CMP;
4351 DELAY(10000); /* Wait until our interrupt handler sees it */
4355 case XPT_TERM_IO: /* Terminate the I/O process */
4357 ccb->ccb_h.status = CAM_REQ_INVALID;
4360 case XPT_PATH_INQ: /* Path routing inquiry */
4362 struct ccb_pathinq *cpi = &ccb->cpi;
4364 cpi->version_num = 1; /* XXX??? */
4365 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4366 if ((np->features & FE_WIDE) != 0)
4367 cpi->hba_inquiry |= PI_WIDE_16;
4368 cpi->target_sprt = 0;
4370 cpi->hba_eng_cnt = 0;
4371 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4372 cpi->max_lun = MAX_LUN - 1;
4373 cpi->initiator_id = np->myaddr;
4374 cpi->bus_id = cam_sim_bus(sim);
4375 cpi->base_transfer_speed = 3300;
4376 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4377 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4378 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4379 cpi->unit_number = cam_sim_unit(sim);
4380 cpi->ccb_h.status = CAM_REQ_CMP;
4385 ccb->ccb_h.status = CAM_REQ_INVALID;
4391 /*==========================================================
4394 ** Complete execution of a SCSI command.
4395 ** Signal completion to the generic SCSI driver.
4398 **==========================================================
4402 ncr_complete (ncb_p np, nccb_p cp)
4411 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4416 ** No Reselect anymore.
4418 cp->jump_nccb.l_cmd = (SCR_JUMP);
4423 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4428 ncb_profile (np, cp);
4430 if (DEBUG_FLAGS & DEBUG_TINY)
4431 printf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4432 cp->host_status,cp->s_status);
4436 tp = &np->target[ccb->ccb_h.target_id];
4439 ** We do not queue more than 1 nccb per target
4440 ** with negotiation at any time. If this nccb was
4441 ** used for negotiation, clear this info in the tcb.
4444 if (cp == tp->nego_cp)
4448 ** Check for parity errors.
4450 /* XXX JGibbs - What about reporting them??? */
4452 if (cp->parity_status) {
4454 printf ("%d parity error(s), fallback.\n", cp->parity_status);
4456 ** fallback to asynch transfer.
4458 tp->tinfo.goal.period = 0;
4459 tp->tinfo.goal.offset = 0;
4463 ** Check for extended errors.
4466 if (cp->xerr_status != XE_OK) {
4468 switch (cp->xerr_status) {
4470 printf ("extraneous data discarded.\n");
4473 printf ("illegal scsi phase (4/5).\n");
4476 printf ("extended error %d.\n", cp->xerr_status);
4479 if (cp->host_status==HS_COMPLETE)
4480 cp->host_status = HS_FAIL;
4484 ** Check the status.
4486 if (cp->host_status == HS_COMPLETE) {
4488 if (cp->s_status == SCSI_STATUS_OK) {
4493 /* XXX JGibbs - Properly calculate residual */
4495 tp->bytes += ccb->csio.dxfer_len;
4498 ccb->ccb_h.status = CAM_REQ_CMP;
4499 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4502 * XXX Could be TERMIO too. Should record
4505 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4506 cp->s_status &= ~SCSI_STATUS_SENSE;
4507 if (cp->s_status == SCSI_STATUS_OK) {
4509 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4511 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4514 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4515 ccb->csio.scsi_status = cp->s_status;
4519 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4522 ** Device failed selection
4524 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4526 } else if (cp->host_status == HS_TIMEOUT) {
4531 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4532 } else if (cp->host_status == HS_STALL) {
4533 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4537 ** Other protocol messes
4540 printf ("COMMAND FAILED (%x %x) @%p.\n",
4541 cp->host_status, cp->s_status, cp);
4543 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4546 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4547 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4548 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4554 ncr_free_nccb (np, cp);
4557 ** signal completion to generic driver.
4562 /*==========================================================
4565 ** Signal all (or one) control block done.
4568 **==========================================================
4572 ncr_wakeup (ncb_p np, u_long code)
4575 ** Starting at the default nccb and following
4576 ** the links, complete all jobs with a
4577 ** host_status greater than "disconnect".
4579 ** If the "code" parameter is not zero,
4580 ** complete all jobs that are not IDLE.
4583 nccb_p cp = np->link_nccb;
4585 switch (cp->host_status) {
4591 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D");
4597 cp->host_status = code;
4602 ncr_complete (np, cp);
4605 cp = cp -> link_nccb;
4610 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4617 ** Starting at the first nccb and following
4618 ** the links, complete all jobs that match
4619 ** the passed in path and are in the start queue.
4626 switch (cp->host_status) {
4630 if ((cp->phys.header.launch.l_paddr
4631 == NCB_SCRIPT_PHYS (np, select))
4632 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4634 /* Mark for removal from the start queue */
4635 for (i = 1; i < MAX_START; i++) {
4638 idx = np->squeueput - i;
4641 idx = MAX_START + idx;
4643 == CCB_PHYS(cp, phys)) {
4645 NCB_SCRIPT_PHYS (np, skip);
4651 cp->host_status=HS_STALL;
4652 ncr_complete (np, cp);
4666 /* Compress the start queue */
4668 bidx = np->squeueput;
4669 i = np->squeueput - firstskip;
4676 bidx = MAX_START + bidx;
4678 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4680 } else if (j != 0) {
4681 np->squeue[bidx] = np->squeue[i];
4682 if (np->squeue[bidx]
4683 == NCB_SCRIPT_PHYS(np, idle))
4686 i = (i + 1) % MAX_START;
4688 np->squeueput = bidx;
4692 /*==========================================================
4698 **==========================================================
4702 ncr_init(ncb_p np, char * msg, u_long code)
4710 OUTB (nc_istat, SRST);
4718 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg);
4721 ** Clear Start Queue
4724 for (i=0;i<MAX_START;i++)
4725 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4728 ** Start at first entry.
4732 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4733 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4736 ** Wakeup all pending jobs.
4739 ncr_wakeup (np, code);
4745 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4746 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4747 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4748 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4749 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4750 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4751 OUTB (nc_istat , SIGP ); /* Signal Process */
4752 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4753 OUTB (nc_dcntl , np->rv_dcntl);
4754 OUTB (nc_ctest3, np->rv_ctest3);
4755 OUTB (nc_ctest5, np->rv_ctest5);
4756 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4757 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4758 OUTB (nc_stest3, TE ); /* TolerANT enable */
4759 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4761 if (bootverbose >= 2) {
4762 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4763 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4764 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4765 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4769 ** Enable GPIO0 pin for writing if LED support.
4772 if (np->features & FE_LED0) {
4773 OUTOFFB (nc_gpcntl, 0x01);
4777 ** Fill in target structure.
4779 for (i=0;i<MAX_TARGET;i++) {
4780 tcb_p tp = &np->target[i];
4783 tp->tinfo.wval = np->rv_scntl3;
4785 tp->tinfo.current.period = 0;
4786 tp->tinfo.current.offset = 0;
4787 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4794 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4795 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4798 ** Start script processor.
4801 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4804 * Notify the XPT of the event
4806 if (code == HS_RESET)
4807 xpt_async(AC_BUS_RESET, np->path, NULL);
4811 ncr_poll(struct cam_sim *sim)
4813 ncr_intr(cam_sim_softc(sim));
4817 /*==========================================================
4819 ** Get clock factor and sync divisor for a given
4820 ** synchronous factor period.
4821 ** Returns the clock factor (in sxfer) and scntl3
4822 ** synchronous divisor field.
4824 **==========================================================
4827 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4829 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4830 int div = np->clock_divn; /* Number of divisors supported */
4831 u_long fak; /* Sync factor in sxfer */
4832 u_long per; /* Period in tenths of ns */
4833 u_long kpc; /* (per * clk) */
4836 ** Compute the synchronous period in tenths of nano-seconds
4838 if (sfac <= 10) per = 250;
4839 else if (sfac == 11) per = 303;
4840 else if (sfac == 12) per = 500;
4841 else per = 40 * sfac;
4844 ** Look for the greatest clock divisor that allows an
4845 ** input speed faster than the period.
4849 if (kpc >= (div_10M[div] * 4)) break;
4852 ** Calculate the lowest clock factor that allows an output
4853 ** speed not faster than the period.
4855 fak = (kpc - 1) / div_10M[div] + 1;
4857 #if 0 /* You can #if 1 if you think this optimization is usefull */
4859 per = (fak * div_10M[div]) / clk;
4862 ** Why not to try the immediate lower divisor and to choose
4863 ** the one that allows the fastest output speed ?
4864 ** We dont want input speed too much greater than output speed.
4866 if (div >= 1 && fak < 6) {
4868 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4869 per2 = (fak2 * div_10M[div-1]) / clk;
4870 if (per2 < per && fak2 <= 6) {
4878 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4881 ** Compute and return sync parameters for the ncr
4884 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4887 /*==========================================================
4889 ** Switch sync mode for current job and its target
4891 **==========================================================
4895 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4898 struct ccb_trans_settings neg;
4901 u_int target = INB (nc_sdid) & 0x0f;
4910 assert (target == ccb->ccb_h.target_id);
4912 tp = &np->target[target];
4914 if (!scntl3 || !(sxfer & 0x1f))
4915 scntl3 = np->rv_scntl3;
4916 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4917 | (np->rv_scntl3 & 0x07);
4920 ** Deduce the value of controller sync period from scntl3.
4921 ** period is in tenths of nano-seconds.
4924 div = ((scntl3 >> 4) & 0x7);
4925 if ((sxfer & 0x1f) && div)
4927 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4931 tp->tinfo.goal.period = period;
4932 tp->tinfo.goal.offset = sxfer & 0x1f;
4933 tp->tinfo.current.period = period;
4934 tp->tinfo.current.offset = sxfer & 0x1f;
4937 ** Stop there if sync parameters are unchanged
4939 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4940 tp->tinfo.sval = sxfer;
4941 tp->tinfo.wval = scntl3;
4945 ** Disable extended Sreq/Sack filtering
4947 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4951 ** Tell the SCSI layer about the
4952 ** new transfer parameters.
4954 neg.sync_period = period;
4955 neg.sync_offset = sxfer & 0x1f;
4956 neg.valid = CCB_TRANS_SYNC_RATE_VALID
4957 | CCB_TRANS_SYNC_OFFSET_VALID;
4958 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4960 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4963 ** set actual value and sync_status
4965 OUTB (nc_sxfer, sxfer);
4966 np->sync_st = sxfer;
4967 OUTB (nc_scntl3, scntl3);
4968 np->wide_st = scntl3;
4971 ** patch ALL nccbs of this target.
4973 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4974 if (!cp->ccb) continue;
4975 if (cp->ccb->ccb_h.target_id != target) continue;
4976 cp->sync_status = sxfer;
4977 cp->wide_status = scntl3;
4981 /*==========================================================
4983 ** Switch wide mode for current job and its target
4984 ** SCSI specs say: a SCSI device that accepts a WDTR
4985 ** message shall reset the synchronous agreement to
4986 ** asynchronous mode.
4988 **==========================================================
4991 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
4994 struct ccb_trans_settings neg;
4995 u_int target = INB (nc_sdid) & 0x0f;
5006 assert (target == ccb->ccb_h.target_id);
5008 tp = &np->target[target];
5009 tp->tinfo.current.width = wide;
5010 tp->tinfo.goal.width = wide;
5011 tp->tinfo.current.period = 0;
5012 tp->tinfo.current.offset = 0;
5014 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5016 sxfer = ack ? 0 : tp->tinfo.sval;
5019 ** Stop there if sync/wide parameters are unchanged
5021 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5022 tp->tinfo.sval = sxfer;
5023 tp->tinfo.wval = scntl3;
5025 /* Tell the SCSI layer about the new transfer params */
5026 neg.bus_width = (scntl3 & EWS) ? MSG_EXT_WDTR_BUS_16_BIT
5027 : MSG_EXT_WDTR_BUS_8_BIT;
5028 neg.sync_period = 0;
5029 neg.sync_offset = 0;
5030 neg.valid = CCB_TRANS_BUS_WIDTH_VALID
5031 | CCB_TRANS_SYNC_RATE_VALID
5032 | CCB_TRANS_SYNC_OFFSET_VALID;
5033 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
5035 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5038 ** set actual value and sync_status
5040 OUTB (nc_sxfer, sxfer);
5041 np->sync_st = sxfer;
5042 OUTB (nc_scntl3, scntl3);
5043 np->wide_st = scntl3;
5046 ** patch ALL nccbs of this target.
5048 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5049 if (!cp->ccb) continue;
5050 if (cp->ccb->ccb_h.target_id != target) continue;
5051 cp->sync_status = sxfer;
5052 cp->wide_status = scntl3;
5056 /*==========================================================
5059 ** ncr timeout handler.
5062 **==========================================================
5064 ** Misused to keep the driver running when
5065 ** interrupts are not configured correctly.
5067 **----------------------------------------------------------
5071 ncr_timeout (void *arg)
5074 time_t thistime = time_second;
5075 ticks_t step = np->ticks;
5080 if (np->lasttime != thistime) {
5082 ** block ncr interrupts
5084 int oldspl = splcam();
5085 np->lasttime = thistime;
5087 /*----------------------------------------------------
5089 ** handle ncr chip timeouts
5092 ** We have a chance to arbitrate for the
5093 ** SCSI bus at least every 10 seconds.
5095 **----------------------------------------------------
5098 t = thistime - np->heartbeat;
5100 if (t<2) np->latetime=0; else np->latetime++;
5102 if (np->latetime>2) {
5104 ** If there are no requests, the script
5105 ** processor will sleep on SEL_WAIT_RESEL.
5106 ** But we have to check whether it died.
5107 ** Let's try to wake it up.
5109 OUTB (nc_istat, SIGP);
5112 /*----------------------------------------------------
5114 ** handle nccb timeouts
5116 **----------------------------------------------------
5119 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5121 ** look for timed out nccbs.
5123 if (!cp->host_status) continue;
5125 if (cp->tlimit > thistime) continue;
5128 ** Disable reselect.
5129 ** Remove it from startqueue.
5131 cp->jump_nccb.l_cmd = (SCR_JUMP);
5132 if (cp->phys.header.launch.l_paddr ==
5133 NCB_SCRIPT_PHYS (np, select)) {
5134 printf ("%s: timeout nccb=%p (skip)\n",
5136 cp->phys.header.launch.l_paddr
5137 = NCB_SCRIPT_PHYS (np, skip);
5140 switch (cp->host_status) {
5146 cp->host_status=HS_TIMEOUT;
5151 ** wakeup this nccb.
5153 ncr_complete (np, cp);
5159 timeout (ncr_timeout, (caddr_t) np, step ? step : 1);
5161 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5164 ** Process pending interrupts.
5167 int oldspl = splcam();
5168 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{");
5170 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}");
5175 /*==========================================================
5177 ** log message for real hard errors
5179 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5180 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5182 ** exception register:
5187 ** so: control lines as driver by NCR.
5188 ** si: control lines as seen by NCR.
5189 ** sd: scsi data lines as seen by NCR.
5192 ** sxfer: (see the manual)
5193 ** scntl3: (see the manual)
5195 ** current script command:
5196 ** dsp: script address (relative to start of script).
5197 ** dbc: first word of script command.
5199 ** First 16 register of the chip:
5202 **==========================================================
5205 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5211 u_char *script_base;
5216 if (np->p_script < dsp &&
5217 dsp <= np->p_script + sizeof(struct script)) {
5218 script_ofs = dsp - np->p_script;
5219 script_size = sizeof(struct script);
5220 script_base = (u_char *) np->script;
5221 script_name = "script";
5223 else if (np->p_scripth < dsp &&
5224 dsp <= np->p_scripth + sizeof(struct scripth)) {
5225 script_ofs = dsp - np->p_scripth;
5226 script_size = sizeof(struct scripth);
5227 script_base = (u_char *) np->scripth;
5228 script_name = "scripth";
5233 script_name = "mem";
5236 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5237 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5238 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5239 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5240 (unsigned)INL (nc_dbc));
5242 if (((script_ofs & 3) == 0) &&
5243 (unsigned)script_ofs < script_size) {
5244 printf ("%s: script cmd = %08x\n", ncr_name(np),
5245 (int)READSCRIPT_OFF(script_base, script_ofs));
5248 printf ("%s: regdump:", ncr_name(np));
5250 printf (" %02x", (unsigned)INB_OFF(i));
5254 /*==========================================================
5257 ** ncr chip exception handler.
5260 **==========================================================
5263 static void ncr_exception (ncb_p np)
5265 u_char istat, dstat;
5269 ** interrupt on the fly ?
5271 while ((istat = INB (nc_istat)) & INTF) {
5272 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
5273 OUTB (nc_istat, INTF);
5274 np->profile.num_fly++;
5277 if (!(istat & (SIP|DIP))) {
5282 ** Steinbach's Guideline for Systems Programming:
5283 ** Never test for an error condition you don't know how to handle.
5286 sist = (istat & SIP) ? INW (nc_sist) : 0;
5287 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5288 np->profile.num_int++;
5290 if (DEBUG_FLAGS & DEBUG_TINY)
5291 printf ("<%d|%x:%x|%x:%x>",
5294 (unsigned)INL(nc_dsp),
5295 (unsigned)INL(nc_dbc));
5296 if ((dstat==DFE) && (sist==PAR)) return;
5298 /*==========================================================
5300 ** First the normal cases.
5302 **==========================================================
5304 /*-------------------------------------------
5306 **-------------------------------------------
5310 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5314 /*-------------------------------------------
5315 ** selection timeout
5317 ** IID excluded from dstat mask!
5319 **-------------------------------------------
5323 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5324 !(dstat & (MDPE|BF|ABRT|SIR))) {
5329 /*-------------------------------------------
5331 **-------------------------------------------
5335 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5336 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5337 ncr_int_ma (np, dstat);
5341 /*----------------------------------------
5342 ** move command with length 0
5343 **----------------------------------------
5346 if ((dstat & IID) &&
5347 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5348 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5349 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5351 ** Target wants more data than available.
5352 ** The "no_data" script will do it.
5354 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5358 /*-------------------------------------------
5359 ** Programmed interrupt
5360 **-------------------------------------------
5363 if ((dstat & SIR) &&
5364 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5365 !(dstat & (MDPE|BF|ABRT|IID)) &&
5366 (INB(nc_dsps) <= SIR_MAX)) {
5371 /*========================================
5372 ** log message for real hard errors
5373 **========================================
5376 ncr_log_hard_error(np, sist, dstat);
5378 /*========================================
5379 ** do the register dump
5380 **========================================
5383 if (time_second - np->regtime > 10) {
5385 np->regtime = time_second;
5386 for (i=0; i<sizeof(np->regdump); i++)
5387 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5388 np->regdump.nc_dstat = dstat;
5389 np->regdump.nc_sist = sist;
5393 /*----------------------------------------
5394 ** clean up the dma fifo
5395 **----------------------------------------
5398 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5399 (INB(nc_sstat1) & (FF3210) ) ||
5400 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5402 printf ("%s: have to clear fifos.\n", ncr_name (np));
5403 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5404 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5405 /* clear dma fifo */
5408 /*----------------------------------------
5409 ** handshake timeout
5410 **----------------------------------------
5414 printf ("%s: handshake timeout\n", ncr_name(np));
5415 OUTB (nc_scntl1, CRST);
5417 OUTB (nc_scntl1, 0x00);
5418 OUTB (nc_scr0, HS_FAIL);
5419 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5423 /*----------------------------------------
5424 ** unexpected disconnect
5425 **----------------------------------------
5429 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5430 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5431 OUTB (nc_scr0, HS_UNEXPECTED);
5432 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5436 /*----------------------------------------
5437 ** cannot disconnect
5438 **----------------------------------------
5441 if ((dstat & IID) &&
5442 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5443 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5444 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5446 ** Unexpected data cycle while waiting for disconnect.
5448 if (INB(nc_sstat2) & LDSC) {
5450 ** It's an early reconnect.
5451 ** Let's continue ...
5453 OUTB (nc_dcntl, np->rv_dcntl | STD);
5457 printf ("%s: INFO: LDSC while IID.\n",
5461 printf ("%s: target %d doesn't release the bus.\n",
5462 ncr_name (np), INB (nc_sdid)&0x0f);
5464 ** return without restarting the NCR.
5465 ** timeout will do the real work.
5470 /*----------------------------------------
5472 **----------------------------------------
5475 if ((dstat & SSI) &&
5476 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5477 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5478 OUTB (nc_dcntl, np->rv_dcntl | STD);
5483 ** @RECOVER@ HTH, SGE, ABRT.
5485 ** We should try to recover from these interrupts.
5486 ** They may occur if there are problems with synch transfers, or
5487 ** if targets are switched on or off while the driver is running.
5491 /* clear scsi offsets */
5492 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5496 ** Freeze controller to be able to read the messages.
5499 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5502 for (i=0; i<0x60; i++) {
5506 printf ("%s: reg[%d0]: ",
5515 val = bus_space_read_1(np->bst, np->bsh, i);
5516 printf (" %x%x", val/16, val%16);
5517 if (i%16==15) printf (".\n");
5520 untimeout (ncr_timeout, (caddr_t) np, np->timeout_ch);
5522 printf ("%s: halted!\n", ncr_name(np));
5524 ** don't restart controller ...
5526 OUTB (nc_istat, SRST);
5532 ** Freeze system to be able to read the messages.
5534 printf ("ncr: fatal error: system halted - press reset to reboot ...");
5540 ** sorry, have to kill ALL jobs ...
5543 ncr_init (np, "fatal error", HS_FAIL);
5546 /*==========================================================
5548 ** ncr chip exception handler for selection timeout
5550 **==========================================================
5552 ** There seems to be a bug in the 53c810.
5553 ** Although a STO-Interrupt is pending,
5554 ** it continues executing script commands.
5555 ** But it will fail and interrupt (IID) on
5556 ** the next instruction where it's looking
5557 ** for a valid phase.
5559 **----------------------------------------------------------
5562 static void ncr_int_sto (ncb_p np)
5564 u_long dsa, scratcha, diff;
5566 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
5569 ** look for nccb and set the status.
5574 while (cp && (CCB_PHYS (cp, phys) != dsa))
5578 cp-> host_status = HS_SEL_TIMEOUT;
5579 ncr_complete (np, cp);
5583 ** repair start queue
5586 scratcha = INL (nc_scratcha);
5587 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5589 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5591 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5592 WRITESCRIPT(startpos[0], scratcha);
5593 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5596 ncr_init (np, "selection timeout", HS_FAIL);
5599 /*==========================================================
5602 ** ncr chip exception handler for phase errors.
5605 **==========================================================
5607 ** We have to construct a new transfer descriptor,
5608 ** to transfer the rest of the current block.
5610 **----------------------------------------------------------
5613 static void ncr_int_ma (ncb_p np, u_char dstat)
5620 volatile void *vdsp_base;
5622 u_int32_t oadr, olen;
5623 u_int32_t *tblp, *newcmd;
5624 u_char cmd, sbcl, ss0, ss2, ctest5;
5631 ss0 = INB (nc_sstat0);
5632 ss2 = INB (nc_sstat2);
5633 sbcl= INB (nc_sbcl);
5636 rest= dbc & 0xffffff;
5638 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5640 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5642 delta=(INB (nc_dfifo) - rest) & 0x7f;
5646 ** The data in the dma fifo has not been transfered to
5647 ** the target -> add the amount to the rest
5648 ** and clear the data.
5649 ** Check the sstat2 register in case of wide transfer.
5652 if (!(dstat & DFE)) rest += delta;
5653 if (ss0 & OLF) rest++;
5654 if (ss0 & ORF) rest++;
5655 if (INB(nc_scntl3) & EWS) {
5656 if (ss2 & OLF1) rest++;
5657 if (ss2 & ORF1) rest++;
5659 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5660 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5663 ** locate matching cp
5666 while (cp && (CCB_PHYS (cp, phys) != dsa))
5670 printf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5671 ncr_name (np), (void *) np->header.cp);
5674 if (cp != np->header.cp) {
5675 printf ("%s: SCSI phase error fixup: CCB address mismatch "
5676 "(%p != %p) np->nccb = %p\n",
5677 ncr_name (np), (void *)cp, (void *)np->header.cp,
5678 (void *)np->link_nccb);
5683 ** find the interrupted script command,
5684 ** and the address at which to continue.
5687 if (dsp == vtophys (&cp->patch[2])) {
5689 vdsp_off = offsetof(struct nccb, patch[0]);
5690 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5691 } else if (dsp == vtophys (&cp->patch[6])) {
5693 vdsp_off = offsetof(struct nccb, patch[4]);
5694 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5695 } else if (dsp > np->p_script &&
5696 dsp <= np->p_script + sizeof(struct script)) {
5697 vdsp_base = np->script;
5698 vdsp_off = dsp - np->p_script - 8;
5701 vdsp_base = np->scripth;
5702 vdsp_off = dsp - np->p_scripth - 8;
5707 ** log the information
5709 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5710 printf ("P%x%x ",cmd&7, sbcl&7);
5711 printf ("RL=%d D=%d SS0=%x ",
5712 (unsigned) rest, (unsigned) delta, ss0);
5714 if (DEBUG_FLAGS & DEBUG_PHASE) {
5715 printf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5718 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5722 ** get old startaddress and old length.
5725 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5727 if (cmd & 0x10) { /* Table indirect */
5728 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5732 tblp = (u_int32_t *) 0;
5733 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5736 if (DEBUG_FLAGS & DEBUG_PHASE) {
5737 printf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5738 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5745 ** if old phase not dataphase, leave here.
5748 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5749 PRINT_ADDR(cp->ccb);
5750 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5752 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5757 PRINT_ADDR(cp->ccb);
5758 printf ("phase change %x-%x %d@%08x resid=%d.\n",
5759 cmd&7, sbcl&7, (unsigned)olen,
5760 (unsigned)oadr, (unsigned)rest);
5762 OUTB (nc_dcntl, np->rv_dcntl | STD);
5767 ** choose the correct patch area.
5768 ** if savep points to one, choose the other.
5772 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5775 ** fillin the commands
5778 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5779 newcmd[1] = oadr + olen - rest;
5780 newcmd[2] = SCR_JUMP;
5783 if (DEBUG_FLAGS & DEBUG_PHASE) {
5784 PRINT_ADDR(cp->ccb);
5785 printf ("newcmd[%d] %x %x %x %x.\n",
5786 (int)(newcmd - cp->patch),
5787 (unsigned)newcmd[0],
5788 (unsigned)newcmd[1],
5789 (unsigned)newcmd[2],
5790 (unsigned)newcmd[3]);
5793 ** fake the return address (to the patch).
5794 ** and restart script processor at dispatcher.
5796 np->profile.num_break++;
5797 OUTL (nc_temp, vtophys (newcmd));
5799 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5801 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5804 /*==========================================================
5807 ** ncr chip exception handler for programmed interrupts.
5810 **==========================================================
5813 static int ncr_show_msg (u_char * msg)
5817 if (*msg==MSG_EXTENDED) {
5819 if (i-1>msg[1]) break;
5820 printf ("-%x",msg[i]);
5823 } else if ((*msg & 0xf0) == 0x20) {
5824 printf ("-%x",msg[1]);
5830 static void ncr_int_sir (ncb_p np)
5833 u_char chg, ofs, per, fak, wide;
5834 u_char num = INB (nc_dsps);
5837 u_int target = INB (nc_sdid) & 0x0f;
5838 tcb_p tp = &np->target[target];
5840 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
5843 case SIR_SENSE_RESTART:
5844 case SIR_STALL_RESTART:
5853 while (cp && (CCB_PHYS (cp, phys) != dsa))
5859 assert (cp == np->header.cp);
5860 if (cp != np->header.cp)
5866 /*--------------------------------------------------------------------
5868 ** Processing of interrupted getcc selects
5870 **--------------------------------------------------------------------
5873 case SIR_SENSE_RESTART:
5874 /*------------------------------------------
5875 ** Script processor is idle.
5876 ** Look for interrupted "check cond"
5877 **------------------------------------------
5880 if (DEBUG_FLAGS & DEBUG_RESTART)
5881 printf ("%s: int#%d",ncr_name (np),num);
5883 for (i=0; i<MAX_TARGET; i++) {
5884 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i);
5885 tp = &np->target[i];
5886 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5889 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5890 if ((cp->host_status==HS_BUSY) &&
5891 (cp->s_status==SCSI_STATUS_CHECK_COND))
5893 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)");
5894 tp->hold_cp = cp = (nccb_p) 0;
5898 if (DEBUG_FLAGS & DEBUG_RESTART)
5899 printf ("+ restart job ..\n");
5900 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5901 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5906 ** no job, resume normal processing
5908 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n");
5909 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5912 case SIR_SENSE_FAILED:
5913 /*-------------------------------------------
5914 ** While trying to select for
5915 ** getting the condition code,
5916 ** a target reselected us.
5917 **-------------------------------------------
5919 if (DEBUG_FLAGS & DEBUG_RESTART) {
5920 PRINT_ADDR(cp->ccb);
5921 printf ("in getcc reselect by t%d.\n",
5922 INB(nc_ssid) & 0x0f);
5928 cp->host_status = HS_BUSY;
5929 cp->s_status = SCSI_STATUS_CHECK_COND;
5930 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5933 ** And patch code to restart it.
5935 WRITESCRIPT(start0[0], SCR_INT);
5938 /*-----------------------------------------------------------------------------
5940 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5942 ** We try to negotiate sync and wide transfer only after
5943 ** a successfull inquire command. We look at byte 7 of the
5944 ** inquire data to determine the capabilities if the target.
5946 ** When we try to negotiate, we append the negotiation message
5947 ** to the identify and (maybe) simple tag message.
5948 ** The host status field is set to HS_NEGOTIATE to mark this
5951 ** If the target doesn't answer this message immidiately
5952 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5953 ** will be raised eventually.
5954 ** The handler removes the HS_NEGOTIATE status, and sets the
5955 ** negotiated value to the default (async / nowide).
5957 ** If we receive a matching answer immediately, we check it
5958 ** for validity, and set the values.
5960 ** If we receive a Reject message immediately, we assume the
5961 ** negotiation has failed, and fall back to standard values.
5963 ** If we receive a negotiation message while not in HS_NEGOTIATE
5964 ** state, it's a target initiated negotiation. We prepare a
5965 ** (hopefully) valid answer, set our parameters, and send back
5966 ** this answer to the target.
5968 ** If the target doesn't fetch the answer (no message out phase),
5969 ** we assume the negotiation has failed, and fall back to default
5972 ** When we set the values, we adjust them in all nccbs belonging
5973 ** to this target, in the controller's register, and in the "phys"
5974 ** field of the controller's struct ncb.
5976 ** Possible cases: hs sir msg_in value send goto
5977 ** We try try to negotiate:
5978 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
5979 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
5980 ** -> target answered (ok) NEG SYNC sdtr set - clrack
5981 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
5982 ** -> target answered (ok) NEG WIDE wdtr set - clrack
5983 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
5984 ** -> any other msgin NEG FAIL noop defa. - dispatch
5986 ** Target tries to negotiate:
5987 ** -> incoming message --- SYNC sdtr set SDTR -
5988 ** -> incoming message --- WIDE wdtr set WDTR -
5989 ** We sent our answer:
5990 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
5992 **-----------------------------------------------------------------------------
5995 case SIR_NEGO_FAILED:
5996 /*-------------------------------------------------------
5998 ** Negotiation failed.
5999 ** Target doesn't send an answer message,
6000 ** or target rejected our message.
6002 ** Remove negotiation request.
6004 **-------------------------------------------------------
6006 OUTB (HS_PRT, HS_BUSY);
6010 case SIR_NEGO_PROTO:
6011 /*-------------------------------------------------------
6013 ** Negotiation failed.
6014 ** Target doesn't fetch the answer message.
6016 **-------------------------------------------------------
6019 if (DEBUG_FLAGS & DEBUG_NEGO) {
6020 PRINT_ADDR(cp->ccb);
6021 printf ("negotiation failed sir=%x status=%x.\n",
6022 num, cp->nego_status);
6026 ** any error in negotiation:
6027 ** fall back to default mode.
6029 switch (cp->nego_status) {
6032 ncr_setsync (np, cp, 0, 0xe0, 0);
6036 ncr_setwide (np, cp, 0, 0);
6040 np->msgin [0] = MSG_NOOP;
6041 np->msgout[0] = MSG_NOOP;
6042 cp->nego_status = 0;
6043 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6048 ** Synchronous request message received.
6051 if (DEBUG_FLAGS & DEBUG_NEGO) {
6052 PRINT_ADDR(cp->ccb);
6053 printf ("sync msgin: ");
6054 (void) ncr_show_msg (np->msgin);
6059 ** get requested values.
6065 if (ofs==0) per=255;
6068 ** check values against driver limits.
6070 if (per < np->minsync)
6071 {chg = 1; per = np->minsync;}
6072 if (per < tp->tinfo.user.period)
6073 {chg = 1; per = tp->tinfo.user.period;}
6074 if (ofs > tp->tinfo.user.offset)
6075 {chg = 1; ofs = tp->tinfo.user.offset;}
6078 ** Check against controller limits.
6084 ncr_getsync(np, per, &fak, &scntl3);
6096 if (DEBUG_FLAGS & DEBUG_NEGO) {
6097 PRINT_ADDR(cp->ccb);
6098 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6099 per, scntl3, ofs, fak, chg);
6102 if (INB (HS_PRT) == HS_NEGOTIATE) {
6103 OUTB (HS_PRT, HS_BUSY);
6104 switch (cp->nego_status) {
6108 ** This was an answer message
6112 ** Answer wasn't acceptable.
6114 ncr_setsync (np, cp, 0, 0xe0, 0);
6115 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6120 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6121 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6126 ncr_setwide (np, cp, 0, 0);
6132 ** It was a request. Set value and
6133 ** prepare an answer message
6136 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6138 np->msgout[0] = MSG_EXTENDED;
6140 np->msgout[2] = MSG_EXT_SDTR;
6141 np->msgout[3] = per;
6142 np->msgout[4] = ofs;
6144 cp->nego_status = NS_SYNC;
6146 if (DEBUG_FLAGS & DEBUG_NEGO) {
6147 PRINT_ADDR(cp->ccb);
6148 printf ("sync msgout: ");
6149 (void) ncr_show_msg (np->msgout);
6154 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6157 np->msgin [0] = MSG_NOOP;
6163 ** Wide request message received.
6165 if (DEBUG_FLAGS & DEBUG_NEGO) {
6166 PRINT_ADDR(cp->ccb);
6167 printf ("wide msgin: ");
6168 (void) ncr_show_msg (np->msgin);
6173 ** get requested values.
6177 wide = np->msgin[3];
6180 ** check values against driver limits.
6183 if (wide > tp->tinfo.user.width)
6184 {chg = 1; wide = tp->tinfo.user.width;}
6186 if (DEBUG_FLAGS & DEBUG_NEGO) {
6187 PRINT_ADDR(cp->ccb);
6188 printf ("wide: wide=%d chg=%d.\n", wide, chg);
6191 if (INB (HS_PRT) == HS_NEGOTIATE) {
6192 OUTB (HS_PRT, HS_BUSY);
6193 switch (cp->nego_status) {
6197 ** This was an answer message
6201 ** Answer wasn't acceptable.
6203 ncr_setwide (np, cp, 0, 1);
6204 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6209 ncr_setwide (np, cp, wide, 1);
6210 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6215 ncr_setsync (np, cp, 0, 0xe0, 0);
6221 ** It was a request, set value and
6222 ** prepare an answer message
6225 ncr_setwide (np, cp, wide, 1);
6227 np->msgout[0] = MSG_EXTENDED;
6229 np->msgout[2] = MSG_EXT_WDTR;
6230 np->msgout[3] = wide;
6232 np->msgin [0] = MSG_NOOP;
6234 cp->nego_status = NS_WIDE;
6236 if (DEBUG_FLAGS & DEBUG_NEGO) {
6237 PRINT_ADDR(cp->ccb);
6238 printf ("wide msgout: ");
6239 (void) ncr_show_msg (np->msgout);
6244 /*--------------------------------------------------------------------
6246 ** Processing of special messages
6248 **--------------------------------------------------------------------
6251 case SIR_REJECT_RECEIVED:
6252 /*-----------------------------------------------
6254 ** We received a MSG_MESSAGE_REJECT message.
6256 **-----------------------------------------------
6259 PRINT_ADDR(cp->ccb);
6260 printf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6261 (unsigned)np->lastmsg, np->msgout[0]);
6264 case SIR_REJECT_SENT:
6265 /*-----------------------------------------------
6267 ** We received an unknown message
6269 **-----------------------------------------------
6272 PRINT_ADDR(cp->ccb);
6273 printf ("MSG_MESSAGE_REJECT sent for ");
6274 (void) ncr_show_msg (np->msgin);
6278 /*--------------------------------------------------------------------
6280 ** Processing of special messages
6282 **--------------------------------------------------------------------
6285 case SIR_IGN_RESIDUE:
6286 /*-----------------------------------------------
6288 ** We received an IGNORE RESIDUE message,
6289 ** which couldn't be handled by the script.
6291 **-----------------------------------------------
6294 PRINT_ADDR(cp->ccb);
6295 printf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6298 case SIR_MISSING_SAVE:
6299 /*-----------------------------------------------
6301 ** We received an DISCONNECT message,
6302 ** but the datapointer wasn't saved before.
6304 **-----------------------------------------------
6307 PRINT_ADDR(cp->ccb);
6308 printf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6309 "\tdata=%x save=%x goal=%x.\n",
6310 (unsigned) INL (nc_temp),
6311 (unsigned) np->header.savep,
6312 (unsigned) np->header.goalp);
6315 /*--------------------------------------------------------------------
6317 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6319 ** XXX JGibbs - We should do the same thing for BUSY status.
6321 ** The current command has been rejected,
6322 ** because there are too many in the command queue.
6323 ** We have started too many commands for that target.
6325 **--------------------------------------------------------------------
6327 case SIR_STALL_QUEUE:
6328 cp->xerr_status = XE_OK;
6329 cp->host_status = HS_COMPLETE;
6330 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6331 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6332 ncr_complete(np, cp);
6336 case SIR_STALL_RESTART:
6337 /*-----------------------------------------------
6339 ** Enable selecting again,
6340 ** if NO disconnected jobs.
6342 **-----------------------------------------------
6345 ** Look for a disconnected job.
6348 while (cp && cp->host_status != HS_DISCONNECT)
6352 ** if there is one, ...
6356 ** wait for reselection
6358 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6363 ** else remove the interrupt.
6366 printf ("%s: queue empty.\n", ncr_name (np));
6367 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6372 OUTB (nc_dcntl, np->rv_dcntl | STD);
6375 /*==========================================================
6378 ** Aquire a control block
6381 **==========================================================
6384 static nccb_p ncr_get_nccb
6385 (ncb_p np, u_long target, u_long lun)
6391 /* Keep our timeout handler out */
6395 ** Lun structure available ?
6398 lp = np->target[target].lp[lun];
6403 ** Look for free CCB
6406 while (cp && cp->magic) {
6412 ** if nothing available, create one.
6416 cp = ncr_alloc_nccb(np, target, lun);
6420 printf("%s: Bogus free cp found\n", ncr_name(np));
6430 /*==========================================================
6433 ** Release one control block
6436 **==========================================================
6439 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6445 assert (cp != NULL);
6447 cp -> host_status = HS_IDLE;
6451 /*==========================================================
6454 ** Allocation of resources for Targets/Luns/Tags.
6457 **==========================================================
6461 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6467 assert (np != NULL);
6469 if (target>=MAX_TARGET) return(NULL);
6470 if (lun >=MAX_LUN ) return(NULL);
6472 tp=&np->target[target];
6474 if (!tp->jump_tcb.l_cmd) {
6479 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6480 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6483 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6484 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6485 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6487 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6488 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6489 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6491 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6492 (offsetof(struct tcb ,tinfo)
6493 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6494 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6495 (offsetof(struct tcb, tinfo)
6496 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6498 tp->call_lun.l_cmd = (SCR_CALL);
6499 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6501 tp->jump_lcb.l_cmd = (SCR_JUMP);
6502 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6503 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6507 ** Logic unit control block
6514 lp = (lcb_p) malloc (sizeof (struct lcb), M_DEVBUF,
6516 if (!lp) return(NULL);
6521 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6522 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6524 lp->call_tag.l_cmd = (SCR_CALL);
6525 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6527 lp->jump_nccb.l_cmd = (SCR_JUMP);
6528 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6533 ** Chain into LUN list
6535 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6543 cp = (nccb_p) malloc (sizeof (struct nccb), M_DEVBUF, M_NOWAIT|M_ZERO);
6548 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6549 printf ("new nccb @%p.\n", cp);
6553 ** Fill in physical addresses
6556 cp->p_nccb = vtophys (cp);
6559 ** Chain into reselect list
6561 cp->jump_nccb.l_cmd = SCR_JUMP;
6562 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6563 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6564 cp->call_tmp.l_cmd = SCR_CALL;
6565 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6568 ** Chain into wakeup list
6570 cp->link_nccb = np->link_nccb;
6574 ** Chain into CCB list
6576 cp->next_nccb = lp->next_nccb;
6582 /*==========================================================
6585 ** Build Scatter Gather Block
6588 **==========================================================
6590 ** The transfer area may be scattered among
6591 ** several non adjacent physical pages.
6593 ** We may use MAX_SCATTER blocks.
6595 **----------------------------------------------------------
6598 static int ncr_scatter
6599 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6601 u_long paddr, pnext;
6603 u_short segment = 0;
6604 u_long segsize, segaddr;
6605 u_long size, csize = 0;
6606 u_long chunk = MAX_SIZE;
6609 bzero (&phys->data, sizeof (phys->data));
6610 if (!datalen) return (0);
6612 paddr = vtophys (vaddr);
6615 ** insert extra break points at a distance of chunk.
6616 ** We try to reduce the number of interrupts caused
6617 ** by unexpected phase changes due to disconnects.
6618 ** A typical harddisk may disconnect before ANY block.
6619 ** If we wanted to avoid unexpected phase changes at all
6620 ** we had to use a break point every 512 bytes.
6621 ** Of course the number of scatter/gather blocks is
6625 free = MAX_SCATTER - 1;
6627 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6630 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6633 if(DEBUG_FLAGS & DEBUG_SCATTER)
6634 printf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6635 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6638 ** Build data descriptors.
6640 while (datalen && (segment < MAX_SCATTER)) {
6643 ** this segment is empty
6649 if (!csize) csize = chunk;
6651 while ((datalen) && (paddr == pnext) && (csize)) {
6654 ** continue this segment
6656 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6662 size = pnext - paddr; /* page size */
6663 if (size > datalen) size = datalen; /* data size */
6664 if (size > csize ) size = csize ; /* chunksize */
6670 paddr = vtophys (vaddr);
6673 if(DEBUG_FLAGS & DEBUG_SCATTER)
6674 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6678 (unsigned) datalen);
6680 phys->data[segment].addr = segaddr;
6681 phys->data[segment].size = segsize;
6686 printf("ncr?: scatter/gather failed (residue=%d).\n",
6687 (unsigned) datalen);
6694 /*==========================================================
6697 ** Test the pci bus snoop logic :-(
6699 ** Has to be called with interrupts disabled.
6702 **==========================================================
6705 #ifndef NCR_IOMAPPED
6706 static int ncr_regtest (struct ncb* np)
6708 register volatile u_int32_t data;
6710 ** ncr registers may NOT be cached.
6711 ** write 0xffffffff to a read only register area,
6712 ** and try to read it back.
6715 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6716 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6718 if (data == 0xffffffff) {
6720 if ((data & 0xe2f0fffd) != 0x02000080) {
6722 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6730 static int ncr_snooptest (struct ncb* np)
6732 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6734 #ifndef NCR_IOMAPPED
6735 err |= ncr_regtest (np);
6736 if (err) return (err);
6741 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6745 ** Set memory and register.
6747 ncr_cache = host_wr;
6748 OUTL (nc_temp, ncr_wr);
6750 ** Start script (exchange values)
6754 ** Wait 'til done (with timeout)
6756 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6757 if (INB(nc_istat) & (INTF|SIP|DIP))
6760 ** Save termination position.
6764 ** Read memory and register.
6766 host_rd = ncr_cache;
6767 ncr_rd = INL (nc_scratcha);
6768 ncr_bk = INL (nc_temp);
6772 OUTB (nc_istat, SRST);
6774 OUTB (nc_istat, 0 );
6776 ** check for timeout
6778 if (i>=NCR_SNOOP_TIMEOUT) {
6779 printf ("CACHE TEST FAILED: timeout.\n");
6783 ** Check termination position.
6785 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6786 printf ("CACHE TEST FAILED: script execution failed.\n");
6787 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6788 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6789 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6795 if (host_wr != ncr_rd) {
6796 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6797 (int) host_wr, (int) ncr_rd);
6800 if (host_rd != ncr_wr) {
6801 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6802 (int) ncr_wr, (int) host_rd);
6805 if (ncr_bk != ncr_wr) {
6806 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6807 (int) ncr_wr, (int) ncr_bk);
6813 /*==========================================================
6816 ** Profiling the drivers and targets performance.
6819 **==========================================================
6823 ** Compute the difference in milliseconds.
6826 static int ncr_delta (int *from, int *to)
6828 if (!from) return (-1);
6829 if (!to) return (-2);
6830 return ((to - from) * 1000 / hz);
6833 #define PROFILE cp->phys.header.stamp
6834 static void ncb_profile (ncb_p np, nccb_p cp)
6836 int co, da, st, en, di, se, post,work,disc;
6839 PROFILE.end = ticks;
6841 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6842 if (st<0) return; /* status not reached */
6844 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6845 if (da<0) return; /* No data transfer phase */
6847 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6848 if (co<0) return; /* command not executed */
6850 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6851 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6852 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6856 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6859 if (di>=0) disc = se-di; else disc = 0;
6861 work = (st - co) - disc;
6863 diff = (np->disc_phys - np->disc_ref) & 0xff;
6864 np->disc_ref += diff;
6866 np->profile.num_trans += 1;
6868 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6869 np->profile.num_disc += diff;
6870 np->profile.ms_setup += co;
6871 np->profile.ms_data += work;
6872 np->profile.ms_disc += disc;
6873 np->profile.ms_post += post;
6877 /*==========================================================
6879 ** Determine the ncr's clock frequency.
6880 ** This is essential for the negotiation
6881 ** of the synchronous transfer rate.
6883 **==========================================================
6885 ** Note: we have to return the correct value.
6886 ** THERE IS NO SAVE DEFAULT VALUE.
6888 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6889 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6890 ** do not have a clock doubler and so are provided with a
6891 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6892 ** and so should be delivered with a 40 MHz clock.
6893 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6894 ** and provide a clock quadrupler (160 Mhz). The code below
6895 ** tries to deal as cleverly as possible with all this stuff.
6897 **----------------------------------------------------------
6901 * Select NCR SCSI clock frequency
6903 static void ncr_selectclock(ncb_p np, u_char scntl3)
6905 if (np->multiplier < 2) {
6906 OUTB(nc_scntl3, scntl3);
6910 if (bootverbose >= 2)
6911 printf ("%s: enabling clock multiplier\n", ncr_name(np));
6913 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6914 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6916 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6919 printf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6920 } else /* Wait 20 micro-seconds for doubler */
6922 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6923 OUTB(nc_scntl3, scntl3);
6924 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6925 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6929 * calculate NCR SCSI clock frequency (in KHz)
6932 ncrgetfreq (ncb_p np, int gen)
6936 * Measure GEN timer delay in order
6937 * to calculate SCSI clock frequency
6939 * This code will never execute too
6940 * many loop iterations (if DELAY is
6941 * reasonably correct). It could get
6942 * too low a delay (too high a freq.)
6943 * if the CPU is slow executing the
6944 * loop for some reason (an NMI, for
6945 * example). For this reason we will
6946 * if multiple measurements are to be
6947 * performed trust the higher delay
6948 * (lower frequency returned).
6950 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6951 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6952 (void) INW (nc_sist); /* clear pending scsi interrupt */
6953 OUTB (nc_dien , 0); /* mask all dma interrupts */
6954 (void) INW (nc_sist); /* another one, just to be sure :) */
6955 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6956 OUTB (nc_stime1, 0); /* disable general purpose timer */
6957 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6958 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6959 DELAY(1000); /* count ms */
6960 OUTB (nc_stime1, 0); /* disable general purpose timer */
6961 OUTB (nc_scntl3, 0);
6963 * Set prescaler to divide by whatever "0" means.
6964 * "0" ought to choose divide by 2, but appears
6965 * to set divide by 3.5 mode in my 53c810 ...
6967 OUTB (nc_scntl3, 0);
6969 if (bootverbose >= 2)
6970 printf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6972 * adjust for prescaler, and convert into KHz
6974 return ms ? ((1 << gen) * 4440) / ms : 0;
6977 static void ncr_getclock (ncb_p np, u_char multiplier)
6979 unsigned char scntl3;
6980 unsigned char stest1;
6981 scntl3 = INB(nc_scntl3);
6982 stest1 = INB(nc_stest1);
6986 if (multiplier > 1) {
6987 np->multiplier = multiplier;
6988 np->clock_khz = 40000 * multiplier;
6990 if ((scntl3 & 7) == 0) {
6992 /* throw away first result */
6993 (void) ncrgetfreq (np, 11);
6994 f1 = ncrgetfreq (np, 11);
6995 f2 = ncrgetfreq (np, 11);
6997 if (bootverbose >= 2)
6998 printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
6999 if (f1 > f2) f1 = f2; /* trust lower result */
7001 scntl3 = 5; /* >45Mhz: assume 80MHz */
7003 scntl3 = 3; /* <45Mhz: assume 40MHz */
7006 else if ((scntl3 & 7) == 5)
7007 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7011 /*=========================================================================*/
7013 #ifdef NCR_TEKRAM_EEPROM
7015 struct tekram_eeprom_dev {
7017 #define TKR_PARCHK 0x01
7018 #define TKR_TRYSYNC 0x02
7019 #define TKR_ENDISC 0x04
7020 #define TKR_STARTUNIT 0x08
7021 #define TKR_USETAGS 0x10
7022 #define TKR_TRYWIDE 0x20
7023 u_char syncparam; /* max. sync transfer rate (table ?) */
7029 struct tekram_eeprom {
7030 struct tekram_eeprom_dev
7034 #define TKR_ADPT_GT2DRV 0x01
7035 #define TKR_ADPT_GT1GB 0x02
7036 #define TKR_ADPT_RSTBUS 0x04
7037 #define TKR_ADPT_ACTNEG 0x08
7038 #define TKR_ADPT_NOSEEK 0x10
7039 #define TKR_ADPT_MORLUN 0x20
7040 u_char delay; /* unit ? ( table ??? ) */
7041 u_char tags; /* use 4 times as many ... */
7046 tekram_write_bit (ncb_p np, int bit)
7048 u_char val = 0x10 + ((bit & 1) << 1);
7051 OUTB (nc_gpreg, val);
7053 OUTB (nc_gpreg, val | 0x04);
7055 OUTB (nc_gpreg, val);
7060 tekram_read_bit (ncb_p np)
7062 OUTB (nc_gpreg, 0x10);
7064 OUTB (nc_gpreg, 0x14);
7066 return INB (nc_gpreg) & 1;
7070 read_tekram_eeprom_reg (ncb_p np, int reg)
7074 int cmd = 0x80 | reg;
7076 OUTB (nc_gpreg, 0x10);
7078 tekram_write_bit (np, 1);
7079 for (bit = 7; bit >= 0; bit--)
7081 tekram_write_bit (np, cmd >> bit);
7084 for (bit = 0; bit < 16; bit++)
7087 result |= tekram_read_bit (np);
7090 OUTB (nc_gpreg, 0x00);
7095 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7097 u_short *p = (u_short *) buffer;
7101 if (INB (nc_gpcntl) != 0x09)
7105 for (i = 0; i < 64; i++)
7108 if((i&0x0f) == 0) printf ("%02x:", i*2);
7109 val = read_tekram_eeprom_reg (np, i);
7113 if((i&0x01) == 0x00) printf (" ");
7114 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7115 if((i&0x0f) == 0x0f) printf ("\n");
7117 printf ("Sum = %04x\n", sum);
7118 return sum == 0x1234;
7120 #endif /* NCR_TEKRAM_EEPROM */
7122 static device_method_t ncr_methods[] = {
7123 /* Device interface */
7124 DEVMETHOD(device_probe, ncr_probe),
7125 DEVMETHOD(device_attach, ncr_attach),
7130 static driver_t ncr_driver = {
7136 static devclass_t ncr_devclass;
7138 DRIVER_MODULE(ncr, pci, ncr_driver, ncr_devclass, 0, 0);
7139 MODULE_DEPEND(ncr, cam, 1, 1, 1);
7140 MODULE_DEPEND(ncr, pci, 1, 1, 1);
7142 /*=========================================================================*/
7143 #endif /* _KERNEL */