1 /**************************************************************************
4 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family.
6 **-------------------------------------------------------------------------
8 ** Written for 386bsd and FreeBSD by
9 ** Wolfgang Stanglmeier <wolf@cologne.de>
10 ** Stefan Esser <se@mi.Uni-Koeln.de>
12 **-------------------------------------------------------------------------
14 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved.
16 ** Redistribution and use in source and binary forms, with or without
17 ** modification, are permitted provided that the following conditions
19 ** 1. Redistributions of source code must retain the above copyright
20 ** notice, this list of conditions and the following disclaimer.
21 ** 2. Redistributions in binary form must reproduce the above copyright
22 ** notice, this list of conditions and the following disclaimer in the
23 ** documentation and/or other materials provided with the distribution.
24 ** 3. The name of the author may not be used to endorse or promote products
25 ** derived from this software without specific prior written permission.
27 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
28 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
31 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
32 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
36 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 ***************************************************************************
41 #include <sys/cdefs.h>
42 __FBSDID("$FreeBSD$");
45 #define NCR_DATE "pl30 98/1/1"
47 #define NCR_VERSION (2)
48 #define MAX_UNITS (16)
50 #define NCR_GETCC_WITHMSG
52 #if defined (__FreeBSD__) && defined(_KERNEL)
56 /*==========================================================
58 ** Configuration and Debugging
60 ** May be overwritten in <arch/conf/xxxx>
62 **==========================================================
66 ** SCSI address of this device.
67 ** The boot routines should have set it.
71 #ifndef SCSI_NCR_MYADDR
72 #define SCSI_NCR_MYADDR (7)
73 #endif /* SCSI_NCR_MYADDR */
76 ** The default synchronous period factor
78 ** If maximum synchronous frequency is defined, use it instead.
81 #ifndef SCSI_NCR_MAX_SYNC
83 #ifndef SCSI_NCR_DFLT_SYNC
84 #define SCSI_NCR_DFLT_SYNC (12)
85 #endif /* SCSI_NCR_DFLT_SYNC */
89 #if SCSI_NCR_MAX_SYNC == 0
90 #define SCSI_NCR_DFLT_SYNC 0
92 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC)
98 ** The minimal asynchronous pre-scaler period (ns)
102 #ifndef SCSI_NCR_MIN_ASYNC
103 #define SCSI_NCR_MIN_ASYNC (40)
104 #endif /* SCSI_NCR_MIN_ASYNC */
107 ** The maximal bus with (in log2 byte)
108 ** (0=8 bit, 1=16 bit)
111 #ifndef SCSI_NCR_MAX_WIDE
112 #define SCSI_NCR_MAX_WIDE (1)
113 #endif /* SCSI_NCR_MAX_WIDE */
115 /*==========================================================
117 ** Configuration and Debugging
119 **==========================================================
123 ** Number of targets supported by the driver.
124 ** n permits target numbers 0..n-1.
125 ** Default is 7, meaning targets #0..#6.
129 #define MAX_TARGET (16)
132 ** Number of logic units supported by the driver.
133 ** n enables logic unit numbers 0..n-1.
134 ** The common SCSI devices require only
135 ** one lun, so take 1 as the default.
143 ** The maximum number of jobs scheduled for starting.
144 ** There should be one slot per target, and one slot
145 ** for each tag of each target in use.
148 #define MAX_START (256)
151 ** The maximum number of segments a transfer is split into.
154 #define MAX_SCATTER (33)
157 ** The maximum transfer length (should be >= 64k).
158 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE.
161 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE)
167 #define NCR_SNOOP_TIMEOUT (1000000)
169 /*==========================================================
173 **==========================================================
176 #include <sys/param.h>
177 #include <sys/time.h>
180 #include <sys/systm.h>
181 #include <sys/malloc.h>
182 #include <sys/kernel.h>
183 #include <sys/sysctl.h>
185 #include <machine/md_var.h>
186 #include <machine/bus.h>
187 #include <machine/resource.h>
188 #include <sys/rman.h>
191 #include <vm/vm_extern.h>
194 #include <dev/pci/pcivar.h>
195 #include <dev/pci/pcireg.h>
196 #include <pci/ncrreg.h>
199 #include <cam/cam_ccb.h>
200 #include <cam/cam_sim.h>
201 #include <cam/cam_xpt_sim.h>
202 #include <cam/cam_debug.h>
204 #include <cam/scsi/scsi_all.h>
205 #include <cam/scsi/scsi_message.h>
207 /*==========================================================
211 **==========================================================
214 #define DEBUG_ALLOC (0x0001)
215 #define DEBUG_PHASE (0x0002)
216 #define DEBUG_POLL (0x0004)
217 #define DEBUG_QUEUE (0x0008)
218 #define DEBUG_RESULT (0x0010)
219 #define DEBUG_SCATTER (0x0020)
220 #define DEBUG_SCRIPT (0x0040)
221 #define DEBUG_TINY (0x0080)
222 #define DEBUG_TIMING (0x0100)
223 #define DEBUG_NEGO (0x0200)
224 #define DEBUG_TAGS (0x0400)
225 #define DEBUG_FREEZE (0x0800)
226 #define DEBUG_RESTART (0x1000)
229 ** Enable/Disable debug messages.
230 ** Can be changed at runtime too.
232 #ifdef SCSI_NCR_DEBUG
233 #define DEBUG_FLAGS ncr_debug
234 #else /* SCSI_NCR_DEBUG */
235 #define SCSI_NCR_DEBUG 0
236 #define DEBUG_FLAGS 0
237 #endif /* SCSI_NCR_DEBUG */
241 /*==========================================================
245 **==========================================================
247 ** modified copy from 386bsd:/usr/include/sys/assert.h
249 **----------------------------------------------------------
253 #define assert(expression) { \
254 if (!(expression)) { \
255 (void)printf("assertion \"%s\" failed: " \
256 "file \"%s\", line %d\n", \
257 #expression, __FILE__, __LINE__); \
262 #define assert(expression) { \
263 if (!(expression)) { \
264 (void)printf("assertion \"%s\" failed: " \
265 "file \"%s\", line %d\n", \
266 #expression, __FILE__, __LINE__); \
271 /*==========================================================
273 ** Access to the controller chip.
275 **==========================================================
281 #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va)
284 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r))
285 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r))
286 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r))
288 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \
289 offsetof(struct ncr_reg, r), val)
290 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
291 offsetof(struct ncr_reg, r), val)
292 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \
293 offsetof(struct ncr_reg, r), val)
294 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val)
296 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o)
297 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o)
298 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o)
300 #define READSCRIPT_OFF(base, off) \
301 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \
302 bus_space_read_4(np->bst2, np->bsh2, off))
304 #define WRITESCRIPT_OFF(base, off, val) \
307 *((volatile u_int32_t *) \
308 ((volatile char *)base + (off))) = (val); \
310 bus_space_write_4(np->bst2, np->bsh2, off, val); \
313 #define READSCRIPT(r) \
314 READSCRIPT_OFF(np->script, offsetof(struct script, r))
316 #define WRITESCRIPT(r, val) \
317 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
320 ** Set bit field ON, OFF
323 #define OUTONB(r, m) OUTB(r, INB(r) | (m))
324 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m))
325 #define OUTONW(r, m) OUTW(r, INW(r) | (m))
326 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m))
327 #define OUTONL(r, m) OUTL(r, INL(r) | (m))
328 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m))
330 /*==========================================================
332 ** Command control block states.
334 **==========================================================
339 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/
340 #define HS_DISCONNECT (3) /* Disconnected by target */
342 #define HS_COMPLETE (4)
343 #define HS_SEL_TIMEOUT (5) /* Selection timeout */
344 #define HS_RESET (6) /* SCSI reset */
345 #define HS_ABORTED (7) /* Transfer aborted */
346 #define HS_TIMEOUT (8) /* Software timeout */
347 #define HS_FAIL (9) /* SCSI or PCI bus errors */
348 #define HS_UNEXPECTED (10) /* Unexpected disconnect */
349 #define HS_STALL (11) /* QUEUE FULL or BUSY */
351 #define HS_DONEMASK (0xfc)
353 /*==========================================================
355 ** Software Interrupt Codes
357 **==========================================================
360 #define SIR_SENSE_RESTART (1)
361 #define SIR_SENSE_FAILED (2)
362 #define SIR_STALL_RESTART (3)
363 #define SIR_STALL_QUEUE (4)
364 #define SIR_NEGO_SYNC (5)
365 #define SIR_NEGO_WIDE (6)
366 #define SIR_NEGO_FAILED (7)
367 #define SIR_NEGO_PROTO (8)
368 #define SIR_REJECT_RECEIVED (9)
369 #define SIR_REJECT_SENT (10)
370 #define SIR_IGN_RESIDUE (11)
371 #define SIR_MISSING_SAVE (12)
374 /*==========================================================
376 ** Extended error codes.
377 ** xerr_status field of struct nccb.
379 **==========================================================
383 #define XE_EXTRA_DATA (1) /* unexpected data phase */
384 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */
386 /*==========================================================
388 ** Negotiation status.
389 ** nego_status field of struct nccb.
391 **==========================================================
397 /*==========================================================
399 ** XXX These are no longer used. Remove once the
400 ** script is updated.
401 ** "Special features" of targets.
402 ** quirks field of struct tcb.
403 ** actualquirks field of struct nccb.
405 **==========================================================
408 #define QUIRK_AUTOSAVE (0x01)
409 #define QUIRK_NOMSG (0x02)
410 #define QUIRK_NOSYNC (0x10)
411 #define QUIRK_NOWIDE16 (0x20)
412 #define QUIRK_NOTAGS (0x40)
413 #define QUIRK_UPDATE (0x80)
415 /*==========================================================
419 **==========================================================
422 #define CCB_MAGIC (0xf2691ad2)
423 #define MAX_TAGS (32) /* hard limit */
425 /*==========================================================
429 **==========================================================
432 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path)
434 /*==========================================================
436 ** Declaration of structs.
438 **==========================================================
447 typedef struct ncb * ncb_p;
448 typedef struct tcb * tcb_p;
449 typedef struct lcb * lcb_p;
450 typedef struct nccb * nccb_p;
464 #define UC_SETSYNC 10
465 #define UC_SETTAGS 11
466 #define UC_SETDEBUG 12
467 #define UC_SETORDER 13
468 #define UC_SETWIDE 14
469 #define UC_SETFLAG 15
471 #define UF_TRACE (0x01)
473 /*---------------------------------------
475 ** Timestamps for profiling
477 **---------------------------------------
480 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */
494 ** profiling data (per device)
510 /*==========================================================
512 ** Declaration of structs: target control block
514 **==========================================================
517 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */
518 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */
519 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */
520 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */
522 struct ncr_transinfo {
528 struct ncr_target_tinfo {
529 /* Hardware version of our sync settings */
531 #define NCR_CUR_DISCENB 0x01
532 #define NCR_CUR_TAGENB 0x02
533 #define NCR_USR_DISCENB 0x04
534 #define NCR_USR_TAGENB 0x08
536 struct ncr_transinfo current;
537 struct ncr_transinfo goal;
538 struct ncr_transinfo user;
539 /* Hardware version of our wide settings */
545 ** during reselection the ncr jumps to this point
546 ** with SFBR set to the encoded target number
548 ** if it's not this target, jump to the next.
550 ** JUMP IF (SFBR != #target#)
554 struct link jump_tcb;
557 ** load the actual values for the sxfer and the scntl3
558 ** register (sync/wide mode).
561 ** @(sval field of this tcb)
564 ** @(wval field of this tcb)
565 ** @(scntl3 register)
571 ** if next message is "identify"
572 ** then load the message to SFBR,
573 ** else load 0 to SFBR.
579 struct link call_lun;
582 ** now look for the right lun.
585 ** @(first nccb of this lun)
588 struct link jump_lcb;
591 ** pointer to interrupted getcc nccb
597 ** pointer to nccb used for negotiating.
598 ** Avoid to start a nego for all queued commands
599 ** when tagged command queuing is enabled.
612 ** user settable limits for sync transfer
613 ** and tagged commands.
616 struct ncr_target_tinfo tinfo;
619 ** the lcb's of this tcb
625 /*==========================================================
627 ** Declaration of structs: lun control block
629 **==========================================================
634 ** during reselection the ncr jumps to this point
635 ** with SFBR set to the "Identify" message.
636 ** if it's not this lun, jump to the next.
638 ** JUMP IF (SFBR != #lun#)
639 ** @(next lcb of this target)
642 struct link jump_lcb;
645 ** if next message is "simple tag",
646 ** then load the tag to SFBR,
647 ** else load 0 to SFBR.
653 struct link call_tag;
656 ** now look for the right nccb.
659 ** @(first nccb of this lun)
662 struct link jump_nccb;
665 ** start of the nccb chain
671 ** Control of tagged queueing
681 /*==========================================================
683 ** Declaration of structs: COMMAND control block
685 **==========================================================
687 ** This substructure is copied from the nccb to a
688 ** global address after selection (or reselection)
689 ** and copied back before disconnect.
691 ** These fields are accessible to the script processor.
693 **----------------------------------------------------------
698 ** Execution of a nccb starts at this point.
699 ** It's a jump to the "SELECT" label
702 ** After successful selection the script
703 ** processor overwrites it with a jump to
704 ** the IDLE label of the script.
710 ** Saved data pointer.
711 ** Points to the position in the script
712 ** responsible for the actual transfer
714 ** It's written after reception of a
715 ** "SAVE_DATA_POINTER" message.
716 ** The goalpointer points after
717 ** the last transfer command.
725 ** The virtual address of the nccb
726 ** containing this header.
732 ** space for some timestamps to gather
733 ** profiling data about devices and this driver.
746 ** The status bytes are used by the host and the script processor.
748 ** The first four byte are copied to the scratchb register
749 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect,
750 ** and copied back just after disconnecting.
751 ** Inside the script the XX_REG are used.
753 ** The last four bytes are used inside the script by "COPY" commands.
754 ** Because source and destination must have the same alignment
755 ** in a longword, the fields HAVE to be at the choosen offsets.
756 ** xerr_st (4) 0 (0x34) scratcha
757 ** sync_st (5) 1 (0x05) sxfer
758 ** wide_st (7) 3 (0x03) scntl3
762 ** First four bytes (script)
766 #define HS_PRT nc_scr1
771 ** First four bytes (host)
773 #define actualquirks phys.header.status[0]
774 #define host_status phys.header.status[1]
775 #define s_status phys.header.status[2]
776 #define parity_status phys.header.status[3]
779 ** Last four bytes (script)
781 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */
782 #define sync_st header.status[5] /* MUST be ==1 mod 4 */
783 #define nego_st header.status[6]
784 #define wide_st header.status[7] /* MUST be ==3 mod 4 */
787 ** Last four bytes (host)
789 #define xerr_status phys.xerr_st
790 #define sync_status phys.sync_st
791 #define nego_status phys.nego_st
792 #define wide_status phys.wide_st
794 /*==========================================================
796 ** Declaration of structs: Data structure block
798 **==========================================================
800 ** During execution of a nccb by the script processor,
801 ** the DSA (data structure address) register points
802 ** to this substructure of the nccb.
803 ** This substructure contains the header with
804 ** the script-processor-changable data and
805 ** data blocks for the indirect move commands.
807 **----------------------------------------------------------
814 ** Has to be the first entry,
815 ** because it's jumped to by the
822 ** Table data for Script
825 struct scr_tblsel select;
826 struct scr_tblmove smsg ;
827 struct scr_tblmove smsg2 ;
828 struct scr_tblmove cmd ;
829 struct scr_tblmove scmd ;
830 struct scr_tblmove sense ;
831 struct scr_tblmove data [MAX_SCATTER];
834 /*==========================================================
836 ** Declaration of structs: Command control block.
838 **==========================================================
840 ** During execution of a nccb by the script processor,
841 ** the DSA (data structure address) register points
842 ** to this substructure of the nccb.
843 ** This substructure contains the header with
844 ** the script-processor-changable data and then
845 ** data blocks for the indirect move commands.
847 **----------------------------------------------------------
853 ** This filler ensures that the global header is
854 ** cache line size aligned.
859 ** during reselection the ncr jumps to this point.
860 ** If a "SIMPLE_TAG" message was received,
861 ** then SFBR is set to the tag.
862 ** else SFBR is set to 0
863 ** If looking for another tag, jump to the next nccb.
865 ** JUMP IF (SFBR != #TAG#)
866 ** @(next nccb of this lun)
869 struct link jump_nccb;
872 ** After execution of this call, the return address
873 ** (in the TEMP register) points to the following
874 ** data structure block.
875 ** So copy it to the DSA register, and start
876 ** processing of this data structure.
882 struct link call_tmp;
885 ** This is the data structure which is
886 ** to be executed by the script processor.
892 ** If a data transfer phase is terminated too early
893 ** (after reception of a message (i.e. DISCONNECT)),
894 ** we have to prepare a mini script to transfer
895 ** the rest of the data.
901 ** The general SCSI driver provides a
902 ** pointer to a control block.
908 ** We prepare a message to be sent after selection,
909 ** and a second one to be sent after getcc selection.
910 ** Contents are IDENTIFY and SIMPLE_TAG.
911 ** While negotiating sync or wide transfer,
912 ** a SDTM or WDTM message is appended.
915 u_char scsi_smsg [8];
916 u_char scsi_smsg2[8];
920 ** Flag is used while looking for a free nccb.
926 ** Physical address of this instance of nccb
932 ** Completion time out for this job.
933 ** It's set to time of start + allowed number of seconds.
939 ** All nccbs of one hostadapter are chained.
945 ** All nccbs of one target/lun are chained.
957 ** Tag for this transfer.
958 ** It's patched into jump_nccb.
959 ** If it's not zero, a SIMPLE_TAG
960 ** message is included in smsg.
966 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl))
968 /*==========================================================
970 ** Declaration of structs: NCR device descriptor
972 **==========================================================
977 ** The global header.
978 ** Accessible to both the host and the
980 ** We assume it is cache line size aligned.
986 /*-----------------------------------------------
988 **-----------------------------------------------
990 ** During reselection the ncr jumps to this point.
991 ** The SFBR register is loaded with the encoded target id.
993 ** Jump to the first target.
998 struct link jump_tcb;
1000 /*-----------------------------------------------
1002 **-----------------------------------------------
1004 ** virtual and physical addresses
1005 ** of the 53c810 chip.
1008 struct resource *reg_res;
1009 bus_space_tag_t bst;
1010 bus_space_handle_t bsh;
1013 struct resource *sram_res;
1014 bus_space_tag_t bst2;
1015 bus_space_handle_t bsh2;
1017 struct resource *irq_res;
1021 ** Scripts instance virtual address.
1023 struct script *script;
1024 struct scripth *scripth;
1027 ** Scripts instance physical address.
1033 ** The SCSI address of the host adapter.
1038 ** timing parameters
1040 u_char minsync; /* Minimum sync period factor */
1041 u_char maxsync; /* Maximum sync period factor */
1042 u_char maxoffs; /* Max scsi offset */
1043 u_char clock_divn; /* Number of clock divisors */
1044 u_long clock_khz; /* SCSI clock frequency in KHz */
1045 u_long features; /* Chip features map */
1046 u_char multiplier; /* Clock multiplier (1,2,4) */
1048 u_char maxburst; /* log base 2 of dwords burst */
1051 ** BIOS supplied PCI bus options
1062 /*-----------------------------------------------
1063 ** CAM SIM information for this instance
1064 **-----------------------------------------------
1067 struct cam_sim *sim;
1068 struct cam_path *path;
1070 /*-----------------------------------------------
1072 **-----------------------------------------------
1074 ** Commands from user
1081 struct tcb target[MAX_TARGET];
1086 u_int32_t squeue [MAX_START];
1096 struct callout_handle timeout_ch;
1098 /*-----------------------------------------------
1099 ** Debug and profiling
1100 **-----------------------------------------------
1104 struct ncr_reg regdump;
1110 struct profile profile;
1115 ** Head of list of all nccbs for this controller.
1121 ** Should be longword aligned,
1122 ** because they're written with a
1123 ** COPY script command.
1130 ** Buffer for STATUS_IN phase.
1135 ** controller chip dependent maximal transfer width.
1141 ** address of the ncr control registers in io space
1147 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1148 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1150 /*==========================================================
1153 ** Script for NCR-Processor.
1155 ** Use ncr_script_fill() to create the variable parts.
1156 ** Use ncr_script_copy_and_bind() to make a copy and
1157 ** bind to physical addresses.
1160 **==========================================================
1162 ** We have to know the offsets of all labels before
1163 ** we reach them (for forward jumps).
1164 ** Therefore we declare a struct here.
1165 ** If you make changes inside the script,
1166 ** DONT FORGET TO CHANGE THE LENGTHS HERE!
1168 **----------------------------------------------------------
1172 ** Script fragments which are loaded into the on-board RAM
1173 ** of 825A, 875 and 895 chips.
1179 ncrcmd startpos [ 1];
1184 ncrcmd select [ 18];
1185 ncrcmd prepare [ 4];
1186 ncrcmd loadpos [ 14];
1187 ncrcmd prepare2 [ 24];
1190 ncrcmd dispatch [ 33];
1191 ncrcmd no_data [ 17];
1192 ncrcmd checkatn [ 10];
1193 ncrcmd command [ 15];
1194 ncrcmd status [ 27];
1195 ncrcmd msg_in [ 26];
1196 ncrcmd msg_bad [ 6];
1197 ncrcmd complete [ 13];
1198 ncrcmd cleanup [ 12];
1199 ncrcmd cleanup0 [ 9];
1200 ncrcmd signal [ 12];
1201 ncrcmd save_dp [ 5];
1202 ncrcmd restore_dp [ 5];
1203 ncrcmd disconnect [ 12];
1204 ncrcmd disconnect0 [ 5];
1205 ncrcmd disconnect1 [ 23];
1206 ncrcmd msg_out [ 9];
1207 ncrcmd msg_out_done [ 7];
1208 ncrcmd badgetcc [ 6];
1209 ncrcmd reselect [ 8];
1210 ncrcmd reselect1 [ 8];
1211 ncrcmd reselect2 [ 8];
1212 ncrcmd resel_tmp [ 5];
1213 ncrcmd resel_lun [ 18];
1214 ncrcmd resel_tag [ 24];
1215 ncrcmd data_in [MAX_SCATTER * 4 + 7];
1216 ncrcmd data_out [MAX_SCATTER * 4 + 7];
1220 ** Script fragments which stay in main memory for all chips.
1223 ncrcmd tryloop [MAX_START*5+2];
1224 ncrcmd msg_parity [ 6];
1225 ncrcmd msg_reject [ 8];
1226 ncrcmd msg_ign_residue [ 32];
1227 ncrcmd msg_extended [ 18];
1228 ncrcmd msg_ext_2 [ 18];
1229 ncrcmd msg_wdtr [ 27];
1230 ncrcmd msg_ext_3 [ 18];
1231 ncrcmd msg_sdtr [ 27];
1232 ncrcmd msg_out_abort [ 10];
1235 #ifdef NCR_GETCC_WITHMSG
1236 ncrcmd getcc2 [ 29];
1238 ncrcmd getcc2 [ 14];
1241 ncrcmd aborttag [ 4];
1243 ncrcmd snooptest [ 9];
1244 ncrcmd snoopend [ 2];
1247 /*==========================================================
1250 ** Function headers.
1253 **==========================================================
1257 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun);
1258 static void ncr_complete (ncb_p np, nccb_p cp);
1259 static int ncr_delta (int * from, int * to);
1260 static void ncr_exception (ncb_p np);
1261 static void ncr_free_nccb (ncb_p np, nccb_p cp);
1262 static void ncr_freeze_devq (ncb_p np, struct cam_path *path);
1263 static void ncr_selectclock (ncb_p np, u_char scntl3);
1264 static void ncr_getclock (ncb_p np, u_char multiplier);
1265 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l);
1267 static u_int32_t ncr_info (int unit);
1269 static void ncr_init (ncb_p np, char * msg, u_long code);
1270 static void ncr_intr (void *vnp);
1271 static void ncr_int_ma (ncb_p np, u_char dstat);
1272 static void ncr_int_sir (ncb_p np);
1273 static void ncr_int_sto (ncb_p np);
1275 static void ncr_min_phys (struct buf *bp);
1277 static void ncr_poll (struct cam_sim *sim);
1278 static void ncb_profile (ncb_p np, nccb_p cp);
1279 static void ncr_script_copy_and_bind
1280 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len);
1281 static void ncr_script_fill (struct script * scr, struct scripth *scrh);
1282 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr,
1284 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp,
1286 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1288 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack);
1289 static int ncr_show_msg (u_char * msg);
1290 static int ncr_snooptest (ncb_p np);
1291 static void ncr_action (struct cam_sim *sim, union ccb *ccb);
1292 static void ncr_timeout (void *arg);
1293 static void ncr_wakeup (ncb_p np, u_long code);
1295 static int ncr_probe (device_t dev);
1296 static int ncr_attach (device_t dev);
1298 #endif /* _KERNEL */
1300 /*==========================================================
1303 ** Global static data.
1306 **==========================================================
1309 static const u_long ncr_version = NCR_VERSION * 11
1310 + (u_long) sizeof (struct ncb) * 7
1311 + (u_long) sizeof (struct nccb) * 5
1312 + (u_long) sizeof (struct lcb) * 3
1313 + (u_long) sizeof (struct tcb) * 2;
1317 static int ncr_debug = SCSI_NCR_DEBUG;
1318 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, "");
1320 static int ncr_cache; /* to be aligned _NOT_ static */
1322 /*==========================================================
1325 ** Global static data: auto configure
1328 **==========================================================
1331 #define NCR_810_ID (0x00011000ul)
1332 #define NCR_815_ID (0x00041000ul)
1333 #define NCR_820_ID (0x00021000ul)
1334 #define NCR_825_ID (0x00031000ul)
1335 #define NCR_860_ID (0x00061000ul)
1336 #define NCR_875_ID (0x000f1000ul)
1337 #define NCR_875_ID2 (0x008f1000ul)
1338 #define NCR_885_ID (0x000d1000ul)
1339 #define NCR_895_ID (0x000c1000ul)
1340 #define NCR_896_ID (0x000b1000ul)
1341 #define NCR_895A_ID (0x00121000ul)
1342 #define NCR_1510D_ID (0x000a1000ul)
1345 static char *ncr_name (ncb_p np)
1347 static char name[10];
1348 snprintf(name, sizeof(name), "ncr%d", np->unit);
1352 /*==========================================================
1355 ** Scripts for NCR-Processor.
1357 ** Use ncr_script_bind for binding to physical addresses.
1360 **==========================================================
1362 ** NADDR generates a reference to a field of the controller data.
1363 ** PADDR generates a reference to another part of the script.
1364 ** RADDR generates a reference to a script processor register.
1365 ** FADDR generates a reference to a script processor register
1368 **----------------------------------------------------------
1371 #define RELOC_SOFTC 0x40000000
1372 #define RELOC_LABEL 0x50000000
1373 #define RELOC_REGISTER 0x60000000
1374 #define RELOC_KVAR 0x70000000
1375 #define RELOC_LABELH 0x80000000
1376 #define RELOC_MASK 0xf0000000
1378 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label))
1379 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label))
1380 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label))
1381 #define RADDR(label) (RELOC_REGISTER | REG(label))
1382 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs)))
1383 #define KVAR(which) (RELOC_KVAR | (which))
1385 #define KVAR_SECOND (0)
1386 #define KVAR_TICKS (1)
1387 #define KVAR_NCR_CACHE (2)
1389 #define SCRIPT_KVAR_FIRST (0)
1390 #define SCRIPT_KVAR_LAST (3)
1393 * Kernel variables referenced in the scripts.
1394 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY.
1396 static void *script_kvars[] =
1397 { &time_second, &ticks, &ncr_cache };
1399 static struct script script0 = {
1400 /*--------------------------< START >-----------------------*/ {
1402 ** Claim to be still alive ...
1404 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)),
1408 ** Make data structure address invalid.
1411 SCR_LOAD_REG (dsa, 0xff),
1413 SCR_FROM_REG (ctest2),
1415 }/*-------------------------< START0 >----------------------*/,{
1417 ** Hook for interrupted GetConditionCode.
1418 ** Will be patched to ... IFTRUE by
1419 ** the interrupt handler.
1421 SCR_INT ^ IFFALSE (0),
1424 }/*-------------------------< START1 >----------------------*/,{
1426 ** Hook for stalled start queue.
1427 ** Will be patched to IFTRUE by the interrupt handler.
1429 SCR_INT ^ IFFALSE (0),
1432 ** Then jump to a certain point in tryloop.
1433 ** Due to the lack of indirect addressing the code
1434 ** is self modifying here.
1437 }/*-------------------------< STARTPOS >--------------------*/,{
1440 }/*-------------------------< TRYSEL >----------------------*/,{
1443 ** DSA: Address of a Data Structure
1444 ** or Address of the IDLE-Label.
1446 ** TEMP: Address of a script, which tries to
1447 ** start the NEXT entry.
1449 ** Save the TEMP register into the SCRATCHA register.
1450 ** Then copy the DSA to TEMP and RETURN.
1451 ** This is kind of an indirect jump.
1452 ** (The script processor has NO stack, so the
1453 ** CALL is actually a jump and link, and the
1454 ** RETURN is an indirect jump.)
1456 ** If the slot was empty, DSA contains the address
1457 ** of the IDLE part of this script. The processor
1458 ** jumps to IDLE and waits for a reselect.
1459 ** It will wake up and try the same slot again
1460 ** after the SIGP bit becomes set by the host.
1462 ** If the slot was not empty, DSA contains
1463 ** the address of the phys-part of a nccb.
1464 ** The processor jumps to this address.
1465 ** phys starts with head,
1466 ** head starts with launch,
1467 ** so actually the processor jumps to
1469 ** If the entry is scheduled for execution,
1470 ** then launch contains a jump to SELECT.
1471 ** If it's not scheduled, it contains a jump to IDLE.
1482 }/*-------------------------< SKIP >------------------------*/,{
1484 ** This entry has been canceled.
1485 ** Next time use the next slot.
1491 ** patch the launch field.
1492 ** should look like an idle process.
1499 }/*-------------------------< SKIP2 >-----------------------*/,{
1503 }/*-------------------------< IDLE >------------------------*/,{
1506 ** Wait for reselect.
1511 }/*-------------------------< SELECT >----------------------*/,{
1513 ** DSA contains the address of a scheduled
1516 ** SCRATCHA contains the address of the script,
1517 ** which starts the next entry.
1519 ** Set Initiator mode.
1521 ** (Target mode is left as an exercise for the reader)
1526 SCR_LOAD_REG (HS_REG, 0xff),
1530 ** And try to select this target.
1532 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
1536 ** Now there are 4 possibilities:
1538 ** (1) The ncr looses arbitration.
1539 ** This is ok, because it will try again,
1540 ** when the bus becomes idle.
1541 ** (But beware of the timeout function!)
1543 ** (2) The ncr is reselected.
1544 ** Then the script processor takes the jump
1545 ** to the RESELECT label.
1547 ** (3) The ncr completes the selection.
1548 ** Then it will execute the next statement.
1550 ** (4) There is a selection timeout.
1551 ** Then the ncr should interrupt the host and stop.
1552 ** Unfortunately, it seems to continue execution
1553 ** of the script. But it will fail with an
1554 ** IID-interrupt on the next WHEN.
1557 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
1561 ** Send the IDENTIFY and SIMPLE_TAG messages
1562 ** (and the MSG_EXT_SDTR message)
1564 SCR_MOVE_TBL ^ SCR_MSG_OUT,
1565 offsetof (struct dsb, smsg),
1566 #ifdef undef /* XXX better fail than try to deal with this ... */
1567 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)),
1576 ** Selection complete.
1577 ** Next time use the next slot.
1582 }/*-------------------------< PREPARE >----------------------*/,{
1584 ** The ncr doesn't have an indirect load
1585 ** or store command. So we have to
1586 ** copy part of the control block to a
1587 ** fixed place, where we can access it.
1589 ** We patch the address part of a
1590 ** COPY command with the DSA-register.
1596 ** then we do the actual copy.
1598 SCR_COPY (sizeof (struct head)),
1600 ** continued after the next label ...
1603 }/*-------------------------< LOADPOS >---------------------*/,{
1607 ** Mark this nccb as not scheduled.
1611 NADDR (header.launch),
1613 ** Set a time stamp for this selection
1615 SCR_COPY (sizeof (ticks)),
1617 NADDR (header.stamp.select),
1619 ** load the savep (saved pointer) into
1620 ** the TEMP register (actual pointer)
1623 NADDR (header.savep),
1626 ** Initialize the status registers
1629 NADDR (header.status),
1632 }/*-------------------------< PREPARE2 >---------------------*/,{
1634 ** Load the synchronous mode register
1640 ** Load the wide mode and timing register
1646 ** Initialize the msgout buffer with a NOOP message.
1648 SCR_LOAD_REG (scratcha, MSG_NOOP),
1657 ** Message in phase ?
1659 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
1662 ** Extended or reject message ?
1664 SCR_FROM_REG (sbdl),
1666 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1668 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1669 PADDRH (msg_reject),
1671 ** normal processing
1675 }/*-------------------------< SETMSG >----------------------*/,{
1681 }/*-------------------------< CLRACK >----------------------*/,{
1683 ** Terminate possible pending message phase.
1688 }/*-----------------------< DISPATCH >----------------------*/,{
1689 SCR_FROM_REG (HS_REG),
1691 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
1694 ** remove bogus output signals
1696 SCR_REG_REG (socl, SCR_AND, CACK|CATN),
1698 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)),
1700 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)),
1702 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)),
1704 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)),
1706 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)),
1708 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)),
1711 ** Discard one illegal phase byte, if required.
1713 SCR_LOAD_REG (scratcha, XE_BAD_PHASE),
1718 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)),
1720 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT,
1722 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)),
1724 SCR_MOVE_ABS (1) ^ SCR_ILG_IN,
1729 }/*-------------------------< NO_DATA >--------------------*/,{
1731 ** The target wants to tranfer too much data
1732 ** or in the wrong direction.
1733 ** Remember that in extended error.
1735 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA),
1741 ** Discard one data byte, if required.
1743 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)),
1745 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT,
1747 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)),
1749 SCR_MOVE_ABS (1) ^ SCR_DATA_IN,
1752 ** .. and repeat as required.
1758 }/*-------------------------< CHECKATN >--------------------*/,{
1760 ** If AAP (bit 1 of scntl0 register) is set
1761 ** and a parity error is detected,
1762 ** the script processor asserts ATN.
1764 ** The target should switch to a MSG_OUT phase
1765 ** to get the message.
1767 SCR_FROM_REG (socl),
1769 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)),
1774 SCR_REG_REG (PS_REG, SCR_ADD, 1),
1777 ** Prepare a MSG_INITIATOR_DET_ERR message
1778 ** (initiator detected error).
1779 ** The target should retry the transfer.
1781 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR),
1786 }/*-------------------------< COMMAND >--------------------*/,{
1788 ** If this is not a GETCC transfer ...
1790 SCR_FROM_REG (SS_REG),
1792 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1795 ** ... set a timestamp ...
1797 SCR_COPY (sizeof (ticks)),
1799 NADDR (header.stamp.command),
1801 ** ... and send the command
1803 SCR_MOVE_TBL ^ SCR_COMMAND,
1804 offsetof (struct dsb, cmd),
1808 ** Send the GETCC command
1810 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND,
1811 offsetof (struct dsb, scmd),
1815 }/*-------------------------< STATUS >--------------------*/,{
1817 ** set the timestamp.
1819 SCR_COPY (sizeof (ticks)),
1821 NADDR (header.stamp.status),
1823 ** If this is a GETCC transfer,
1825 SCR_FROM_REG (SS_REG),
1827 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)),
1832 SCR_MOVE_ABS (1) ^ SCR_STATUS,
1835 ** Save status to scsi_status.
1836 ** Mark as complete.
1837 ** And wait for disconnect.
1839 SCR_TO_REG (SS_REG),
1841 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE),
1843 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1848 ** If it was no GETCC transfer,
1849 ** save the status to scsi_status.
1851 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS,
1853 SCR_TO_REG (SS_REG),
1856 ** if it was no check condition ...
1858 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
1861 ** ... mark as complete.
1863 SCR_LOAD_REG (HS_REG, HS_COMPLETE),
1868 }/*-------------------------< MSG_IN >--------------------*/,{
1870 ** Get the first byte of the message
1871 ** and save it to SCRATCHA.
1873 ** The script processor doesn't negate the
1874 ** ACK signal after this transfer.
1876 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
1879 ** Check for message parity error.
1881 SCR_TO_REG (scratcha),
1883 SCR_FROM_REG (socl),
1885 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
1886 PADDRH (msg_parity),
1887 SCR_FROM_REG (scratcha),
1890 ** Parity was ok, handle this message.
1892 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)),
1894 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)),
1896 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)),
1898 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)),
1900 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)),
1901 PADDRH (msg_extended),
1902 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)),
1904 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)),
1905 PADDRH (msg_reject),
1906 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)),
1907 PADDRH (msg_ign_residue),
1909 ** Rest of the messages left as
1912 ** Unimplemented messages:
1913 ** fall through to MSG_BAD.
1915 }/*-------------------------< MSG_BAD >------------------*/,{
1917 ** unimplemented message - reject it.
1921 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT),
1926 }/*-------------------------< COMPLETE >-----------------*/,{
1928 ** Complete message.
1930 ** If it's not the get condition code,
1931 ** copy TEMP register to LASTP in header.
1933 SCR_FROM_REG (SS_REG),
1935 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)),
1939 NADDR (header.lastp),
1941 ** When we terminate the cycle by clearing ACK,
1942 ** the target may disconnect immediately.
1944 ** We don't want to be told of an
1945 ** "unexpected disconnect",
1946 ** so we disable this feature.
1948 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
1951 ** Terminate cycle ...
1953 SCR_CLR (SCR_ACK|SCR_ATN),
1956 ** ... and wait for the disconnect.
1960 }/*-------------------------< CLEANUP >-------------------*/,{
1962 ** dsa: Pointer to nccb
1963 ** or xxxxxxFF (no nccb)
1965 ** HS_REG: Host-Status (<>0!)
1969 SCR_JUMP ^ IFTRUE (DATA (0xff)),
1973 ** save the status registers
1977 NADDR (header.status),
1979 ** and copy back the header to the nccb.
1984 SCR_COPY (sizeof (struct head)),
1986 }/*-------------------------< CLEANUP0 >--------------------*/,{
1990 ** If command resulted in "check condition"
1991 ** status and is not yet completed,
1992 ** try to get the condition code.
1994 SCR_FROM_REG (HS_REG),
1996 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)),
1998 SCR_FROM_REG (SS_REG),
2000 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)),
2002 }/*-------------------------< SIGNAL >----------------------*/,{
2004 ** if status = queue full,
2005 ** reinsert in startqueue and stall queue.
2007 /*>>>*/ SCR_FROM_REG (SS_REG),
2009 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)),
2012 ** And make the DSA register invalid.
2014 SCR_LOAD_REG (dsa, 0xff), /* invalid */
2017 ** if job completed ...
2019 SCR_FROM_REG (HS_REG),
2022 ** ... signal completion to the host
2024 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)),
2027 ** Auf zu neuen Schandtaten!
2032 }/*-------------------------< SAVE_DP >------------------*/,{
2035 ** Copy TEMP register to SAVEP in header.
2039 NADDR (header.savep),
2042 }/*-------------------------< RESTORE_DP >---------------*/,{
2044 ** RESTORE_DP message:
2045 ** Copy SAVEP in header to TEMP register.
2048 NADDR (header.savep),
2053 }/*-------------------------< DISCONNECT >---------------*/,{
2055 ** If QUIRK_AUTOSAVE is set,
2056 ** do a "save pointer" operation.
2058 SCR_FROM_REG (QU_REG),
2060 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)),
2063 ** like SAVE_DP message:
2064 ** Copy TEMP register to SAVEP in header.
2068 NADDR (header.savep),
2070 ** Check if temp==savep or temp==goalp:
2071 ** if not, log a missing save pointer message.
2072 ** In fact, it's a comparison mod 256.
2074 ** Hmmm, I hadn't thought that I would be urged to
2075 ** write this kind of ugly self modifying code.
2077 ** It's unbelievable, but the ncr53c8xx isn't able
2078 ** to subtract one register from another.
2080 SCR_FROM_REG (temp),
2083 ** You are not expected to understand this ..
2085 ** CAUTION: only little endian architectures supported! XXX
2088 NADDR (header.savep),
2089 PADDR (disconnect0),
2090 }/*-------------------------< DISCONNECT0 >--------------*/,{
2091 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)),
2097 NADDR (header.goalp),
2098 PADDR (disconnect1),
2099 }/*-------------------------< DISCONNECT1 >--------------*/,{
2100 SCR_INT ^ IFFALSE (DATA (1)),
2105 ** DISCONNECTing ...
2107 ** disable the "unexpected disconnect" feature,
2108 ** and remove the ACK signal.
2110 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2112 SCR_CLR (SCR_ACK|SCR_ATN),
2115 ** Wait for the disconnect.
2121 ** Set a time stamp,
2122 ** and count the disconnects.
2124 SCR_COPY (sizeof (ticks)),
2126 NADDR (header.stamp.disconnect),
2130 SCR_REG_REG (temp, SCR_ADD, 0x01),
2136 ** Status is: DISCONNECTED.
2138 SCR_LOAD_REG (HS_REG, HS_DISCONNECT),
2143 }/*-------------------------< MSG_OUT >-------------------*/,{
2145 ** The target requests a message.
2147 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2153 ** If it was no ABORT message ...
2155 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)),
2156 PADDRH (msg_out_abort),
2158 ** ... wait for the next phase
2159 ** if it's a message out, send it again, ...
2161 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)),
2163 }/*-------------------------< MSG_OUT_DONE >--------------*/,{
2165 ** ... else clear the message ...
2167 SCR_LOAD_REG (scratcha, MSG_NOOP),
2173 ** ... and process the next phase
2178 }/*------------------------< BADGETCC >---------------------*/,{
2180 ** If SIGP was set, clear it and try again.
2182 SCR_FROM_REG (ctest2),
2184 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2188 }/*-------------------------< RESELECT >--------------------*/,{
2190 ** This NOP will be patched with LED OFF
2191 ** SCR_REG_REG (gpreg, SCR_OR, 0x01)
2197 ** make the DSA invalid.
2199 SCR_LOAD_REG (dsa, 0xff),
2204 ** Sleep waiting for a reselection.
2205 ** If SIGP is set, special treatment.
2207 ** Zu allem bereit ..
2211 }/*-------------------------< RESELECT1 >--------------------*/,{
2213 ** This NOP will be patched with LED ON
2214 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2219 ** ... zu nichts zu gebrauchen ?
2221 ** load the target id into the SFBR
2222 ** and jump to the control block.
2224 ** Look at the declarations of
2229 ** to understand what's going on.
2231 SCR_REG_SFBR (ssid, SCR_AND, 0x8F),
2237 }/*-------------------------< RESELECT2 >-------------------*/,{
2239 ** This NOP will be patched with LED ON
2240 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe)
2245 ** If it's not connected :(
2246 ** -> interrupted by SIGP bit.
2249 SCR_FROM_REG (ctest2),
2251 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)),
2256 }/*-------------------------< RESEL_TMP >-------------------*/,{
2258 ** The return address in TEMP
2259 ** is in fact the data structure address,
2260 ** so copy it to the DSA register.
2268 }/*-------------------------< RESEL_LUN >-------------------*/,{
2270 ** come back to this point
2271 ** to get an IDENTIFY message
2272 ** Wait for a msg_in phase.
2274 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2278 ** It's not a sony, it's a trick:
2279 ** read the data without acknowledging it.
2281 SCR_FROM_REG (sbdl),
2283 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)),
2286 ** It WAS an Identify message.
2287 ** get it and ack it!
2289 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2294 ** Mask out the lun.
2296 SCR_REG_REG (sfbr, SCR_AND, 0x07),
2301 ** No message phase or no IDENTIFY message:
2304 /*>>>*/ SCR_LOAD_SFBR (0),
2309 }/*-------------------------< RESEL_TAG >-------------------*/,{
2311 ** come back to this point
2312 ** to get a SIMPLE_TAG message
2313 ** Wait for a MSG_IN phase.
2315 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2319 ** It's a trick - read the data
2320 ** without acknowledging it.
2322 SCR_FROM_REG (sbdl),
2324 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)),
2327 ** It WAS a SIMPLE_TAG message.
2328 ** get it and ack it!
2330 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2335 ** Wait for the second byte (the tag)
2337 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)),
2340 ** Get it and ack it!
2342 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2344 SCR_CLR (SCR_ACK|SCR_CARRY),
2349 ** No message phase or no SIMPLE_TAG message
2350 ** or no second byte: return 0.
2352 /*>>>*/ SCR_LOAD_SFBR (0),
2354 SCR_SET (SCR_CARRY),
2359 }/*-------------------------< DATA_IN >--------------------*/,{
2361 ** Because the size depends on the
2362 ** #define MAX_SCATTER parameter,
2363 ** it is filled in at runtime.
2365 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)),
2367 ** SCR_COPY (sizeof (ticks)),
2368 ** KVAR (KVAR_TICKS),
2369 ** NADDR (header.stamp.data),
2370 ** SCR_MOVE_TBL ^ SCR_DATA_IN,
2371 ** offsetof (struct dsb, data[ 0]),
2373 ** ##===========< i=1; i<MAX_SCATTER >=========
2374 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)),
2375 ** || PADDR (checkatn),
2376 ** || SCR_MOVE_TBL ^ SCR_DATA_IN,
2377 ** || offsetof (struct dsb, data[ i]),
2378 ** ##==========================================
2381 ** PADDR (checkatn),
2386 }/*-------------------------< DATA_OUT >-------------------*/,{
2388 ** Because the size depends on the
2389 ** #define MAX_SCATTER parameter,
2390 ** it is filled in at runtime.
2392 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2394 ** SCR_COPY (sizeof (ticks)),
2395 ** KVAR (KVAR_TICKS),
2396 ** NADDR (header.stamp.data),
2397 ** SCR_MOVE_TBL ^ SCR_DATA_OUT,
2398 ** offsetof (struct dsb, data[ 0]),
2400 ** ##===========< i=1; i<MAX_SCATTER >=========
2401 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)),
2402 ** || PADDR (dispatch),
2403 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT,
2404 ** || offsetof (struct dsb, data[ i]),
2405 ** ##==========================================
2408 ** PADDR (dispatch),
2412 **---------------------------------------------------------
2416 }/*--------------------------------------------------------*/
2420 static struct scripth scripth0 = {
2421 /*-------------------------< TRYLOOP >---------------------*/{
2423 ** Load an entry of the start queue into dsa
2424 ** and try to start it by jumping to TRYSEL.
2426 ** Because the size depends on the
2427 ** #define MAX_START parameter, it is filled
2430 **-----------------------------------------------------------
2432 ** ##===========< I=0; i<MAX_START >===========
2434 ** || NADDR (squeue[i]),
2437 ** || PADDR (trysel),
2438 ** ##==========================================
2443 **-----------------------------------------------------------
2446 }/*-------------------------< MSG_PARITY >---------------*/,{
2450 SCR_REG_REG (PS_REG, SCR_ADD, 0x01),
2453 ** send a "message parity error" message.
2455 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR),
2459 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{
2461 ** If a negotiation was in progress,
2462 ** negotiation failed.
2464 SCR_FROM_REG (HS_REG),
2466 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)),
2469 ** else make host log this message
2471 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)),
2472 SIR_REJECT_RECEIVED,
2476 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{
2482 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2485 ** get residue size.
2487 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2490 ** Check for message parity error.
2492 SCR_TO_REG (scratcha),
2494 SCR_FROM_REG (socl),
2496 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2497 PADDRH (msg_parity),
2498 SCR_FROM_REG (scratcha),
2501 ** Size is 0 .. ignore message.
2503 SCR_JUMP ^ IFTRUE (DATA (0)),
2506 ** Size is not 1 .. have to interrupt.
2508 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)),
2511 ** Check for residue byte in swide register
2513 SCR_FROM_REG (scntl2),
2515 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2518 ** There IS data in the swide register.
2521 SCR_REG_REG (scntl2, SCR_OR, WSR),
2526 ** Load again the size to the sfbr register.
2528 /*>>>*/ SCR_FROM_REG (scratcha),
2535 }/*-------------------------< MSG_EXTENDED >-------------*/,{
2541 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2546 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2549 ** Check for message parity error.
2551 SCR_TO_REG (scratcha),
2553 SCR_FROM_REG (socl),
2555 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2556 PADDRH (msg_parity),
2557 SCR_FROM_REG (scratcha),
2561 SCR_JUMP ^ IFTRUE (DATA (3)),
2563 SCR_JUMP ^ IFFALSE (DATA (2)),
2565 }/*-------------------------< MSG_EXT_2 >----------------*/,{
2568 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2571 ** get extended message code.
2573 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2576 ** Check for message parity error.
2578 SCR_TO_REG (scratcha),
2580 SCR_FROM_REG (socl),
2582 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2583 PADDRH (msg_parity),
2584 SCR_FROM_REG (scratcha),
2586 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)),
2589 ** unknown extended message
2593 }/*-------------------------< MSG_WDTR >-----------------*/,{
2596 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2599 ** get data bus width
2601 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2603 SCR_FROM_REG (socl),
2605 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2606 PADDRH (msg_parity),
2608 ** let the host do the real work.
2613 ** let the target fetch our answer.
2620 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2623 ** Send the MSG_EXT_WDTR
2625 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT,
2633 PADDR (msg_out_done),
2635 }/*-------------------------< MSG_EXT_3 >----------------*/,{
2638 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2641 ** get extended message code.
2643 SCR_MOVE_ABS (1) ^ SCR_MSG_IN,
2646 ** Check for message parity error.
2648 SCR_TO_REG (scratcha),
2650 SCR_FROM_REG (socl),
2652 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2653 PADDRH (msg_parity),
2654 SCR_FROM_REG (scratcha),
2656 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)),
2659 ** unknown extended message
2664 }/*-------------------------< MSG_SDTR >-----------------*/,{
2667 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)),
2670 ** get period and offset
2672 SCR_MOVE_ABS (2) ^ SCR_MSG_IN,
2674 SCR_FROM_REG (socl),
2676 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)),
2677 PADDRH (msg_parity),
2679 ** let the host do the real work.
2684 ** let the target fetch our answer.
2691 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)),
2694 ** Send the MSG_EXT_SDTR
2696 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT,
2704 PADDR (msg_out_done),
2706 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{
2708 ** After ABORT message,
2710 ** expect an immediate disconnect, ...
2712 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2714 SCR_CLR (SCR_ACK|SCR_ATN),
2719 ** ... and set the status to "ABORTED"
2721 SCR_LOAD_REG (HS_REG, HS_ABORTED),
2726 }/*-------------------------< GETCC >-----------------------*/,{
2728 ** The ncr doesn't have an indirect load
2729 ** or store command. So we have to
2730 ** copy part of the control block to a
2731 ** fixed place, where we can modify it.
2733 ** We patch the address part of a COPY command
2734 ** with the address of the dsa register ...
2740 ** ... then we do the actual copy.
2742 SCR_COPY (sizeof (struct head)),
2743 }/*-------------------------< GETCC1 >----------------------*/,{
2747 ** Initialize the status registers
2750 NADDR (header.status),
2752 }/*-------------------------< GETCC2 >----------------------*/,{
2754 ** Get the condition code from a target.
2756 ** DSA points to a data structure.
2757 ** Set TEMP to the script location
2758 ** that receives the condition code.
2760 ** Because there is no script command
2761 ** to load a longword into a register,
2762 ** we use a CALL command.
2767 ** Get the condition code.
2769 SCR_MOVE_TBL ^ SCR_DATA_IN,
2770 offsetof (struct dsb, sense),
2772 ** No data phase may follow!
2781 ** The CALL jumps to this point.
2782 ** Prepare for a RESTORE_POINTER message.
2783 ** Save the TEMP register into the saved pointer.
2787 NADDR (header.savep),
2789 ** Load scratcha, because in case of a selection timeout,
2790 ** the host will expect a new value for startpos in
2791 ** the scratcha register.
2796 #ifdef NCR_GETCC_WITHMSG
2798 ** If QUIRK_NOMSG is set, select without ATN.
2799 ** and don't send a message.
2801 SCR_FROM_REG (QU_REG),
2803 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)),
2806 ** Then try to connect to the target.
2807 ** If we are reselected, special treatment
2808 ** of the current job is required before
2809 ** accepting the reselection.
2811 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select),
2814 ** Send the IDENTIFY message.
2815 ** In case of short transfer, remove ATN.
2817 SCR_MOVE_TBL ^ SCR_MSG_OUT,
2818 offsetof (struct dsb, smsg2),
2822 ** save the first byte of the message.
2831 }/*-------------------------< GETCC3 >----------------------*/,{
2833 ** Try to connect to the target.
2834 ** If we are reselected, special treatment
2835 ** of the current job is required before
2836 ** accepting the reselection.
2838 ** Silly target won't accept a message.
2839 ** Select without ATN.
2841 SCR_SEL_TBL ^ offsetof (struct dsb, select),
2844 ** Force error if selection timeout
2846 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)),
2853 }/*-------------------------< ABORTTAG >-------------------*/,{
2855 ** Abort a bad reselection.
2856 ** Set the message to ABORT vs. ABORT_TAG
2858 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG),
2860 SCR_JUMPR ^ IFFALSE (CARRYSET),
2862 }/*-------------------------< ABORT >----------------------*/,{
2863 SCR_LOAD_REG (scratcha, MSG_ABORT),
2874 ** we expect an immediate disconnect
2876 SCR_REG_REG (scntl2, SCR_AND, 0x7f),
2878 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT,
2883 SCR_CLR (SCR_ACK|SCR_ATN),
2889 }/*-------------------------< SNOOPTEST >-------------------*/,{
2891 ** Read the variable.
2894 KVAR (KVAR_NCR_CACHE),
2897 ** Write the variable.
2901 KVAR (KVAR_NCR_CACHE),
2903 ** Read back the variable.
2906 KVAR (KVAR_NCR_CACHE),
2908 }/*-------------------------< SNOOPEND >-------------------*/,{
2914 }/*--------------------------------------------------------*/
2918 /*==========================================================
2921 ** Fill in #define dependent parts of the script
2924 **==========================================================
2927 static void ncr_script_fill (struct script * scr, struct scripth * scrh)
2933 for (i=0; i<MAX_START; i++) {
2935 *p++ =NADDR (squeue[i]);
2938 *p++ =PADDR (trysel);
2941 *p++ =PADDRH(tryloop);
2943 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop));
2947 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN));
2948 *p++ =PADDR (no_data);
2949 *p++ =SCR_COPY (sizeof (ticks));
2950 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2951 *p++ =NADDR (header.stamp.data);
2952 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2953 *p++ =offsetof (struct dsb, data[ 0]);
2955 for (i=1; i<MAX_SCATTER; i++) {
2956 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN));
2957 *p++ =PADDR (checkatn);
2958 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN;
2959 *p++ =offsetof (struct dsb, data[i]);
2963 *p++ =PADDR (checkatn);
2965 *p++ =PADDR (no_data);
2967 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in));
2971 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT));
2972 *p++ =PADDR (no_data);
2973 *p++ =SCR_COPY (sizeof (ticks));
2974 *p++ =(ncrcmd) KVAR (KVAR_TICKS);
2975 *p++ =NADDR (header.stamp.data);
2976 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2977 *p++ =offsetof (struct dsb, data[ 0]);
2979 for (i=1; i<MAX_SCATTER; i++) {
2980 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT));
2981 *p++ =PADDR (dispatch);
2982 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT;
2983 *p++ =offsetof (struct dsb, data[i]);
2987 *p++ =PADDR (dispatch);
2989 *p++ =PADDR (no_data);
2991 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out));
2994 /*==========================================================
2997 ** Copy and rebind a script.
3000 **==========================================================
3003 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
3005 ncrcmd opcode, new, old, tmp1, tmp2;
3006 ncrcmd *start, *end;
3016 WRITESCRIPT_OFF(dst, offset, opcode);
3020 ** If we forget to change the length
3021 ** in struct script, a field will be
3022 ** padded with 0. This is an illegal
3027 printf ("%s: ERROR0 IN SCRIPT at %d.\n",
3028 ncr_name(np), (int) (src-start-1));
3032 if (DEBUG_FLAGS & DEBUG_SCRIPT)
3033 printf ("%p: <%x>\n",
3034 (src-1), (unsigned)opcode);
3037 ** We don't have to decode ALL commands
3039 switch (opcode >> 28) {
3043 ** COPY has TWO arguments.
3047 if ((tmp1 & RELOC_MASK) == RELOC_KVAR)
3050 if ((tmp2 & RELOC_MASK) == RELOC_KVAR)
3052 if ((tmp1 ^ tmp2) & 3) {
3053 printf ("%s: ERROR1 IN SCRIPT at %d.\n",
3054 ncr_name(np), (int) (src-start-1));
3058 ** If PREFETCH feature not enabled, remove
3059 ** the NO FLUSH bit if present.
3061 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3062 WRITESCRIPT_OFF(dst, offset - 4,
3063 (opcode & ~SCR_NO_FLUSH));
3068 ** MOVE (absolute address)
3076 ** dont't relocate if relative :-)
3078 if (opcode & 0x00800000)
3100 switch (old & RELOC_MASK) {
3101 case RELOC_REGISTER:
3102 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3105 new = (old & ~RELOC_MASK) + np->p_script;
3108 new = (old & ~RELOC_MASK) + np->p_scripth;
3111 new = (old & ~RELOC_MASK) + vtophys(np);
3114 if (((old & ~RELOC_MASK) <
3115 SCRIPT_KVAR_FIRST) ||
3116 ((old & ~RELOC_MASK) >
3118 panic("ncr KVAR out of range");
3119 new = vtophys(script_kvars[old &
3123 /* Don't relocate a 0 address. */
3130 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start));
3134 WRITESCRIPT_OFF(dst, offset, new);
3138 WRITESCRIPT_OFF(dst, offset, *src++);
3145 /*==========================================================
3148 ** Auto configuration.
3151 **==========================================================
3155 /*----------------------------------------------------------
3157 ** Reduce the transfer length to the max value
3158 ** we can transfer safely.
3160 ** Reading a block greater then MAX_SIZE from the
3161 ** raw (character) device exercises a memory leak
3162 ** in the vm subsystem. This is common to ALL devices.
3163 ** We have submitted a description of this bug to
3164 ** <FreeBSD-bugs@freefall.cdrom.com>.
3165 ** It should be fixed in the current release.
3167 **----------------------------------------------------------
3170 void ncr_min_phys (struct buf *bp)
3172 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE;
3178 /*----------------------------------------------------------
3180 ** Maximal number of outstanding requests per target.
3182 **----------------------------------------------------------
3185 u_int32_t ncr_info (int unit)
3187 return (1); /* may be changed later */
3192 /*----------------------------------------------------------
3194 ** NCR chip devices table and chip look up function.
3195 ** Features bit are defined in ncrreg.h. Is it the
3198 **----------------------------------------------------------
3201 unsigned long device_id;
3202 unsigned short minrevid;
3204 unsigned char maxburst;
3205 unsigned char maxoffs;
3206 unsigned char clock_divn;
3207 unsigned int features;
3210 static ncr_chip ncr_chip_table[] = {
3211 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4,
3214 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4,
3215 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF}
3217 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4,
3220 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4,
3223 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4,
3224 FE_WIDE|FE_ERL|FE_BOF}
3226 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4,
3227 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3229 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5,
3230 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN}
3232 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3233 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3235 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5,
3236 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3238 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5,
3239 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3241 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5,
3242 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3244 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7,
3245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3247 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7,
3248 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3250 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7,
3251 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3253 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7,
3254 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM}
3257 static int ncr_chip_lookup(u_long device_id, u_char revision_id)
3262 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) {
3263 if (device_id == ncr_chip_table[i].device_id &&
3264 ncr_chip_table[i].minrevid <= revision_id) {
3266 ncr_chip_table[found].minrevid
3267 < ncr_chip_table[i].minrevid) {
3275 /*----------------------------------------------------------
3277 ** Probe the hostadapter.
3279 **----------------------------------------------------------
3284 static int ncr_probe (device_t dev)
3288 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev));
3290 device_set_desc(dev, ncr_chip_table[i].name);
3299 /*==========================================================
3301 ** NCR chip clock divisor table.
3302 ** Divisors are multiplied by 10,000,000 in order to make
3303 ** calculations more simple.
3305 **==========================================================
3309 static u_long div_10M[] =
3310 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
3312 /*===============================================================
3314 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128
3315 ** transfers. 32,64,128 are only supported by 875 and 895 chips.
3316 ** We use log base 2 (burst length) as internal code, with
3317 ** value 0 meaning "burst disabled".
3319 **===============================================================
3323 * Burst length from burst code.
3325 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
3328 * Burst code from io register bits.
3330 #define burst_code(dmode, ctest4, ctest5) \
3331 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
3334 * Set initial io register bits from burst code.
3337 ncr_init_burst(ncb_p np, u_char bc)
3339 np->rv_ctest4 &= ~0x80;
3340 np->rv_dmode &= ~(0x3 << 6);
3341 np->rv_ctest5 &= ~0x4;
3344 np->rv_ctest4 |= 0x80;
3348 np->rv_dmode |= ((bc & 0x3) << 6);
3349 np->rv_ctest5 |= (bc & 0x4);
3353 /*==========================================================
3356 ** Auto configuration: attach and init a host adapter.
3359 **==========================================================
3364 ncr_attach (device_t dev)
3366 ncb_p np = (struct ncb*) device_get_softc(dev);
3372 struct cam_devq *devq;
3375 ** allocate and initialize structures.
3378 np->unit = device_get_unit(dev);
3381 ** Try to map the controller chip to
3382 ** virtual and physical memory.
3386 np->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3387 &np->reg_rid, RF_ACTIVE);
3389 device_printf(dev, "could not map memory\n");
3394 ** Make the controller's registers available.
3395 ** Now the INB INW INL OUTB OUTW OUTL macros
3396 ** can be used safely.
3399 np->bst = rman_get_bustag(np->reg_res);
3400 np->bsh = rman_get_bushandle(np->reg_res);
3405 ** Try to map the controller chip into iospace.
3408 if (!pci_map_port (config_id, 0x10, &np->port))
3414 ** Save some controller register default values
3417 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3418 np->rv_dmode = INB(nc_dmode) & 0xce;
3419 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3420 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3421 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3422 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3423 np->rv_gpcntl = INB(nc_gpcntl);
3424 np->rv_stest2 = INB(nc_stest2) & 0x20;
3426 if (bootverbose >= 2) {
3427 printf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
3428 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3429 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
3430 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3433 np->rv_dcntl |= NOCOM;
3436 ** Do chip dependent initialization.
3439 rev = pci_get_revid(dev);
3442 ** Get chip features from chips table.
3444 i = ncr_chip_lookup(pci_get_devid(dev), rev);
3447 np->maxburst = ncr_chip_table[i].maxburst;
3448 np->maxoffs = ncr_chip_table[i].maxoffs;
3449 np->clock_divn = ncr_chip_table[i].clock_divn;
3450 np->features = ncr_chip_table[i].features;
3451 } else { /* Should'nt happen if probe() is ok */
3455 np->features = FE_ERL;
3458 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3459 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3460 if (np->features & FE_QUAD) np->multiplier = 4;
3461 else if (np->features & FE_DBLR) np->multiplier = 2;
3462 else np->multiplier = 1;
3465 ** Get the frequency of the chip's clock.
3466 ** Find the right value for scntl3.
3468 if (np->features & (FE_ULTRA|FE_ULTRA2))
3469 ncr_getclock(np, np->multiplier);
3471 #ifdef NCR_TEKRAM_EEPROM
3473 printf ("%s: Tekram EEPROM read %s\n",
3475 read_tekram_eeprom (np, NULL) ?
3476 "succeeded" : "failed");
3478 #endif /* NCR_TEKRAM_EEPROM */
3481 * If scntl3 != 0, we assume BIOS is present.
3484 np->features |= FE_BIOS;
3487 * Divisor to be used for async (timer pre-scaler).
3489 i = np->clock_divn - 1;
3492 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3497 np->rv_scntl3 = i+1;
3500 * Minimum synchronous period factor supported by the chip.
3501 * Btw, 'period' is in tenths of nanoseconds.
3504 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
3505 if (period <= 250) np->minsync = 10;
3506 else if (period <= 303) np->minsync = 11;
3507 else if (period <= 500) np->minsync = 12;
3508 else np->minsync = (period + 40 - 1) / 40;
3511 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
3514 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3516 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3520 * Maximum synchronous period factor supported by the chip.
3523 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3524 np->maxsync = period > 2540 ? 254 : period / 10;
3527 * Now, some features available with Symbios compatible boards.
3528 * LED support through GPIO0 and DIFF support.
3531 #ifdef SCSI_NCR_SYMBIOS_COMPAT
3532 if (!(np->rv_gpcntl & 0x01))
3533 np->features |= FE_LED0;
3534 #if 0 /* Not safe enough without NVRAM support or user settable option */
3535 if (!(INB(nc_gpreg) & 0x08))
3536 np->features |= FE_DIFF;
3538 #endif /* SCSI_NCR_SYMBIOS_COMPAT */
3541 * Prepare initial IO registers settings.
3542 * Trust BIOS only if we believe we have one and if we want to.
3544 #ifdef SCSI_NCR_TRUST_BIOS
3545 if (!(np->features & FE_BIOS)) {
3550 np->rv_dcntl = NOCOM;
3552 np->rv_ctest4 = MPEE;
3556 if (np->features & FE_ERL)
3557 np->rv_dmode |= ERL; /* Enable Read Line */
3558 if (np->features & FE_BOF)
3559 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3560 if (np->features & FE_ERMP)
3561 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3562 if (np->features & FE_CLSE)
3563 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3564 if (np->features & FE_WRIE)
3565 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3566 if (np->features & FE_PFEN)
3567 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3568 if (np->features & FE_DFS)
3569 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3570 if (np->features & FE_DIFF)
3571 np->rv_stest2 |= 0x20; /* Differential mode */
3572 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3575 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3579 ** Get on-chip SRAM address, if supported
3581 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3582 np->sram_rid = 0x18;
3583 np->sram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3589 ** Allocate structure for script relocation.
3591 if (np->sram_res != NULL) {
3593 np->p_script = rman_get_start(np->sram_res);
3594 np->bst2 = rman_get_bustag(np->sram_res);
3595 np->bsh2 = rman_get_bushandle(np->sram_res);
3596 } else if (sizeof (struct script) > PAGE_SIZE) {
3597 np->script = (struct script*) contigmalloc
3598 (round_page(sizeof (struct script)), M_DEVBUF, M_WAITOK,
3599 0, 0xffffffff, PAGE_SIZE, 0);
3601 np->script = (struct script *)
3602 malloc (sizeof (struct script), M_DEVBUF, M_WAITOK);
3605 if (sizeof (struct scripth) > PAGE_SIZE) {
3606 np->scripth = (struct scripth*) contigmalloc
3607 (round_page(sizeof (struct scripth)), M_DEVBUF, M_WAITOK,
3608 0, 0xffffffff, PAGE_SIZE, 0);
3611 np->scripth = (struct scripth *)
3612 malloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK);
3615 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP
3617 ** If cache line size is enabled, check PCI config space and
3618 ** try to fix it up if necessary.
3620 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */
3622 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
3623 u_short command = pci_read_config(dev, PCIR_COMMAND, 2);
3627 printf("%s: setting PCI cache line size register to %d.\n",
3628 ncr_name(np), (int)cachelnsz);
3629 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
3632 if (!(command & (1<<4))) {
3634 printf("%s: setting PCI command write and invalidate.\n",
3636 pci_write_config(dev, PCIR_COMMAND, command, 2);
3639 #endif /* PCIR_CACHELNSZ */
3641 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */
3643 /* Initialize per-target user settings */
3645 if (SCSI_NCR_DFLT_SYNC) {
3646 usrsync = SCSI_NCR_DFLT_SYNC;
3647 if (usrsync > np->maxsync)
3648 usrsync = np->maxsync;
3649 if (usrsync < np->minsync)
3650 usrsync = np->minsync;
3653 usrwide = (SCSI_NCR_MAX_WIDE);
3654 if (usrwide > np->maxwide) usrwide=np->maxwide;
3656 for (i=0;i<MAX_TARGET;i++) {
3657 tcb_p tp = &np->target[i];
3659 tp->tinfo.user.period = usrsync;
3660 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3661 tp->tinfo.user.width = usrwide;
3662 tp->tinfo.disc_tag = NCR_CUR_DISCENB
3669 ** Bells and whistles ;-)
3672 printf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n",
3673 ncr_name(np), np->minsync, np->maxsync, np->maxoffs,
3674 burst_length(np->maxburst),
3675 (np->rv_ctest5 & DFS) ? "large" : "normal");
3678 ** Print some complementary information that can be helpfull.
3681 printf("%s: %s, %s IRQ driver%s\n",
3683 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3684 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3685 np->sram_res ? ", using on-chip SRAM" : "");
3688 ** Patch scripts to physical addresses
3690 ncr_script_fill (&script0, &scripth0);
3693 np->p_script = vtophys(np->script);
3694 np->p_scripth = vtophys(np->scripth);
3696 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3697 (ncrcmd *) np->script, sizeof(struct script));
3699 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3700 (ncrcmd *) np->scripth, sizeof(struct scripth));
3703 ** Patch the script for LED support.
3706 if (np->features & FE_LED0) {
3707 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01));
3708 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3709 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe));
3713 ** init data structure
3716 np->jump_tcb.l_cmd = SCR_JUMP;
3717 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3720 ** Get SCSI addr of host adapter (set by bios?).
3723 np->myaddr = INB(nc_scid) & 0x07;
3724 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3728 ** Log the initial register contents
3732 for (reg=0; reg<256; reg+=4) {
3733 if (reg%16==0) printf ("reg[%2x]", reg);
3734 printf (" %08x", (int)pci_conf_read (config_id, reg));
3735 if (reg%16==12) printf ("\n");
3738 #endif /* NCR_DUMP_REG */
3744 OUTB (nc_istat, SRST);
3746 OUTB (nc_istat, 0 );
3750 ** Now check the cache handling of the pci chipset.
3753 if (ncr_snooptest (np)) {
3754 printf ("CACHE INCORRECTLY CONFIGURED.\n");
3759 ** Install the interrupt handler.
3763 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3764 RF_SHAREABLE | RF_ACTIVE);
3765 if (np->irq_res == NULL) {
3767 "interruptless mode: reduced performance.\n");
3769 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM | INTR_ENTROPY,
3770 ncr_intr, np, &np->irq_handle);
3774 ** Create the device queue. We only allow MAX_START-1 concurrent
3775 ** transactions so we can be sure to have one element free in our
3776 ** start queue to reset to the idle loop.
3778 devq = cam_simq_alloc(MAX_START - 1);
3783 ** Now tell the generic SCSI layer
3786 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit,
3788 if (np->sim == NULL) {
3789 cam_simq_free(devq);
3794 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) {
3795 cam_sim_free(np->sim, /*free_devq*/ TRUE);
3799 if (xpt_create_path(&np->path, /*periph*/NULL,
3800 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3801 CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
3802 xpt_bus_deregister(cam_sim_path(np->sim));
3803 cam_sim_free(np->sim, /*free_devq*/TRUE);
3808 ** start the timeout daemon
3816 /*==========================================================
3819 ** Process pending device interrupts.
3822 **==========================================================
3830 int oldspl = splcam();
3832 if (DEBUG_FLAGS & DEBUG_TINY) printf ("[");
3834 if (INB(nc_istat) & (INTF|SIP|DIP)) {
3836 ** Repeat until no outstanding ints
3840 } while (INB(nc_istat) & (INTF|SIP|DIP));
3845 if (DEBUG_FLAGS & DEBUG_TINY) printf ("]\n");
3850 /*==========================================================
3853 ** Start execution of a SCSI command.
3854 ** This is called from the generic SCSI driver.
3857 **==========================================================
3861 ncr_action (struct cam_sim *sim, union ccb *ccb)
3865 np = (ncb_p) cam_sim_softc(sim);
3867 switch (ccb->ccb_h.func_code) {
3868 /* Common cases first */
3869 case XPT_SCSI_IO: /* Execute the requested I/O operation */
3875 struct ccb_scsiio *csio;
3884 tp = &np->target[ccb->ccb_h.target_id];
3890 * Last time we need to check if this CCB needs to
3893 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
3898 ccb->ccb_h.status |= CAM_SIM_QUEUED;
3900 /*---------------------------------------------------
3902 ** Assign an nccb / bind ccb
3904 **----------------------------------------------------
3906 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
3907 ccb->ccb_h.target_lun);
3909 /* XXX JGibbs - Freeze SIMQ */
3910 ccb->ccb_h.status = CAM_RESRC_UNAVAIL;
3917 /*---------------------------------------------------
3921 **----------------------------------------------------
3924 ** XXX JGibbs - Isn't this expensive
3925 ** enough to be conditionalized??
3928 bzero (&cp->phys.header.stamp, sizeof (struct tstamp));
3929 cp->phys.header.stamp.start = ticks;
3932 if (tp->nego_cp == NULL) {
3934 if (tp->tinfo.current.width
3935 != tp->tinfo.goal.width) {
3938 } else if ((tp->tinfo.current.period
3939 != tp->tinfo.goal.period)
3940 || (tp->tinfo.current.offset
3941 != tp->tinfo.goal.offset)) {
3947 /*---------------------------------------------------
3949 ** choose a new tag ...
3951 **----------------------------------------------------
3953 lp = tp->lp[ccb->ccb_h.target_lun];
3955 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0
3956 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE)
3959 ** assign a tag to this nccb
3962 nccb_p cp2 = lp->next_nccb;
3963 lp->lasttag = lp->lasttag % 255 + 1;
3964 while (cp2 && cp2->tag != lp->lasttag)
3965 cp2 = cp2->next_nccb;
3967 cp->tag=lp->lasttag;
3968 if (DEBUG_FLAGS & DEBUG_TAGS) {
3970 printf ("using tag #%d.\n", cp->tag);
3977 /*----------------------------------------------------
3979 ** Build the identify / tag / sdtr message
3981 **----------------------------------------------------
3983 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun;
3984 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
3985 idmsg |= MSG_IDENTIFY_DISCFLAG;
3987 msgptr = cp->scsi_smsg;
3989 msgptr[msglen++] = idmsg;
3992 msgptr[msglen++] = ccb->csio.tag_action;
3993 msgptr[msglen++] = cp->tag;
3998 msgptr[msglen++] = MSG_EXTENDED;
3999 msgptr[msglen++] = MSG_EXT_SDTR_LEN;
4000 msgptr[msglen++] = MSG_EXT_SDTR;
4001 msgptr[msglen++] = tp->tinfo.goal.period;
4002 msgptr[msglen++] = tp->tinfo.goal.offset;;
4003 if (DEBUG_FLAGS & DEBUG_NEGO) {
4005 printf ("sync msgout: ");
4006 ncr_show_msg (&cp->scsi_smsg [msglen-5]);
4011 msgptr[msglen++] = MSG_EXTENDED;
4012 msgptr[msglen++] = MSG_EXT_WDTR_LEN;
4013 msgptr[msglen++] = MSG_EXT_WDTR;
4014 msgptr[msglen++] = tp->tinfo.goal.width;
4015 if (DEBUG_FLAGS & DEBUG_NEGO) {
4017 printf ("wide msgout: ");
4018 ncr_show_msg (&cp->scsi_smsg [msglen-4]);
4024 /*----------------------------------------------------
4026 ** Build the identify message for getcc.
4028 **----------------------------------------------------
4031 cp->scsi_smsg2 [0] = idmsg;
4034 /*----------------------------------------------------
4036 ** Build the data descriptors
4038 **----------------------------------------------------
4041 /* XXX JGibbs - Handle other types of I/O */
4042 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
4043 segments = ncr_scatter(&cp->phys,
4044 (vm_offset_t)csio->data_ptr,
4045 (vm_size_t)csio->dxfer_len);
4048 ccb->ccb_h.status = CAM_REQ_TOO_BIG;
4049 ncr_free_nccb(np, cp);
4054 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) {
4055 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4056 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4057 } else { /* CAM_DIR_OUT */
4058 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4059 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16;
4062 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4063 cp->phys.header.goalp = cp->phys.header.savep;
4066 cp->phys.header.lastp = cp->phys.header.savep;
4069 /*----------------------------------------------------
4073 **----------------------------------------------------
4076 ** physical -> virtual backlink
4077 ** Generic SCSI command
4079 cp->phys.header.cp = cp;
4083 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4084 cp->phys.header.launch.l_cmd = SCR_JUMP;
4088 cp->phys.select.sel_id = ccb->ccb_h.target_id;
4089 cp->phys.select.sel_scntl3 = tp->tinfo.wval;
4090 cp->phys.select.sel_sxfer = tp->tinfo.sval;
4094 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg);
4095 cp->phys.smsg.size = msglen;
4097 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2);
4098 cp->phys.smsg2.size = msglen2;
4102 /* XXX JGibbs - Support other command types */
4103 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes);
4104 cp->phys.cmd.size = csio->cdb_len;
4108 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd);
4109 cp->phys.scmd.size = 6;
4111 ** patch requested size into sense command
4113 cp->sensecmd[0] = 0x03;
4114 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5;
4115 cp->sensecmd[4] = sizeof(struct scsi_sense_data);
4116 cp->sensecmd[4] = csio->sense_len;
4120 cp->phys.sense.addr = vtophys (&csio->sense_data);
4121 cp->phys.sense.size = csio->sense_len;
4125 cp->actualquirks = QUIRK_NOMSG;
4126 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY;
4127 cp->s_status = SCSI_STATUS_ILLEGAL;
4128 cp->parity_status = 0;
4130 cp->xerr_status = XE_OK;
4131 cp->sync_status = tp->tinfo.sval;
4132 cp->nego_status = nego;
4133 cp->wide_status = tp->tinfo.wval;
4135 /*----------------------------------------------------
4137 ** Critical region: start this job.
4139 **----------------------------------------------------
4143 ** reselect pattern and activate this job.
4146 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag)));
4147 cp->tlimit = time_second
4148 + ccb->ccb_h.timeout / 1000 + 2;
4149 cp->magic = CCB_MAGIC;
4152 ** insert into start queue.
4155 qidx = np->squeueput + 1;
4156 if (qidx >= MAX_START)
4158 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4159 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4160 np->squeueput = qidx;
4162 if(DEBUG_FLAGS & DEBUG_QUEUE)
4163 printf("%s: queuepos=%d tryoffset=%d.\n",
4164 ncr_name (np), np->squeueput,
4165 (unsigned)(READSCRIPT(startpos[0]) -
4166 (NCB_SCRIPTH_PHYS (np, tryloop))));
4169 ** Script processor may be waiting for reselect.
4172 OUTB (nc_istat, SIGP);
4175 ** and reenable interrupts
4180 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */
4181 case XPT_EN_LUN: /* Enable LUN as a target */
4182 case XPT_TARGET_IO: /* Execute target I/O request */
4183 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */
4184 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/
4185 case XPT_ABORT: /* Abort the specified CCB */
4187 ccb->ccb_h.status = CAM_REQ_INVALID;
4190 case XPT_SET_TRAN_SETTINGS:
4192 struct ccb_trans_settings *cts;
4199 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0)
4200 update_type |= NCR_TRANS_GOAL;
4201 if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0)
4202 update_type |= NCR_TRANS_USER;
4205 tp = &np->target[ccb->ccb_h.target_id];
4206 /* Tag and disc enables */
4207 if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
4208 if (update_type & NCR_TRANS_GOAL) {
4209 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4210 tp->tinfo.disc_tag |= NCR_CUR_DISCENB;
4212 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB;
4215 if (update_type & NCR_TRANS_USER) {
4216 if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
4217 tp->tinfo.disc_tag |= NCR_USR_DISCENB;
4219 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB;
4224 if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
4225 if (update_type & NCR_TRANS_GOAL) {
4226 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4227 tp->tinfo.disc_tag |= NCR_CUR_TAGENB;
4229 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB;
4232 if (update_type & NCR_TRANS_USER) {
4233 if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
4234 tp->tinfo.disc_tag |= NCR_USR_TAGENB;
4236 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB;
4240 /* Filter bus width and sync negotiation settings */
4241 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0) {
4242 if (cts->bus_width > np->maxwide)
4243 cts->bus_width = np->maxwide;
4246 if (((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4247 || ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)) {
4248 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0) {
4249 if (cts->sync_period != 0
4250 && (cts->sync_period < np->minsync))
4251 cts->sync_period = np->minsync;
4253 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0) {
4254 if (cts->sync_offset == 0)
4255 cts->sync_period = 0;
4256 if (cts->sync_offset > np->maxoffs)
4257 cts->sync_offset = np->maxoffs;
4260 if ((update_type & NCR_TRANS_USER) != 0) {
4261 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4262 tp->tinfo.user.period = cts->sync_period;
4263 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4264 tp->tinfo.user.offset = cts->sync_offset;
4265 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4266 tp->tinfo.user.width = cts->bus_width;
4268 if ((update_type & NCR_TRANS_GOAL) != 0) {
4269 if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
4270 tp->tinfo.goal.period = cts->sync_period;
4272 if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
4273 tp->tinfo.goal.offset = cts->sync_offset;
4275 if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
4276 tp->tinfo.goal.width = cts->bus_width;
4279 ccb->ccb_h.status = CAM_REQ_CMP;
4283 case XPT_GET_TRAN_SETTINGS:
4284 /* Get default/user set transfer settings for the target */
4286 struct ccb_trans_settings *cts;
4287 struct ncr_transinfo *tinfo;
4292 tp = &np->target[ccb->ccb_h.target_id];
4295 if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
4296 tinfo = &tp->tinfo.current;
4297 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB)
4298 cts->flags |= CCB_TRANS_DISC_ENB;
4300 cts->flags &= ~CCB_TRANS_DISC_ENB;
4302 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB)
4303 cts->flags |= CCB_TRANS_TAG_ENB;
4305 cts->flags &= ~CCB_TRANS_TAG_ENB;
4307 tinfo = &tp->tinfo.user;
4308 if (tp->tinfo.disc_tag & NCR_USR_DISCENB)
4309 cts->flags |= CCB_TRANS_DISC_ENB;
4311 cts->flags &= ~CCB_TRANS_DISC_ENB;
4313 if (tp->tinfo.disc_tag & NCR_USR_TAGENB)
4314 cts->flags |= CCB_TRANS_TAG_ENB;
4316 cts->flags &= ~CCB_TRANS_TAG_ENB;
4319 cts->sync_period = tinfo->period;
4320 cts->sync_offset = tinfo->offset;
4321 cts->bus_width = tinfo->width;
4325 cts->valid = CCB_TRANS_SYNC_RATE_VALID
4326 | CCB_TRANS_SYNC_OFFSET_VALID
4327 | CCB_TRANS_BUS_WIDTH_VALID
4328 | CCB_TRANS_DISC_VALID
4329 | CCB_TRANS_TQ_VALID;
4331 ccb->ccb_h.status = CAM_REQ_CMP;
4335 case XPT_CALC_GEOMETRY:
4337 /* XXX JGibbs - I'm sure the NCR uses a different strategy,
4338 * but it should be able to deal with Adaptec
4341 cam_calc_geometry(&ccb->ccg, /*extended*/1);
4345 case XPT_RESET_BUS: /* Reset the specified SCSI bus */
4347 OUTB (nc_scntl1, CRST);
4348 ccb->ccb_h.status = CAM_REQ_CMP;
4349 DELAY(10000); /* Wait until our interrupt handler sees it */
4353 case XPT_TERM_IO: /* Terminate the I/O process */
4355 ccb->ccb_h.status = CAM_REQ_INVALID;
4358 case XPT_PATH_INQ: /* Path routing inquiry */
4360 struct ccb_pathinq *cpi = &ccb->cpi;
4362 cpi->version_num = 1; /* XXX??? */
4363 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE;
4364 if ((np->features & FE_WIDE) != 0)
4365 cpi->hba_inquiry |= PI_WIDE_16;
4366 cpi->target_sprt = 0;
4368 cpi->hba_eng_cnt = 0;
4369 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4370 cpi->max_lun = MAX_LUN - 1;
4371 cpi->initiator_id = np->myaddr;
4372 cpi->bus_id = cam_sim_bus(sim);
4373 cpi->base_transfer_speed = 3300;
4374 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
4375 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
4376 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
4377 cpi->unit_number = cam_sim_unit(sim);
4378 cpi->ccb_h.status = CAM_REQ_CMP;
4383 ccb->ccb_h.status = CAM_REQ_INVALID;
4389 /*==========================================================
4392 ** Complete execution of a SCSI command.
4393 ** Signal completion to the generic SCSI driver.
4396 **==========================================================
4400 ncr_complete (ncb_p np, nccb_p cp)
4409 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return;
4414 ** No Reselect anymore.
4416 cp->jump_nccb.l_cmd = (SCR_JUMP);
4421 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4426 ncb_profile (np, cp);
4428 if (DEBUG_FLAGS & DEBUG_TINY)
4429 printf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff,
4430 cp->host_status,cp->s_status);
4434 tp = &np->target[ccb->ccb_h.target_id];
4437 ** We do not queue more than 1 nccb per target
4438 ** with negotiation at any time. If this nccb was
4439 ** used for negotiation, clear this info in the tcb.
4442 if (cp == tp->nego_cp)
4446 ** Check for parity errors.
4448 /* XXX JGibbs - What about reporting them??? */
4450 if (cp->parity_status) {
4452 printf ("%d parity error(s), fallback.\n", cp->parity_status);
4454 ** fallback to asynch transfer.
4456 tp->tinfo.goal.period = 0;
4457 tp->tinfo.goal.offset = 0;
4461 ** Check for extended errors.
4464 if (cp->xerr_status != XE_OK) {
4466 switch (cp->xerr_status) {
4468 printf ("extraneous data discarded.\n");
4471 printf ("illegal scsi phase (4/5).\n");
4474 printf ("extended error %d.\n", cp->xerr_status);
4477 if (cp->host_status==HS_COMPLETE)
4478 cp->host_status = HS_FAIL;
4482 ** Check the status.
4484 if (cp->host_status == HS_COMPLETE) {
4486 if (cp->s_status == SCSI_STATUS_OK) {
4491 /* XXX JGibbs - Properly calculate residual */
4493 tp->bytes += ccb->csio.dxfer_len;
4496 ccb->ccb_h.status = CAM_REQ_CMP;
4497 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) {
4500 * XXX Could be TERMIO too. Should record
4503 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
4504 cp->s_status &= ~SCSI_STATUS_SENSE;
4505 if (cp->s_status == SCSI_STATUS_OK) {
4507 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR;
4509 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL;
4512 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR;
4513 ccb->csio.scsi_status = cp->s_status;
4517 } else if (cp->host_status == HS_SEL_TIMEOUT) {
4520 ** Device failed selection
4522 ccb->ccb_h.status = CAM_SEL_TIMEOUT;
4524 } else if (cp->host_status == HS_TIMEOUT) {
4529 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4530 } else if (cp->host_status == HS_STALL) {
4531 ccb->ccb_h.status = CAM_REQUEUE_REQ;
4535 ** Other protocol messes
4538 printf ("COMMAND FAILED (%x %x) @%p.\n",
4539 cp->host_status, cp->s_status, cp);
4541 ccb->ccb_h.status = CAM_CMD_TIMEOUT;
4544 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) {
4545 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1);
4546 ccb->ccb_h.status |= CAM_DEV_QFRZN;
4552 ncr_free_nccb (np, cp);
4555 ** signal completion to generic driver.
4560 /*==========================================================
4563 ** Signal all (or one) control block done.
4566 **==========================================================
4570 ncr_wakeup (ncb_p np, u_long code)
4573 ** Starting at the default nccb and following
4574 ** the links, complete all jobs with a
4575 ** host_status greater than "disconnect".
4577 ** If the "code" parameter is not zero,
4578 ** complete all jobs that are not IDLE.
4581 nccb_p cp = np->link_nccb;
4583 switch (cp->host_status) {
4589 if(DEBUG_FLAGS & DEBUG_TINY) printf ("D");
4595 cp->host_status = code;
4600 ncr_complete (np, cp);
4603 cp = cp -> link_nccb;
4608 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4615 ** Starting at the first nccb and following
4616 ** the links, complete all jobs that match
4617 ** the passed in path and are in the start queue.
4624 switch (cp->host_status) {
4628 if ((cp->phys.header.launch.l_paddr
4629 == NCB_SCRIPT_PHYS (np, select))
4630 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) {
4632 /* Mark for removal from the start queue */
4633 for (i = 1; i < MAX_START; i++) {
4636 idx = np->squeueput - i;
4639 idx = MAX_START + idx;
4641 == CCB_PHYS(cp, phys)) {
4643 NCB_SCRIPT_PHYS (np, skip);
4649 cp->host_status=HS_STALL;
4650 ncr_complete (np, cp);
4664 /* Compress the start queue */
4666 bidx = np->squeueput;
4667 i = np->squeueput - firstskip;
4674 bidx = MAX_START + bidx;
4676 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4678 } else if (j != 0) {
4679 np->squeue[bidx] = np->squeue[i];
4680 if (np->squeue[bidx]
4681 == NCB_SCRIPT_PHYS(np, idle))
4684 i = (i + 1) % MAX_START;
4686 np->squeueput = bidx;
4690 /*==========================================================
4696 **==========================================================
4700 ncr_init(ncb_p np, char * msg, u_long code)
4708 OUTB (nc_istat, SRST);
4716 if (msg) printf ("%s: restart (%s).\n", ncr_name (np), msg);
4719 ** Clear Start Queue
4722 for (i=0;i<MAX_START;i++)
4723 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4726 ** Start at first entry.
4730 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4731 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0));
4734 ** Wakeup all pending jobs.
4737 ncr_wakeup (np, code);
4743 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */
4744 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */
4745 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */
4746 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4747 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4748 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4749 OUTB (nc_istat , SIGP ); /* Signal Process */
4750 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4751 OUTB (nc_dcntl , np->rv_dcntl);
4752 OUTB (nc_ctest3, np->rv_ctest3);
4753 OUTB (nc_ctest5, np->rv_ctest5);
4754 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4755 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4756 OUTB (nc_stest3, TE ); /* TolerANT enable */
4757 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */
4759 if (bootverbose >= 2) {
4760 printf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n",
4761 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4762 printf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n",
4763 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4767 ** Enable GPIO0 pin for writing if LED support.
4770 if (np->features & FE_LED0) {
4771 OUTOFFB (nc_gpcntl, 0x01);
4775 ** Fill in target structure.
4777 for (i=0;i<MAX_TARGET;i++) {
4778 tcb_p tp = &np->target[i];
4781 tp->tinfo.wval = np->rv_scntl3;
4783 tp->tinfo.current.period = 0;
4784 tp->tinfo.current.offset = 0;
4785 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT;
4792 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST);
4793 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID);
4796 ** Start script processor.
4799 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4802 * Notify the XPT of the event
4804 if (code == HS_RESET)
4805 xpt_async(AC_BUS_RESET, np->path, NULL);
4809 ncr_poll(struct cam_sim *sim)
4811 ncr_intr(cam_sim_softc(sim));
4815 /*==========================================================
4817 ** Get clock factor and sync divisor for a given
4818 ** synchronous factor period.
4819 ** Returns the clock factor (in sxfer) and scntl3
4820 ** synchronous divisor field.
4822 **==========================================================
4825 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4827 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4828 int div = np->clock_divn; /* Number of divisors supported */
4829 u_long fak; /* Sync factor in sxfer */
4830 u_long per; /* Period in tenths of ns */
4831 u_long kpc; /* (per * clk) */
4834 ** Compute the synchronous period in tenths of nano-seconds
4836 if (sfac <= 10) per = 250;
4837 else if (sfac == 11) per = 303;
4838 else if (sfac == 12) per = 500;
4839 else per = 40 * sfac;
4842 ** Look for the greatest clock divisor that allows an
4843 ** input speed faster than the period.
4847 if (kpc >= (div_10M[div] * 4)) break;
4850 ** Calculate the lowest clock factor that allows an output
4851 ** speed not faster than the period.
4853 fak = (kpc - 1) / div_10M[div] + 1;
4855 #if 0 /* You can #if 1 if you think this optimization is usefull */
4857 per = (fak * div_10M[div]) / clk;
4860 ** Why not to try the immediate lower divisor and to choose
4861 ** the one that allows the fastest output speed ?
4862 ** We dont want input speed too much greater than output speed.
4864 if (div >= 1 && fak < 6) {
4866 fak2 = (kpc - 1) / div_10M[div-1] + 1;
4867 per2 = (fak2 * div_10M[div-1]) / clk;
4868 if (per2 < per && fak2 <= 6) {
4876 if (fak < 4) fak = 4; /* Should never happen, too bad ... */
4879 ** Compute and return sync parameters for the ncr
4882 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0);
4885 /*==========================================================
4887 ** Switch sync mode for current job and its target
4889 **==========================================================
4893 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4896 struct ccb_trans_settings neg;
4899 u_int target = INB (nc_sdid) & 0x0f;
4908 assert (target == ccb->ccb_h.target_id);
4910 tp = &np->target[target];
4912 if (!scntl3 || !(sxfer & 0x1f))
4913 scntl3 = np->rv_scntl3;
4914 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS)
4915 | (np->rv_scntl3 & 0x07);
4918 ** Deduce the value of controller sync period from scntl3.
4919 ** period is in tenths of nano-seconds.
4922 div = ((scntl3 >> 4) & 0x7);
4923 if ((sxfer & 0x1f) && div)
4925 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4929 tp->tinfo.goal.period = period;
4930 tp->tinfo.goal.offset = sxfer & 0x1f;
4931 tp->tinfo.current.period = period;
4932 tp->tinfo.current.offset = sxfer & 0x1f;
4935 ** Stop there if sync parameters are unchanged
4937 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
4938 tp->tinfo.sval = sxfer;
4939 tp->tinfo.wval = scntl3;
4943 ** Disable extended Sreq/Sack filtering
4945 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT);
4949 ** Tell the SCSI layer about the
4950 ** new transfer parameters.
4952 neg.sync_period = period;
4953 neg.sync_offset = sxfer & 0x1f;
4954 neg.valid = CCB_TRANS_SYNC_RATE_VALID
4955 | CCB_TRANS_SYNC_OFFSET_VALID;
4956 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
4958 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
4961 ** set actual value and sync_status
4963 OUTB (nc_sxfer, sxfer);
4964 np->sync_st = sxfer;
4965 OUTB (nc_scntl3, scntl3);
4966 np->wide_st = scntl3;
4969 ** patch ALL nccbs of this target.
4971 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4972 if (!cp->ccb) continue;
4973 if (cp->ccb->ccb_h.target_id != target) continue;
4974 cp->sync_status = sxfer;
4975 cp->wide_status = scntl3;
4979 /*==========================================================
4981 ** Switch wide mode for current job and its target
4982 ** SCSI specs say: a SCSI device that accepts a WDTR
4983 ** message shall reset the synchronous agreement to
4984 ** asynchronous mode.
4986 **==========================================================
4989 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
4992 struct ccb_trans_settings neg;
4993 u_int target = INB (nc_sdid) & 0x0f;
5004 assert (target == ccb->ccb_h.target_id);
5006 tp = &np->target[target];
5007 tp->tinfo.current.width = wide;
5008 tp->tinfo.goal.width = wide;
5009 tp->tinfo.current.period = 0;
5010 tp->tinfo.current.offset = 0;
5012 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0);
5014 sxfer = ack ? 0 : tp->tinfo.sval;
5017 ** Stop there if sync/wide parameters are unchanged
5019 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return;
5020 tp->tinfo.sval = sxfer;
5021 tp->tinfo.wval = scntl3;
5023 /* Tell the SCSI layer about the new transfer params */
5024 neg.bus_width = (scntl3 & EWS) ? MSG_EXT_WDTR_BUS_16_BIT
5025 : MSG_EXT_WDTR_BUS_8_BIT;
5026 neg.sync_period = 0;
5027 neg.sync_offset = 0;
5028 neg.valid = CCB_TRANS_BUS_WIDTH_VALID
5029 | CCB_TRANS_SYNC_RATE_VALID
5030 | CCB_TRANS_SYNC_OFFSET_VALID;
5031 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path,
5033 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg);
5036 ** set actual value and sync_status
5038 OUTB (nc_sxfer, sxfer);
5039 np->sync_st = sxfer;
5040 OUTB (nc_scntl3, scntl3);
5041 np->wide_st = scntl3;
5044 ** patch ALL nccbs of this target.
5046 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5047 if (!cp->ccb) continue;
5048 if (cp->ccb->ccb_h.target_id != target) continue;
5049 cp->sync_status = sxfer;
5050 cp->wide_status = scntl3;
5054 /*==========================================================
5057 ** ncr timeout handler.
5060 **==========================================================
5062 ** Misused to keep the driver running when
5063 ** interrupts are not configured correctly.
5065 **----------------------------------------------------------
5069 ncr_timeout (void *arg)
5072 time_t thistime = time_second;
5073 ticks_t step = np->ticks;
5078 if (np->lasttime != thistime) {
5080 ** block ncr interrupts
5082 int oldspl = splcam();
5083 np->lasttime = thistime;
5085 /*----------------------------------------------------
5087 ** handle ncr chip timeouts
5090 ** We have a chance to arbitrate for the
5091 ** SCSI bus at least every 10 seconds.
5093 **----------------------------------------------------
5096 t = thistime - np->heartbeat;
5098 if (t<2) np->latetime=0; else np->latetime++;
5100 if (np->latetime>2) {
5102 ** If there are no requests, the script
5103 ** processor will sleep on SEL_WAIT_RESEL.
5104 ** But we have to check whether it died.
5105 ** Let's try to wake it up.
5107 OUTB (nc_istat, SIGP);
5110 /*----------------------------------------------------
5112 ** handle nccb timeouts
5114 **----------------------------------------------------
5117 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5119 ** look for timed out nccbs.
5121 if (!cp->host_status) continue;
5123 if (cp->tlimit > thistime) continue;
5126 ** Disable reselect.
5127 ** Remove it from startqueue.
5129 cp->jump_nccb.l_cmd = (SCR_JUMP);
5130 if (cp->phys.header.launch.l_paddr ==
5131 NCB_SCRIPT_PHYS (np, select)) {
5132 printf ("%s: timeout nccb=%p (skip)\n",
5134 cp->phys.header.launch.l_paddr
5135 = NCB_SCRIPT_PHYS (np, skip);
5138 switch (cp->host_status) {
5144 cp->host_status=HS_TIMEOUT;
5149 ** wakeup this nccb.
5151 ncr_complete (np, cp);
5157 timeout (ncr_timeout, (caddr_t) np, step ? step : 1);
5159 if (INB(nc_istat) & (INTF|SIP|DIP)) {
5162 ** Process pending interrupts.
5165 int oldspl = splcam();
5166 if (DEBUG_FLAGS & DEBUG_TINY) printf ("{");
5168 if (DEBUG_FLAGS & DEBUG_TINY) printf ("}");
5173 /*==========================================================
5175 ** log message for real hard errors
5177 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)."
5178 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf."
5180 ** exception register:
5185 ** so: control lines as driver by NCR.
5186 ** si: control lines as seen by NCR.
5187 ** sd: scsi data lines as seen by NCR.
5190 ** sxfer: (see the manual)
5191 ** scntl3: (see the manual)
5193 ** current script command:
5194 ** dsp: script address (relative to start of script).
5195 ** dbc: first word of script command.
5197 ** First 16 register of the chip:
5200 **==========================================================
5203 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5209 u_char *script_base;
5214 if (np->p_script < dsp &&
5215 dsp <= np->p_script + sizeof(struct script)) {
5216 script_ofs = dsp - np->p_script;
5217 script_size = sizeof(struct script);
5218 script_base = (u_char *) np->script;
5219 script_name = "script";
5221 else if (np->p_scripth < dsp &&
5222 dsp <= np->p_scripth + sizeof(struct scripth)) {
5223 script_ofs = dsp - np->p_scripth;
5224 script_size = sizeof(struct scripth);
5225 script_base = (u_char *) np->scripth;
5226 script_name = "scripth";
5231 script_name = "mem";
5234 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
5235 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
5236 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl),
5237 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs,
5238 (unsigned)INL (nc_dbc));
5240 if (((script_ofs & 3) == 0) &&
5241 (unsigned)script_ofs < script_size) {
5242 printf ("%s: script cmd = %08x\n", ncr_name(np),
5243 (int)READSCRIPT_OFF(script_base, script_ofs));
5246 printf ("%s: regdump:", ncr_name(np));
5248 printf (" %02x", (unsigned)INB_OFF(i));
5252 /*==========================================================
5255 ** ncr chip exception handler.
5258 **==========================================================
5261 static void ncr_exception (ncb_p np)
5263 u_char istat, dstat;
5267 ** interrupt on the fly ?
5269 while ((istat = INB (nc_istat)) & INTF) {
5270 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F ");
5271 OUTB (nc_istat, INTF);
5272 np->profile.num_fly++;
5275 if (!(istat & (SIP|DIP))) {
5280 ** Steinbach's Guideline for Systems Programming:
5281 ** Never test for an error condition you don't know how to handle.
5284 sist = (istat & SIP) ? INW (nc_sist) : 0;
5285 dstat = (istat & DIP) ? INB (nc_dstat) : 0;
5286 np->profile.num_int++;
5288 if (DEBUG_FLAGS & DEBUG_TINY)
5289 printf ("<%d|%x:%x|%x:%x>",
5292 (unsigned)INL(nc_dsp),
5293 (unsigned)INL(nc_dbc));
5294 if ((dstat==DFE) && (sist==PAR)) return;
5296 /*==========================================================
5298 ** First the normal cases.
5300 **==========================================================
5302 /*-------------------------------------------
5304 **-------------------------------------------
5308 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5312 /*-------------------------------------------
5313 ** selection timeout
5315 ** IID excluded from dstat mask!
5317 **-------------------------------------------
5321 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5322 !(dstat & (MDPE|BF|ABRT|SIR))) {
5327 /*-------------------------------------------
5329 **-------------------------------------------
5333 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) &&
5334 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5335 ncr_int_ma (np, dstat);
5339 /*----------------------------------------
5340 ** move command with length 0
5341 **----------------------------------------
5344 if ((dstat & IID) &&
5345 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5346 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5347 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) {
5349 ** Target wants more data than available.
5350 ** The "no_data" script will do it.
5352 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5356 /*-------------------------------------------
5357 ** Programmed interrupt
5358 **-------------------------------------------
5361 if ((dstat & SIR) &&
5362 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5363 !(dstat & (MDPE|BF|ABRT|IID)) &&
5364 (INB(nc_dsps) <= SIR_MAX)) {
5369 /*========================================
5370 ** log message for real hard errors
5371 **========================================
5374 ncr_log_hard_error(np, sist, dstat);
5376 /*========================================
5377 ** do the register dump
5378 **========================================
5381 if (time_second - np->regtime > 10) {
5383 np->regtime = time_second;
5384 for (i=0; i<sizeof(np->regdump); i++)
5385 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5386 np->regdump.nc_dstat = dstat;
5387 np->regdump.nc_sist = sist;
5391 /*----------------------------------------
5392 ** clean up the dma fifo
5393 **----------------------------------------
5396 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) ||
5397 (INB(nc_sstat1) & (FF3210) ) ||
5398 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */
5400 printf ("%s: have to clear fifos.\n", ncr_name (np));
5401 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5402 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5403 /* clear dma fifo */
5406 /*----------------------------------------
5407 ** handshake timeout
5408 **----------------------------------------
5412 printf ("%s: handshake timeout\n", ncr_name(np));
5413 OUTB (nc_scntl1, CRST);
5415 OUTB (nc_scntl1, 0x00);
5416 OUTB (nc_scr0, HS_FAIL);
5417 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5421 /*----------------------------------------
5422 ** unexpected disconnect
5423 **----------------------------------------
5427 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) &&
5428 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5429 OUTB (nc_scr0, HS_UNEXPECTED);
5430 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5434 /*----------------------------------------
5435 ** cannot disconnect
5436 **----------------------------------------
5439 if ((dstat & IID) &&
5440 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5441 !(dstat & (MDPE|BF|ABRT|SIR)) &&
5442 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) {
5444 ** Unexpected data cycle while waiting for disconnect.
5446 if (INB(nc_sstat2) & LDSC) {
5448 ** It's an early reconnect.
5449 ** Let's continue ...
5451 OUTB (nc_dcntl, np->rv_dcntl | STD);
5455 printf ("%s: INFO: LDSC while IID.\n",
5459 printf ("%s: target %d doesn't release the bus.\n",
5460 ncr_name (np), INB (nc_sdid)&0x0f);
5462 ** return without restarting the NCR.
5463 ** timeout will do the real work.
5468 /*----------------------------------------
5470 **----------------------------------------
5473 if ((dstat & SSI) &&
5474 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) &&
5475 !(dstat & (MDPE|BF|ABRT|SIR|IID))) {
5476 OUTB (nc_dcntl, np->rv_dcntl | STD);
5481 ** @RECOVER@ HTH, SGE, ABRT.
5483 ** We should try to recover from these interrupts.
5484 ** They may occur if there are problems with synch transfers, or
5485 ** if targets are switched on or off while the driver is running.
5489 /* clear scsi offsets */
5490 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5494 ** Freeze controller to be able to read the messages.
5497 if (DEBUG_FLAGS & DEBUG_FREEZE) {
5500 for (i=0; i<0x60; i++) {
5504 printf ("%s: reg[%d0]: ",
5513 val = bus_space_read_1(np->bst, np->bsh, i);
5514 printf (" %x%x", val/16, val%16);
5515 if (i%16==15) printf (".\n");
5518 untimeout (ncr_timeout, (caddr_t) np, np->timeout_ch);
5520 printf ("%s: halted!\n", ncr_name(np));
5522 ** don't restart controller ...
5524 OUTB (nc_istat, SRST);
5530 ** Freeze system to be able to read the messages.
5532 printf ("ncr: fatal error: system halted - press reset to reboot ...");
5538 ** sorry, have to kill ALL jobs ...
5541 ncr_init (np, "fatal error", HS_FAIL);
5544 /*==========================================================
5546 ** ncr chip exception handler for selection timeout
5548 **==========================================================
5550 ** There seems to be a bug in the 53c810.
5551 ** Although a STO-Interrupt is pending,
5552 ** it continues executing script commands.
5553 ** But it will fail and interrupt (IID) on
5554 ** the next instruction where it's looking
5555 ** for a valid phase.
5557 **----------------------------------------------------------
5560 static void ncr_int_sto (ncb_p np)
5562 u_long dsa, scratcha, diff;
5564 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T");
5567 ** look for nccb and set the status.
5572 while (cp && (CCB_PHYS (cp, phys) != dsa))
5576 cp-> host_status = HS_SEL_TIMEOUT;
5577 ncr_complete (np, cp);
5581 ** repair start queue
5584 scratcha = INL (nc_scratcha);
5585 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5587 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/
5589 if ((diff <= MAX_START * 20) && !(diff % 20)) {
5590 WRITESCRIPT(startpos[0], scratcha);
5591 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5594 ncr_init (np, "selection timeout", HS_FAIL);
5597 /*==========================================================
5600 ** ncr chip exception handler for phase errors.
5603 **==========================================================
5605 ** We have to construct a new transfer descriptor,
5606 ** to transfer the rest of the current block.
5608 **----------------------------------------------------------
5611 static void ncr_int_ma (ncb_p np, u_char dstat)
5618 volatile void *vdsp_base;
5620 u_int32_t oadr, olen;
5621 u_int32_t *tblp, *newcmd;
5622 u_char cmd, sbcl, ss0, ss2, ctest5;
5629 ss0 = INB (nc_sstat0);
5630 ss2 = INB (nc_sstat2);
5631 sbcl= INB (nc_sbcl);
5634 rest= dbc & 0xffffff;
5636 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5638 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff;
5640 delta=(INB (nc_dfifo) - rest) & 0x7f;
5644 ** The data in the dma fifo has not been transfered to
5645 ** the target -> add the amount to the rest
5646 ** and clear the data.
5647 ** Check the sstat2 register in case of wide transfer.
5650 if (!(dstat & DFE)) rest += delta;
5651 if (ss0 & OLF) rest++;
5652 if (ss0 & ORF) rest++;
5653 if (INB(nc_scntl3) & EWS) {
5654 if (ss2 & OLF1) rest++;
5655 if (ss2 & ORF1) rest++;
5657 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5658 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */
5661 ** locate matching cp
5664 while (cp && (CCB_PHYS (cp, phys) != dsa))
5668 printf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n",
5669 ncr_name (np), (void *) np->header.cp);
5672 if (cp != np->header.cp) {
5673 printf ("%s: SCSI phase error fixup: CCB address mismatch "
5674 "(%p != %p) np->nccb = %p\n",
5675 ncr_name (np), (void *)cp, (void *)np->header.cp,
5676 (void *)np->link_nccb);
5681 ** find the interrupted script command,
5682 ** and the address at which to continue.
5685 if (dsp == vtophys (&cp->patch[2])) {
5687 vdsp_off = offsetof(struct nccb, patch[0]);
5688 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5689 } else if (dsp == vtophys (&cp->patch[6])) {
5691 vdsp_off = offsetof(struct nccb, patch[4]);
5692 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4);
5693 } else if (dsp > np->p_script &&
5694 dsp <= np->p_script + sizeof(struct script)) {
5695 vdsp_base = np->script;
5696 vdsp_off = dsp - np->p_script - 8;
5699 vdsp_base = np->scripth;
5700 vdsp_off = dsp - np->p_scripth - 8;
5705 ** log the information
5707 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) {
5708 printf ("P%x%x ",cmd&7, sbcl&7);
5709 printf ("RL=%d D=%d SS0=%x ",
5710 (unsigned) rest, (unsigned) delta, ss0);
5712 if (DEBUG_FLAGS & DEBUG_PHASE) {
5713 printf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
5716 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd);
5720 ** get old startaddress and old length.
5723 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4);
5725 if (cmd & 0x10) { /* Table indirect */
5726 tblp = (u_int32_t *) ((char*) &cp->phys + oadr);
5730 tblp = (u_int32_t *) 0;
5731 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff;
5734 if (DEBUG_FLAGS & DEBUG_PHASE) {
5735 printf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n",
5736 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24),
5743 ** if old phase not dataphase, leave here.
5746 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) {
5747 PRINT_ADDR(cp->ccb);
5748 printf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
5750 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24);
5755 PRINT_ADDR(cp->ccb);
5756 printf ("phase change %x-%x %d@%08x resid=%d.\n",
5757 cmd&7, sbcl&7, (unsigned)olen,
5758 (unsigned)oadr, (unsigned)rest);
5760 OUTB (nc_dcntl, np->rv_dcntl | STD);
5765 ** choose the correct patch area.
5766 ** if savep points to one, choose the other.
5770 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4;
5773 ** fillin the commands
5776 newcmd[0] = ((cmd & 0x0f) << 24) | rest;
5777 newcmd[1] = oadr + olen - rest;
5778 newcmd[2] = SCR_JUMP;
5781 if (DEBUG_FLAGS & DEBUG_PHASE) {
5782 PRINT_ADDR(cp->ccb);
5783 printf ("newcmd[%d] %x %x %x %x.\n",
5784 (int)(newcmd - cp->patch),
5785 (unsigned)newcmd[0],
5786 (unsigned)newcmd[1],
5787 (unsigned)newcmd[2],
5788 (unsigned)newcmd[3]);
5791 ** fake the return address (to the patch).
5792 ** and restart script processor at dispatcher.
5794 np->profile.num_break++;
5795 OUTL (nc_temp, vtophys (newcmd));
5797 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5799 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5802 /*==========================================================
5805 ** ncr chip exception handler for programmed interrupts.
5808 **==========================================================
5811 static int ncr_show_msg (u_char * msg)
5815 if (*msg==MSG_EXTENDED) {
5817 if (i-1>msg[1]) break;
5818 printf ("-%x",msg[i]);
5821 } else if ((*msg & 0xf0) == 0x20) {
5822 printf ("-%x",msg[1]);
5828 static void ncr_int_sir (ncb_p np)
5831 u_char chg, ofs, per, fak, wide;
5832 u_char num = INB (nc_dsps);
5835 u_int target = INB (nc_sdid) & 0x0f;
5836 tcb_p tp = &np->target[target];
5838 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num);
5841 case SIR_SENSE_RESTART:
5842 case SIR_STALL_RESTART:
5851 while (cp && (CCB_PHYS (cp, phys) != dsa))
5857 assert (cp == np->header.cp);
5858 if (cp != np->header.cp)
5864 /*--------------------------------------------------------------------
5866 ** Processing of interrupted getcc selects
5868 **--------------------------------------------------------------------
5871 case SIR_SENSE_RESTART:
5872 /*------------------------------------------
5873 ** Script processor is idle.
5874 ** Look for interrupted "check cond"
5875 **------------------------------------------
5878 if (DEBUG_FLAGS & DEBUG_RESTART)
5879 printf ("%s: int#%d",ncr_name (np),num);
5881 for (i=0; i<MAX_TARGET; i++) {
5882 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" t%d", i);
5883 tp = &np->target[i];
5884 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5887 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("+");
5888 if ((cp->host_status==HS_BUSY) &&
5889 (cp->s_status==SCSI_STATUS_CHECK_COND))
5891 if (DEBUG_FLAGS & DEBUG_RESTART) printf ("- (remove)");
5892 tp->hold_cp = cp = (nccb_p) 0;
5896 if (DEBUG_FLAGS & DEBUG_RESTART)
5897 printf ("+ restart job ..\n");
5898 OUTL (nc_dsa, CCB_PHYS (cp, phys));
5899 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5904 ** no job, resume normal processing
5906 if (DEBUG_FLAGS & DEBUG_RESTART) printf (" -- remove trap\n");
5907 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0));
5910 case SIR_SENSE_FAILED:
5911 /*-------------------------------------------
5912 ** While trying to select for
5913 ** getting the condition code,
5914 ** a target reselected us.
5915 **-------------------------------------------
5917 if (DEBUG_FLAGS & DEBUG_RESTART) {
5918 PRINT_ADDR(cp->ccb);
5919 printf ("in getcc reselect by t%d.\n",
5920 INB(nc_ssid) & 0x0f);
5926 cp->host_status = HS_BUSY;
5927 cp->s_status = SCSI_STATUS_CHECK_COND;
5928 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
5931 ** And patch code to restart it.
5933 WRITESCRIPT(start0[0], SCR_INT);
5936 /*-----------------------------------------------------------------------------
5938 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ...
5940 ** We try to negotiate sync and wide transfer only after
5941 ** a successfull inquire command. We look at byte 7 of the
5942 ** inquire data to determine the capabilities if the target.
5944 ** When we try to negotiate, we append the negotiation message
5945 ** to the identify and (maybe) simple tag message.
5946 ** The host status field is set to HS_NEGOTIATE to mark this
5949 ** If the target doesn't answer this message immidiately
5950 ** (as required by the standard), the SIR_NEGO_FAIL interrupt
5951 ** will be raised eventually.
5952 ** The handler removes the HS_NEGOTIATE status, and sets the
5953 ** negotiated value to the default (async / nowide).
5955 ** If we receive a matching answer immediately, we check it
5956 ** for validity, and set the values.
5958 ** If we receive a Reject message immediately, we assume the
5959 ** negotiation has failed, and fall back to standard values.
5961 ** If we receive a negotiation message while not in HS_NEGOTIATE
5962 ** state, it's a target initiated negotiation. We prepare a
5963 ** (hopefully) valid answer, set our parameters, and send back
5964 ** this answer to the target.
5966 ** If the target doesn't fetch the answer (no message out phase),
5967 ** we assume the negotiation has failed, and fall back to default
5970 ** When we set the values, we adjust them in all nccbs belonging
5971 ** to this target, in the controller's register, and in the "phys"
5972 ** field of the controller's struct ncb.
5974 ** Possible cases: hs sir msg_in value send goto
5975 ** We try try to negotiate:
5976 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch
5977 ** -> target rejected our msg NEG FAIL reject defa. - dispatch
5978 ** -> target answered (ok) NEG SYNC sdtr set - clrack
5979 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad
5980 ** -> target answered (ok) NEG WIDE wdtr set - clrack
5981 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad
5982 ** -> any other msgin NEG FAIL noop defa. - dispatch
5984 ** Target tries to negotiate:
5985 ** -> incoming message --- SYNC sdtr set SDTR -
5986 ** -> incoming message --- WIDE wdtr set WDTR -
5987 ** We sent our answer:
5988 ** -> target doesn't msgout --- PROTO ? defa. - dispatch
5990 **-----------------------------------------------------------------------------
5993 case SIR_NEGO_FAILED:
5994 /*-------------------------------------------------------
5996 ** Negotiation failed.
5997 ** Target doesn't send an answer message,
5998 ** or target rejected our message.
6000 ** Remove negotiation request.
6002 **-------------------------------------------------------
6004 OUTB (HS_PRT, HS_BUSY);
6008 case SIR_NEGO_PROTO:
6009 /*-------------------------------------------------------
6011 ** Negotiation failed.
6012 ** Target doesn't fetch the answer message.
6014 **-------------------------------------------------------
6017 if (DEBUG_FLAGS & DEBUG_NEGO) {
6018 PRINT_ADDR(cp->ccb);
6019 printf ("negotiation failed sir=%x status=%x.\n",
6020 num, cp->nego_status);
6024 ** any error in negotiation:
6025 ** fall back to default mode.
6027 switch (cp->nego_status) {
6030 ncr_setsync (np, cp, 0, 0xe0, 0);
6034 ncr_setwide (np, cp, 0, 0);
6038 np->msgin [0] = MSG_NOOP;
6039 np->msgout[0] = MSG_NOOP;
6040 cp->nego_status = 0;
6041 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6046 ** Synchronous request message received.
6049 if (DEBUG_FLAGS & DEBUG_NEGO) {
6050 PRINT_ADDR(cp->ccb);
6051 printf ("sync msgin: ");
6052 (void) ncr_show_msg (np->msgin);
6057 ** get requested values.
6063 if (ofs==0) per=255;
6066 ** check values against driver limits.
6068 if (per < np->minsync)
6069 {chg = 1; per = np->minsync;}
6070 if (per < tp->tinfo.user.period)
6071 {chg = 1; per = tp->tinfo.user.period;}
6072 if (ofs > tp->tinfo.user.offset)
6073 {chg = 1; ofs = tp->tinfo.user.offset;}
6076 ** Check against controller limits.
6082 ncr_getsync(np, per, &fak, &scntl3);
6094 if (DEBUG_FLAGS & DEBUG_NEGO) {
6095 PRINT_ADDR(cp->ccb);
6096 printf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n",
6097 per, scntl3, ofs, fak, chg);
6100 if (INB (HS_PRT) == HS_NEGOTIATE) {
6101 OUTB (HS_PRT, HS_BUSY);
6102 switch (cp->nego_status) {
6106 ** This was an answer message
6110 ** Answer wasn't acceptable.
6112 ncr_setsync (np, cp, 0, 0xe0, 0);
6113 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6118 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6119 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6124 ncr_setwide (np, cp, 0, 0);
6130 ** It was a request. Set value and
6131 ** prepare an answer message
6134 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6136 np->msgout[0] = MSG_EXTENDED;
6138 np->msgout[2] = MSG_EXT_SDTR;
6139 np->msgout[3] = per;
6140 np->msgout[4] = ofs;
6142 cp->nego_status = NS_SYNC;
6144 if (DEBUG_FLAGS & DEBUG_NEGO) {
6145 PRINT_ADDR(cp->ccb);
6146 printf ("sync msgout: ");
6147 (void) ncr_show_msg (np->msgout);
6152 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6155 np->msgin [0] = MSG_NOOP;
6161 ** Wide request message received.
6163 if (DEBUG_FLAGS & DEBUG_NEGO) {
6164 PRINT_ADDR(cp->ccb);
6165 printf ("wide msgin: ");
6166 (void) ncr_show_msg (np->msgin);
6171 ** get requested values.
6175 wide = np->msgin[3];
6178 ** check values against driver limits.
6181 if (wide > tp->tinfo.user.width)
6182 {chg = 1; wide = tp->tinfo.user.width;}
6184 if (DEBUG_FLAGS & DEBUG_NEGO) {
6185 PRINT_ADDR(cp->ccb);
6186 printf ("wide: wide=%d chg=%d.\n", wide, chg);
6189 if (INB (HS_PRT) == HS_NEGOTIATE) {
6190 OUTB (HS_PRT, HS_BUSY);
6191 switch (cp->nego_status) {
6195 ** This was an answer message
6199 ** Answer wasn't acceptable.
6201 ncr_setwide (np, cp, 0, 1);
6202 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6207 ncr_setwide (np, cp, wide, 1);
6208 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6213 ncr_setsync (np, cp, 0, 0xe0, 0);
6219 ** It was a request, set value and
6220 ** prepare an answer message
6223 ncr_setwide (np, cp, wide, 1);
6225 np->msgout[0] = MSG_EXTENDED;
6227 np->msgout[2] = MSG_EXT_WDTR;
6228 np->msgout[3] = wide;
6230 np->msgin [0] = MSG_NOOP;
6232 cp->nego_status = NS_WIDE;
6234 if (DEBUG_FLAGS & DEBUG_NEGO) {
6235 PRINT_ADDR(cp->ccb);
6236 printf ("wide msgout: ");
6237 (void) ncr_show_msg (np->msgout);
6242 /*--------------------------------------------------------------------
6244 ** Processing of special messages
6246 **--------------------------------------------------------------------
6249 case SIR_REJECT_RECEIVED:
6250 /*-----------------------------------------------
6252 ** We received a MSG_MESSAGE_REJECT message.
6254 **-----------------------------------------------
6257 PRINT_ADDR(cp->ccb);
6258 printf ("MSG_MESSAGE_REJECT received (%x:%x).\n",
6259 (unsigned)np->lastmsg, np->msgout[0]);
6262 case SIR_REJECT_SENT:
6263 /*-----------------------------------------------
6265 ** We received an unknown message
6267 **-----------------------------------------------
6270 PRINT_ADDR(cp->ccb);
6271 printf ("MSG_MESSAGE_REJECT sent for ");
6272 (void) ncr_show_msg (np->msgin);
6276 /*--------------------------------------------------------------------
6278 ** Processing of special messages
6280 **--------------------------------------------------------------------
6283 case SIR_IGN_RESIDUE:
6284 /*-----------------------------------------------
6286 ** We received an IGNORE RESIDUE message,
6287 ** which couldn't be handled by the script.
6289 **-----------------------------------------------
6292 PRINT_ADDR(cp->ccb);
6293 printf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n");
6296 case SIR_MISSING_SAVE:
6297 /*-----------------------------------------------
6299 ** We received an DISCONNECT message,
6300 ** but the datapointer wasn't saved before.
6302 **-----------------------------------------------
6305 PRINT_ADDR(cp->ccb);
6306 printf ("MSG_DISCONNECT received, but datapointer not saved:\n"
6307 "\tdata=%x save=%x goal=%x.\n",
6308 (unsigned) INL (nc_temp),
6309 (unsigned) np->header.savep,
6310 (unsigned) np->header.goalp);
6313 /*--------------------------------------------------------------------
6315 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status.
6317 ** XXX JGibbs - We should do the same thing for BUSY status.
6319 ** The current command has been rejected,
6320 ** because there are too many in the command queue.
6321 ** We have started too many commands for that target.
6323 **--------------------------------------------------------------------
6325 case SIR_STALL_QUEUE:
6326 cp->xerr_status = XE_OK;
6327 cp->host_status = HS_COMPLETE;
6328 cp->s_status = SCSI_STATUS_QUEUE_FULL;
6329 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6330 ncr_complete(np, cp);
6334 case SIR_STALL_RESTART:
6335 /*-----------------------------------------------
6337 ** Enable selecting again,
6338 ** if NO disconnected jobs.
6340 **-----------------------------------------------
6343 ** Look for a disconnected job.
6346 while (cp && cp->host_status != HS_DISCONNECT)
6350 ** if there is one, ...
6354 ** wait for reselection
6356 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6361 ** else remove the interrupt.
6364 printf ("%s: queue empty.\n", ncr_name (np));
6365 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0));
6370 OUTB (nc_dcntl, np->rv_dcntl | STD);
6373 /*==========================================================
6376 ** Aquire a control block
6379 **==========================================================
6382 static nccb_p ncr_get_nccb
6383 (ncb_p np, u_long target, u_long lun)
6389 /* Keep our timeout handler out */
6393 ** Lun structure available ?
6396 lp = np->target[target].lp[lun];
6401 ** Look for free CCB
6404 while (cp && cp->magic) {
6410 ** if nothing available, create one.
6414 cp = ncr_alloc_nccb(np, target, lun);
6418 printf("%s: Bogus free cp found\n", ncr_name(np));
6428 /*==========================================================
6431 ** Release one control block
6434 **==========================================================
6437 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6443 assert (cp != NULL);
6445 cp -> host_status = HS_IDLE;
6449 /*==========================================================
6452 ** Allocation of resources for Targets/Luns/Tags.
6455 **==========================================================
6459 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6465 assert (np != NULL);
6467 if (target>=MAX_TARGET) return(NULL);
6468 if (lun >=MAX_LUN ) return(NULL);
6470 tp=&np->target[target];
6472 if (!tp->jump_tcb.l_cmd) {
6477 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target)));
6478 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6481 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6482 tp->getscr[1] = vtophys (&tp->tinfo.sval);
6483 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6485 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6486 tp->getscr[4] = vtophys (&tp->tinfo.wval);
6487 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6489 assert (((offsetof(struct ncr_reg, nc_sxfer) ^
6490 (offsetof(struct tcb ,tinfo)
6491 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0);
6492 assert (((offsetof(struct ncr_reg, nc_scntl3) ^
6493 (offsetof(struct tcb, tinfo)
6494 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0);
6496 tp->call_lun.l_cmd = (SCR_CALL);
6497 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6499 tp->jump_lcb.l_cmd = (SCR_JUMP);
6500 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6501 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6505 ** Logic unit control block
6512 lp = (lcb_p) malloc (sizeof (struct lcb), M_DEVBUF,
6514 if (!lp) return(NULL);
6519 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun)));
6520 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr;
6522 lp->call_tag.l_cmd = (SCR_CALL);
6523 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6525 lp->jump_nccb.l_cmd = (SCR_JUMP);
6526 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6531 ** Chain into LUN list
6533 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb);
6541 cp = (nccb_p) malloc (sizeof (struct nccb), M_DEVBUF, M_NOWAIT|M_ZERO);
6546 if (DEBUG_FLAGS & DEBUG_ALLOC) {
6547 printf ("new nccb @%p.\n", cp);
6551 ** Fill in physical addresses
6554 cp->p_nccb = vtophys (cp);
6557 ** Chain into reselect list
6559 cp->jump_nccb.l_cmd = SCR_JUMP;
6560 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr;
6561 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb);
6562 cp->call_tmp.l_cmd = SCR_CALL;
6563 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6566 ** Chain into wakeup list
6568 cp->link_nccb = np->link_nccb;
6572 ** Chain into CCB list
6574 cp->next_nccb = lp->next_nccb;
6580 /*==========================================================
6583 ** Build Scatter Gather Block
6586 **==========================================================
6588 ** The transfer area may be scattered among
6589 ** several non adjacent physical pages.
6591 ** We may use MAX_SCATTER blocks.
6593 **----------------------------------------------------------
6596 static int ncr_scatter
6597 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen)
6599 u_long paddr, pnext;
6601 u_short segment = 0;
6602 u_long segsize, segaddr;
6603 u_long size, csize = 0;
6604 u_long chunk = MAX_SIZE;
6607 bzero (&phys->data, sizeof (phys->data));
6608 if (!datalen) return (0);
6610 paddr = vtophys (vaddr);
6613 ** insert extra break points at a distance of chunk.
6614 ** We try to reduce the number of interrupts caused
6615 ** by unexpected phase changes due to disconnects.
6616 ** A typical harddisk may disconnect before ANY block.
6617 ** If we wanted to avoid unexpected phase changes at all
6618 ** we had to use a break point every 512 bytes.
6619 ** Of course the number of scatter/gather blocks is
6623 free = MAX_SCATTER - 1;
6625 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE;
6628 while ((chunk * free >= 2 * datalen) && (chunk>=1024))
6631 if(DEBUG_FLAGS & DEBUG_SCATTER)
6632 printf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n",
6633 (void *) vaddr, (unsigned) datalen, (unsigned) chunk);
6636 ** Build data descriptors.
6638 while (datalen && (segment < MAX_SCATTER)) {
6641 ** this segment is empty
6647 if (!csize) csize = chunk;
6649 while ((datalen) && (paddr == pnext) && (csize)) {
6652 ** continue this segment
6654 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE;
6660 size = pnext - paddr; /* page size */
6661 if (size > datalen) size = datalen; /* data size */
6662 if (size > csize ) size = csize ; /* chunksize */
6668 paddr = vtophys (vaddr);
6671 if(DEBUG_FLAGS & DEBUG_SCATTER)
6672 printf ("\tseg #%d addr=%x size=%d (rest=%d).\n",
6676 (unsigned) datalen);
6678 phys->data[segment].addr = segaddr;
6679 phys->data[segment].size = segsize;
6684 printf("ncr?: scatter/gather failed (residue=%d).\n",
6685 (unsigned) datalen);
6692 /*==========================================================
6695 ** Test the pci bus snoop logic :-(
6697 ** Has to be called with interrupts disabled.
6700 **==========================================================
6703 #ifndef NCR_IOMAPPED
6704 static int ncr_regtest (struct ncb* np)
6706 register volatile u_int32_t data;
6708 ** ncr registers may NOT be cached.
6709 ** write 0xffffffff to a read only register area,
6710 ** and try to read it back.
6713 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data);
6714 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat));
6716 if (data == 0xffffffff) {
6718 if ((data & 0xe2f0fffd) != 0x02000080) {
6720 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6728 static int ncr_snooptest (struct ncb* np)
6730 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc;
6732 #ifndef NCR_IOMAPPED
6733 err |= ncr_regtest (np);
6734 if (err) return (err);
6739 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6743 ** Set memory and register.
6745 ncr_cache = host_wr;
6746 OUTL (nc_temp, ncr_wr);
6748 ** Start script (exchange values)
6752 ** Wait 'til done (with timeout)
6754 for (i=0; i<NCR_SNOOP_TIMEOUT; i++)
6755 if (INB(nc_istat) & (INTF|SIP|DIP))
6758 ** Save termination position.
6762 ** Read memory and register.
6764 host_rd = ncr_cache;
6765 ncr_rd = INL (nc_scratcha);
6766 ncr_bk = INL (nc_temp);
6770 OUTB (nc_istat, SRST);
6772 OUTB (nc_istat, 0 );
6774 ** check for timeout
6776 if (i>=NCR_SNOOP_TIMEOUT) {
6777 printf ("CACHE TEST FAILED: timeout.\n");
6781 ** Check termination position.
6783 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6784 printf ("CACHE TEST FAILED: script execution failed.\n");
6785 printf ("start=%08lx, pc=%08lx, end=%08lx\n",
6786 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6787 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6793 if (host_wr != ncr_rd) {
6794 printf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n",
6795 (int) host_wr, (int) ncr_rd);
6798 if (host_rd != ncr_wr) {
6799 printf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n",
6800 (int) ncr_wr, (int) host_rd);
6803 if (ncr_bk != ncr_wr) {
6804 printf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n",
6805 (int) ncr_wr, (int) ncr_bk);
6811 /*==========================================================
6814 ** Profiling the drivers and targets performance.
6817 **==========================================================
6821 ** Compute the difference in milliseconds.
6824 static int ncr_delta (int *from, int *to)
6826 if (!from) return (-1);
6827 if (!to) return (-2);
6828 return ((to - from) * 1000 / hz);
6831 #define PROFILE cp->phys.header.stamp
6832 static void ncb_profile (ncb_p np, nccb_p cp)
6834 int co, da, st, en, di, se, post,work,disc;
6837 PROFILE.end = ticks;
6839 st = ncr_delta (&PROFILE.start,&PROFILE.status);
6840 if (st<0) return; /* status not reached */
6842 da = ncr_delta (&PROFILE.start,&PROFILE.data);
6843 if (da<0) return; /* No data transfer phase */
6845 co = ncr_delta (&PROFILE.start,&PROFILE.command);
6846 if (co<0) return; /* command not executed */
6848 en = ncr_delta (&PROFILE.start,&PROFILE.end),
6849 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect),
6850 se = ncr_delta (&PROFILE.start,&PROFILE.select);
6854 ** @PROFILE@ Disconnect time invalid if multiple disconnects
6857 if (di>=0) disc = se-di; else disc = 0;
6859 work = (st - co) - disc;
6861 diff = (np->disc_phys - np->disc_ref) & 0xff;
6862 np->disc_ref += diff;
6864 np->profile.num_trans += 1;
6866 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6867 np->profile.num_disc += diff;
6868 np->profile.ms_setup += co;
6869 np->profile.ms_data += work;
6870 np->profile.ms_disc += disc;
6871 np->profile.ms_post += post;
6875 /*==========================================================
6877 ** Determine the ncr's clock frequency.
6878 ** This is essential for the negotiation
6879 ** of the synchronous transfer rate.
6881 **==========================================================
6883 ** Note: we have to return the correct value.
6884 ** THERE IS NO SAVE DEFAULT VALUE.
6886 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
6887 ** 53C860 and 53C875 rev. 1 support fast20 transfers but
6888 ** do not have a clock doubler and so are provided with a
6889 ** 80 MHz clock. All other fast20 boards incorporate a doubler
6890 ** and so should be delivered with a 40 MHz clock.
6891 ** The future fast40 chips (895/895) use a 40 Mhz base clock
6892 ** and provide a clock quadrupler (160 Mhz). The code below
6893 ** tries to deal as cleverly as possible with all this stuff.
6895 **----------------------------------------------------------
6899 * Select NCR SCSI clock frequency
6901 static void ncr_selectclock(ncb_p np, u_char scntl3)
6903 if (np->multiplier < 2) {
6904 OUTB(nc_scntl3, scntl3);
6908 if (bootverbose >= 2)
6909 printf ("%s: enabling clock multiplier\n", ncr_name(np));
6911 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */
6912 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6914 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
6917 printf("%s: the chip cannot lock the frequency\n", ncr_name(np));
6918 } else /* Wait 20 micro-seconds for doubler */
6920 OUTB(nc_stest3, HSC); /* Halt the scsi clock */
6921 OUTB(nc_scntl3, scntl3);
6922 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */
6923 OUTB(nc_stest3, 0x00); /* Restart scsi clock */
6927 * calculate NCR SCSI clock frequency (in KHz)
6930 ncrgetfreq (ncb_p np, int gen)
6934 * Measure GEN timer delay in order
6935 * to calculate SCSI clock frequency
6937 * This code will never execute too
6938 * many loop iterations (if DELAY is
6939 * reasonably correct). It could get
6940 * too low a delay (too high a freq.)
6941 * if the CPU is slow executing the
6942 * loop for some reason (an NMI, for
6943 * example). For this reason we will
6944 * if multiple measurements are to be
6945 * performed trust the higher delay
6946 * (lower frequency returned).
6948 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */
6949 OUTW (nc_sien , 0); /* mask all scsi interrupts */
6950 (void) INW (nc_sist); /* clear pending scsi interrupt */
6951 OUTB (nc_dien , 0); /* mask all dma interrupts */
6952 (void) INW (nc_sist); /* another one, just to be sure :) */
6953 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */
6954 OUTB (nc_stime1, 0); /* disable general purpose timer */
6955 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */
6956 while (!(INW(nc_sist) & GEN) && ms++ < 1000)
6957 DELAY(1000); /* count ms */
6958 OUTB (nc_stime1, 0); /* disable general purpose timer */
6959 OUTB (nc_scntl3, 0);
6961 * Set prescaler to divide by whatever "0" means.
6962 * "0" ought to choose divide by 2, but appears
6963 * to set divide by 3.5 mode in my 53c810 ...
6965 OUTB (nc_scntl3, 0);
6967 if (bootverbose >= 2)
6968 printf ("\tDelay (GEN=%d): %u msec\n", gen, ms);
6970 * adjust for prescaler, and convert into KHz
6972 return ms ? ((1 << gen) * 4440) / ms : 0;
6975 static void ncr_getclock (ncb_p np, u_char multiplier)
6977 unsigned char scntl3;
6978 unsigned char stest1;
6979 scntl3 = INB(nc_scntl3);
6980 stest1 = INB(nc_stest1);
6984 if (multiplier > 1) {
6985 np->multiplier = multiplier;
6986 np->clock_khz = 40000 * multiplier;
6988 if ((scntl3 & 7) == 0) {
6990 /* throw away first result */
6991 (void) ncrgetfreq (np, 11);
6992 f1 = ncrgetfreq (np, 11);
6993 f2 = ncrgetfreq (np, 11);
6995 if (bootverbose >= 2)
6996 printf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2);
6997 if (f1 > f2) f1 = f2; /* trust lower result */
6999 scntl3 = 5; /* >45Mhz: assume 80MHz */
7001 scntl3 = 3; /* <45Mhz: assume 40MHz */
7004 else if ((scntl3 & 7) == 5)
7005 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7009 /*=========================================================================*/
7011 #ifdef NCR_TEKRAM_EEPROM
7013 struct tekram_eeprom_dev {
7015 #define TKR_PARCHK 0x01
7016 #define TKR_TRYSYNC 0x02
7017 #define TKR_ENDISC 0x04
7018 #define TKR_STARTUNIT 0x08
7019 #define TKR_USETAGS 0x10
7020 #define TKR_TRYWIDE 0x20
7021 u_char syncparam; /* max. sync transfer rate (table ?) */
7027 struct tekram_eeprom {
7028 struct tekram_eeprom_dev
7032 #define TKR_ADPT_GT2DRV 0x01
7033 #define TKR_ADPT_GT1GB 0x02
7034 #define TKR_ADPT_RSTBUS 0x04
7035 #define TKR_ADPT_ACTNEG 0x08
7036 #define TKR_ADPT_NOSEEK 0x10
7037 #define TKR_ADPT_MORLUN 0x20
7038 u_char delay; /* unit ? ( table ??? ) */
7039 u_char tags; /* use 4 times as many ... */
7044 tekram_write_bit (ncb_p np, int bit)
7046 u_char val = 0x10 + ((bit & 1) << 1);
7049 OUTB (nc_gpreg, val);
7051 OUTB (nc_gpreg, val | 0x04);
7053 OUTB (nc_gpreg, val);
7058 tekram_read_bit (ncb_p np)
7060 OUTB (nc_gpreg, 0x10);
7062 OUTB (nc_gpreg, 0x14);
7064 return INB (nc_gpreg) & 1;
7068 read_tekram_eeprom_reg (ncb_p np, int reg)
7072 int cmd = 0x80 | reg;
7074 OUTB (nc_gpreg, 0x10);
7076 tekram_write_bit (np, 1);
7077 for (bit = 7; bit >= 0; bit--)
7079 tekram_write_bit (np, cmd >> bit);
7082 for (bit = 0; bit < 16; bit++)
7085 result |= tekram_read_bit (np);
7088 OUTB (nc_gpreg, 0x00);
7093 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7095 u_short *p = (u_short *) buffer;
7099 if (INB (nc_gpcntl) != 0x09)
7103 for (i = 0; i < 64; i++)
7106 if((i&0x0f) == 0) printf ("%02x:", i*2);
7107 val = read_tekram_eeprom_reg (np, i);
7111 if((i&0x01) == 0x00) printf (" ");
7112 printf ("%02x%02x", val & 0xff, (val >> 8) & 0xff);
7113 if((i&0x0f) == 0x0f) printf ("\n");
7115 printf ("Sum = %04x\n", sum);
7116 return sum == 0x1234;
7118 #endif /* NCR_TEKRAM_EEPROM */
7120 static device_method_t ncr_methods[] = {
7121 /* Device interface */
7122 DEVMETHOD(device_probe, ncr_probe),
7123 DEVMETHOD(device_attach, ncr_attach),
7128 static driver_t ncr_driver = {
7134 static devclass_t ncr_devclass;
7136 DRIVER_MODULE(ncr, pci, ncr_driver, ncr_devclass, 0, 0);
7137 MODULE_DEPEND(ncr, pci, 1, 1, 1);
7139 /*=========================================================================*/
7140 #endif /* _KERNEL */