2 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
3 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by TooLs GmbH.
17 * 4. The name of TooLs GmbH may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 * Copyright (C) 2001 Benno Rice
33 * All rights reserved.
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
44 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
45 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
46 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
47 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
49 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
50 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
51 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
52 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
53 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
57 #include <sys/cdefs.h>
58 __FBSDID("$FreeBSD$");
60 #include "opt_compat.h"
62 #include "opt_kstack_pages.h"
63 #include "opt_platform.h"
65 #include <sys/param.h>
67 #include <sys/systm.h>
73 #include <sys/eventhandler.h>
75 #include <sys/imgact.h>
77 #include <sys/kernel.h>
79 #include <sys/linker.h>
81 #include <sys/malloc.h>
83 #include <sys/msgbuf.h>
84 #include <sys/mutex.h>
85 #include <sys/ptrace.h>
86 #include <sys/reboot.h>
87 #include <sys/signalvar.h>
88 #include <sys/syscallsubr.h>
89 #include <sys/sysctl.h>
90 #include <sys/sysent.h>
91 #include <sys/sysproto.h>
92 #include <sys/ucontext.h>
94 #include <sys/vmmeter.h>
95 #include <sys/vnode.h>
97 #include <net/netisr.h>
100 #include <vm/vm_extern.h>
101 #include <vm/vm_kern.h>
102 #include <vm/vm_page.h>
103 #include <vm/vm_map.h>
104 #include <vm/vm_object.h>
105 #include <vm/vm_pager.h>
107 #include <machine/altivec.h>
108 #ifndef __powerpc64__
109 #include <machine/bat.h>
111 #include <machine/cpu.h>
112 #include <machine/elf.h>
113 #include <machine/fpu.h>
114 #include <machine/hid.h>
115 #include <machine/kdb.h>
116 #include <machine/md_var.h>
117 #include <machine/metadata.h>
118 #include <machine/mmuvar.h>
119 #include <machine/pcb.h>
120 #include <machine/reg.h>
121 #include <machine/sigframe.h>
122 #include <machine/spr.h>
123 #include <machine/trap.h>
124 #include <machine/vmparam.h>
128 #include <dev/ofw/openfirm.h>
131 extern vm_offset_t ksym_start, ksym_end;
137 int cacheline_size = 128;
139 int cacheline_size = 32;
141 int hw_direct_map = 1;
143 struct pcpu __pcpu[MAXCPU];
145 static struct trapframe frame0;
147 char machine[] = "powerpc";
148 SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD, machine, 0, "");
150 static void cpu_startup(void *);
151 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
153 SYSCTL_INT(_machdep, CPU_CACHELINE, cacheline_size,
154 CTLFLAG_RD, &cacheline_size, 0, "");
156 uintptr_t powerpc_init(vm_offset_t, vm_offset_t, vm_offset_t, void *);
158 int setfault(faultbuf); /* defined in locore.S */
163 #ifndef __powerpc64__
164 struct bat battable[16];
167 struct kva_md_info kmi;
170 cpu_startup(void *dummy)
174 * Initialise the decrementer-based clock.
179 * Good {morning,afternoon,evening,night}.
181 cpu_setup(PCPU_GET(cpuid));
186 printf("real memory = %ld (%ld MB)\n", ptoa(physmem),
187 ptoa(physmem) / 1048576);
191 printf("available KVA = %zd (%zd MB)\n",
192 virtual_end - virtual_avail,
193 (virtual_end - virtual_avail) / 1048576);
196 * Display any holes after the first chunk of extended memory.
201 printf("Physical memory chunk(s):\n");
202 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
204 phys_avail[indx + 1] - phys_avail[indx];
207 printf("0x%016lx - 0x%016lx, %ld bytes (%ld pages)\n",
209 printf("0x%08x - 0x%08x, %d bytes (%ld pages)\n",
211 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
216 vm_ksubmap_init(&kmi);
218 printf("avail memory = %ld (%ld MB)\n", ptoa(cnt.v_free_count),
219 ptoa(cnt.v_free_count) / 1048576);
222 * Set up buffers, so they can be used to read disk labels.
225 vm_pager_bufferinit();
228 extern char kernel_text[], _end[];
230 #ifndef __powerpc64__
231 /* Bits for running on 64-bit systems in 32-bit mode. */
232 extern void *testppc64, *testppc64size;
233 extern void *restorebridge, *restorebridgesize;
234 extern void *rfid_patch, *rfi_patch1, *rfi_patch2;
235 extern void *trapcode64;
239 extern void *rstcode, *rstsize;
241 extern void *trapcode, *trapsize;
242 extern void *slbtrap, *slbtrapsize;
243 extern void *alitrap, *alisize;
244 extern void *dsitrap, *dsisize;
245 extern void *decrint, *decrsize;
246 extern void *extint, *extsize;
247 extern void *dblow, *dbsize;
248 extern void *imisstrap, *imisssize;
249 extern void *dlmisstrap, *dlmisssize;
250 extern void *dsmisstrap, *dsmisssize;
253 powerpc_init(vm_offset_t startkernel, vm_offset_t endkernel,
254 vm_offset_t basekernel, void *mdp)
261 register_t msr, scratch, vers;
262 uint8_t *cache_check;
264 #ifndef __powerpc64__
274 * The Wii loader doesn't pass us any environment so, mdp
275 * points to garbage at this point. The Wii CPU is a 750CL.
278 if ((vers & 0xfffff0e0) == (MPC750 << 16 | MPC750CL))
283 * Parse metadata if present and fetch parameters. Must be done
284 * before console is inited so cninit gets the right value of
288 preload_metadata = mdp;
289 kmdp = preload_search_by_type("elf kernel");
291 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
292 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
293 endkernel = ulmax(endkernel, MD_FETCH(kmdp,
294 MODINFOMD_KERNEND, vm_offset_t));
296 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
297 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
303 * Init params/tunables that can be overridden by the loader
308 * Start initializing proc0 and thread0.
310 proc_linkup0(&proc0, &thread0);
311 thread0.td_frame = &frame0;
314 * Set up per-cpu data.
317 pcpu_init(pc, 0, sizeof(struct pcpu));
318 pc->pc_curthread = &thread0;
320 __asm __volatile("mr 13,%0" :: "r"(pc->pc_curthread));
322 __asm __volatile("mr 2,%0" :: "r"(pc->pc_curthread));
326 __asm __volatile("mtsprg 0, %0" :: "r"(pc));
329 * Init mutexes, which we use heavily in PMAP
335 * Install the OF client interface
341 * Initialize the console before printing anything.
346 * Complain if there is no metadata.
348 if (mdp == NULL || kmdp == NULL) {
349 printf("powerpc_init: no loader metadata.\n");
358 /* Various very early CPU fix ups */
359 switch (mfpvr() >> 16) {
361 * PowerPC 970 CPUs have a misfeature requested by Apple that
362 * makes them pretend they have a 32-byte cacheline. Turn this
363 * off before we measure the cacheline size.
369 scratch = mfspr(SPR_HID5);
370 scratch &= ~HID5_970_DCBZ_SIZE_HI;
371 mtspr(SPR_HID5, scratch);
375 /* XXX: get from ibm,slb-size in device tree */
382 * Initialize the interrupt tables and figure out our cache line
383 * size and whether or not we need the 64-bit bridge code.
387 * Disable translation in case the vector area hasn't been
388 * mapped (G5). Note that no OFW calls can be made until
389 * translation is re-enabled.
393 mtmsr((msr & ~(PSL_IR | PSL_DR)) | PSL_RI);
396 * Measure the cacheline size using dcbz
398 * Use EXC_PGM as a playground. We are about to overwrite it
399 * anyway, we know it exists, and we know it is cache-aligned.
402 cache_check = (void *)EXC_PGM;
404 for (cacheline_size = 0; cacheline_size < 0x100; cacheline_size++)
405 cache_check[cacheline_size] = 0xff;
407 __asm __volatile("dcbz 0,%0":: "r" (cache_check) : "memory");
409 /* Find the first byte dcbz did not zero to get the cache line size */
410 for (cacheline_size = 0; cacheline_size < 0x100 &&
411 cache_check[cacheline_size] == 0; cacheline_size++);
413 /* Work around psim bug */
414 if (cacheline_size == 0) {
419 /* Make sure the kernel icache is valid before we go too much further */
420 __syncicache((caddr_t)startkernel, endkernel - startkernel);
422 #ifndef __powerpc64__
424 * Figure out whether we need to use the 64 bit PMAP. This works by
425 * executing an instruction that is only legal on 64-bit PPC (mtmsrd),
426 * and setting ppc64 = 0 if that causes a trap.
431 bcopy(&testppc64, (void *)EXC_PGM, (size_t)&testppc64size);
432 __syncicache((void *)EXC_PGM, (size_t)&testppc64size);
440 : "=r"(scratch), "=r"(ppc64));
443 cpu_features |= PPC_FEATURE_64;
446 * Now copy restorebridge into all the handlers, if necessary,
447 * and set up the trap tables.
450 if (cpu_features & PPC_FEATURE_64) {
451 /* Patch the two instances of rfi -> rfid */
452 bcopy(&rfid_patch,&rfi_patch1,4);
454 /* rfi_patch2 is at the end of dbleave */
455 bcopy(&rfid_patch,&rfi_patch2,4);
459 * Copy a code snippet to restore 32-bit bridge mode
460 * to the top of every non-generic trap handler
463 trap_offset += (size_t)&restorebridgesize;
464 bcopy(&restorebridge, (void *)EXC_RST, trap_offset);
465 bcopy(&restorebridge, (void *)EXC_DSI, trap_offset);
466 bcopy(&restorebridge, (void *)EXC_ALI, trap_offset);
467 bcopy(&restorebridge, (void *)EXC_PGM, trap_offset);
468 bcopy(&restorebridge, (void *)EXC_MCHK, trap_offset);
469 bcopy(&restorebridge, (void *)EXC_TRC, trap_offset);
470 bcopy(&restorebridge, (void *)EXC_BPT, trap_offset);
473 * Set the common trap entry point to the one that
474 * knows to restore 32-bit operation on execution.
477 generictrap = &trapcode64;
479 generictrap = &trapcode;
482 #else /* powerpc64 */
483 cpu_features |= PPC_FEATURE_64;
484 generictrap = &trapcode;
488 bcopy(&rstcode, (void *)(EXC_RST + trap_offset), (size_t)&rstsize);
490 bcopy(generictrap, (void *)EXC_RST, (size_t)&trapsize);
494 bcopy(&dblow, (void *)(EXC_MCHK + trap_offset), (size_t)&dbsize);
495 bcopy(&dblow, (void *)(EXC_PGM + trap_offset), (size_t)&dbsize);
496 bcopy(&dblow, (void *)(EXC_TRC + trap_offset), (size_t)&dbsize);
497 bcopy(&dblow, (void *)(EXC_BPT + trap_offset), (size_t)&dbsize);
499 bcopy(generictrap, (void *)EXC_MCHK, (size_t)&trapsize);
500 bcopy(generictrap, (void *)EXC_PGM, (size_t)&trapsize);
501 bcopy(generictrap, (void *)EXC_TRC, (size_t)&trapsize);
502 bcopy(generictrap, (void *)EXC_BPT, (size_t)&trapsize);
504 bcopy(&alitrap, (void *)(EXC_ALI + trap_offset), (size_t)&alisize);
505 bcopy(&dsitrap, (void *)(EXC_DSI + trap_offset), (size_t)&dsisize);
506 bcopy(generictrap, (void *)EXC_ISI, (size_t)&trapsize);
508 bcopy(&slbtrap, (void *)EXC_DSE, (size_t)&slbtrapsize);
509 bcopy(&slbtrap, (void *)EXC_ISE, (size_t)&slbtrapsize);
511 bcopy(generictrap, (void *)EXC_EXI, (size_t)&trapsize);
512 bcopy(generictrap, (void *)EXC_FPU, (size_t)&trapsize);
513 bcopy(generictrap, (void *)EXC_DECR, (size_t)&trapsize);
514 bcopy(generictrap, (void *)EXC_SC, (size_t)&trapsize);
515 bcopy(generictrap, (void *)EXC_FPA, (size_t)&trapsize);
516 bcopy(generictrap, (void *)EXC_VEC, (size_t)&trapsize);
517 bcopy(generictrap, (void *)EXC_PERF, (size_t)&trapsize);
518 bcopy(generictrap, (void *)EXC_VECAST_G4, (size_t)&trapsize);
519 bcopy(generictrap, (void *)EXC_VECAST_G5, (size_t)&trapsize);
520 #ifndef __powerpc64__
521 /* G2-specific TLB miss helper handlers */
522 bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize);
523 bcopy(&dlmisstrap, (void *)EXC_DLMISS, (size_t)&dlmisssize);
524 bcopy(&dsmisstrap, (void *)EXC_DSMISS, (size_t)&dsmisssize);
526 __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD);
533 /* Warn if cachline size was not determined */
534 if (cacheline_warn == 1) {
535 printf("WARNING: cacheline size undetermined, setting to 32\n");
539 * Choose a platform module so we can get the physical memory map.
542 platform_probe_and_attach();
545 * Initialise virtual memory. Use BUS_PROBE_GENERIC priority
546 * in case the platform module had a better idea of what we
549 if (cpu_features & PPC_FEATURE_64)
550 pmap_mmu_install(MMU_TYPE_G5, BUS_PROBE_GENERIC);
552 pmap_mmu_install(MMU_TYPE_OEA, BUS_PROBE_GENERIC);
554 pmap_bootstrap(startkernel, endkernel);
555 mtmsr(PSL_KERNSET & ~PSL_EE);
558 * Initialize params/tunables that are derived from memsize
560 init_param2(physmem);
563 * Grab booted kernel's name
565 env = getenv("kernelname");
567 strlcpy(kernelname, env, sizeof(kernelname));
572 * Finish setting up thread0.
574 thread0.td_pcb = (struct pcb *)
575 ((thread0.td_kstack + thread0.td_kstack_pages * PAGE_SIZE -
576 sizeof(struct pcb)) & ~15UL);
577 bzero((void *)thread0.td_pcb, sizeof(struct pcb));
578 pc->pc_curpcb = thread0.td_pcb;
580 /* Initialise the message buffer. */
581 msgbufinit(msgbufp, msgbufsize);
584 if (boothowto & RB_KDB)
585 kdb_enter(KDB_WHY_BOOTFLAGS,
586 "Boot flags requested debugger");
589 return (((uintptr_t)thread0.td_pcb -
590 (sizeof(struct callframe) - 3*sizeof(register_t))) & ~15UL);
594 bzero(void *buf, size_t len)
600 while (((vm_offset_t) p & (sizeof(u_long) - 1)) && len) {
605 while (len >= sizeof(u_long) * 8) {
607 *((u_long*) p + 1) = 0;
608 *((u_long*) p + 2) = 0;
609 *((u_long*) p + 3) = 0;
610 len -= sizeof(u_long) * 8;
611 *((u_long*) p + 4) = 0;
612 *((u_long*) p + 5) = 0;
613 *((u_long*) p + 6) = 0;
614 *((u_long*) p + 7) = 0;
615 p += sizeof(u_long) * 8;
618 while (len >= sizeof(u_long)) {
620 len -= sizeof(u_long);
636 * Flush the D-cache for non-DMA I/O so that the I-cache can
637 * be made coherent later.
640 cpu_flush_dcache(void *ptr, size_t len)
650 cpu_initclocks_bsp();
654 * Shutdown the CPU as much as possible.
664 ptrace_set_pc(struct thread *td, unsigned long addr)
666 struct trapframe *tf;
669 tf->srr0 = (register_t)addr;
675 ptrace_single_step(struct thread *td)
677 struct trapframe *tf;
686 ptrace_clear_single_step(struct thread *td)
688 struct trapframe *tf;
697 kdb_cpu_clear_singlestep(void)
700 kdb_frame->srr1 &= ~PSL_SE;
704 kdb_cpu_set_singlestep(void)
707 kdb_frame->srr1 |= PSL_SE;
711 * Initialise a struct pcpu.
714 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
717 /* Copy the SLB contents from the current CPU */
718 memcpy(pcpu->pc_slb, PCPU_GET(slb), sizeof(pcpu->pc_slb));
729 if (td->td_md.md_spinlock_count == 0) {
730 msr = intr_disable();
731 td->td_md.md_spinlock_count = 1;
732 td->td_md.md_saved_msr = msr;
734 td->td_md.md_spinlock_count++;
746 msr = td->td_md.md_saved_msr;
747 td->td_md.md_spinlock_count--;
748 if (td->td_md.md_spinlock_count == 0)
752 int db_trap_glue(struct trapframe *); /* Called from trap_subr.S */
755 db_trap_glue(struct trapframe *frame)
757 if (!(frame->srr1 & PSL_PR)
758 && (frame->exc == EXC_TRC || frame->exc == EXC_RUNMODETRC
759 || (frame->exc == EXC_PGM
760 && (frame->srr1 & 0x20000))
761 || frame->exc == EXC_BPT
762 || frame->exc == EXC_DSI)) {
763 int type = frame->exc;
764 if (type == EXC_PGM && (frame->srr1 & 0x20000)) {
767 return (kdb_trap(type, 0, frame));
773 #ifndef __powerpc64__
776 va_to_vsid(pmap_t pm, vm_offset_t va)
778 return ((pm->pm_sr[(uintptr_t)va >> ADDR_SR_SHFT]) & SR_VSID_MASK);