sys/powerpc/aim/trap_subr.S

   1 /* $FreeBSD$ */
   2 /* $NetBSD: trap_subr.S,v 1.20 2002/04/22 23:20:08 kleink Exp $ */
   3
   4 /*-
   5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
   6  * Copyright (C) 1995, 1996 TooLs GmbH.
   7  * All rights reserved.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed by TooLs GmbH.
  20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
  21  *    derived from this software without specific prior written permission.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
  24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
  32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 /*
  36  * NOTICE: This is not a standalone file.  to use it, #include it in
  37  * your port's locore.S, like so:
  38  *
  39  *      #include <powerpc/powerpc/trap_subr.S>
  40  */
  41
  42 /*
  43  * Save/restore segment registers
  44  */
  45 #define RESTORE_SRS(pmap,sr)    mtsr    0,sr; \
  46         lwz     sr,1*4(pmap);   mtsr    1,sr; \
  47         lwz     sr,2*4(pmap);   mtsr    2,sr; \
  48         lwz     sr,3*4(pmap);   mtsr    3,sr; \
  49         lwz     sr,4*4(pmap);   mtsr    4,sr; \
  50         lwz     sr,5*4(pmap);   mtsr    5,sr; \
  51         lwz     sr,6*4(pmap);   mtsr    6,sr; \
  52         lwz     sr,7*4(pmap);   mtsr    7,sr; \
  53         lwz     sr,8*4(pmap);   mtsr    8,sr; \
  54         lwz     sr,9*4(pmap);   mtsr    9,sr; \
  55         lwz     sr,10*4(pmap);  mtsr    10,sr; \
  56         lwz     sr,11*4(pmap);  mtsr    11,sr; \
  57         lwz     sr,12*4(pmap);  mtsr    12,sr; \
  58         lwz     sr,13*4(pmap);  mtsr    13,sr; \
  59         lwz     sr,14*4(pmap);  mtsr    14,sr; \
  60         lwz     sr,15*4(pmap);  mtsr    15,sr; isync;
  61
  62 /*
  63  * User SRs are loaded through a pointer to the current pmap.
  64  */
  65 #define RESTORE_USER_SRS(pmap,sr) \
  66         GET_CPUINFO(pmap); \
  67         lwz     pmap,PC_CURPMAP(pmap); \
  68         lwzu    sr,PM_SR(pmap); \
  69         RESTORE_SRS(pmap,sr)
  70
  71 /*
  72  * Kernel SRs are loaded directly from kernel_pmap_
  73  */
  74 #define RESTORE_KERN_SRS(pmap,sr) \
  75         lis     pmap,CNAME(kernel_pmap_store)@ha; \
  76         lwzu    sr,CNAME(kernel_pmap_store)+PM_SR@l(pmap); \
  77         RESTORE_SRS(pmap,sr)
  78
  79 /*
  80  * FRAME_SETUP assumes:
  81  *      SPRG1           SP (1)
  82  *      savearea        r28-r31,DAR,DSISR   (DAR & DSISR only for DSI traps)
  83  *      r28             LR
  84  *      r29             CR
  85  *      r30             scratch
  86  *      r31             scratch
  87  *      r1              kernel stack
  88  *      LR              trap type (from calling address, mask with 0xff00)
  89  *      SRR0/1          as at start of trap
  90  */
  91 #define FRAME_SETUP(savearea)                                           \
  92 /* Have to enable translation to allow access of kernel stack: */       \
  93         GET_CPUINFO(%r31);                                              \
  94         mfsrr0  %r30;                                                   \
  95         stw     %r30,(savearea+CPUSAVE_SRR0)(%r31);     /* save SRR0 */ \
  96         mfsrr1  %r30;                                                   \
  97         stw     %r30,(savearea+CPUSAVE_SRR1)(%r31);     /* save SRR1 */ \
  98         mfmsr   %r30;                                                   \
  99         ori     %r30,%r30,(PSL_DR|PSL_IR|PSL_RI)@l; /* relocation on */ \
 100         mtmsr   %r30;                   /* stack can now be accessed */ \
 101         isync;                                                          \
 102         mfsprg1 %r31;                   /* get saved SP */              \
 103         stwu    %r31,-FRAMELEN(%r1);    /* save it in the callframe */  \
 104         stw     %r0, FRAME_0+8(%r1);    /* save r0 in the trapframe */  \
 105         stw     %r31,FRAME_1+8(%r1);    /* save SP   "      "       */  \
 106         stw     %r2, FRAME_2+8(%r1);    /* save r2   "      "       */  \
 107         stw     %r28,FRAME_LR+8(%r1);   /* save LR   "      "       */  \
 108         stw     %r29,FRAME_CR+8(%r1);   /* save CR   "      "       */  \
 109         GET_CPUINFO(%r2);                                               \
 110         lwz     %r28,(savearea+CPUSAVE_R28)(%r2); /* get saved r28 */   \
 111         lwz     %r29,(savearea+CPUSAVE_R29)(%r2); /* get saved r29 */   \
 112         lwz     %r30,(savearea+CPUSAVE_R30)(%r2); /* get saved r30 */   \
 113         lwz     %r31,(savearea+CPUSAVE_R31)(%r2); /* get saved r31 */   \
 114         stw     %r3,  FRAME_3+8(%r1);   /* save r3-r31 */               \
 115         stw     %r4,  FRAME_4+8(%r1);                                   \
 116         stw     %r5,  FRAME_5+8(%r1);                                   \
 117         stw     %r6,  FRAME_6+8(%r1);                                   \
 118         stw     %r7,  FRAME_7+8(%r1);                                   \
 119         stw     %r8,  FRAME_8+8(%r1);                                   \
 120         stw     %r9,  FRAME_9+8(%r1);                                   \
 121         stw     %r10, FRAME_10+8(%r1);                                  \
 122         stw     %r11, FRAME_11+8(%r1);                                  \
 123         stw     %r12, FRAME_12+8(%r1);                                  \
 124         stw     %r13, FRAME_13+8(%r1);                                  \
 125         stw     %r14, FRAME_14+8(%r1);                                  \
 126         stw     %r15, FRAME_15+8(%r1);                                  \
 127         stw     %r16, FRAME_16+8(%r1);                                  \
 128         stw     %r17, FRAME_17+8(%r1);                                  \
 129         stw     %r18, FRAME_18+8(%r1);                                  \
 130         stw     %r19, FRAME_19+8(%r1);                                  \
 131         stw     %r20, FRAME_20+8(%r1);                                  \
 132         stw     %r21, FRAME_21+8(%r1);                                  \
 133         stw     %r22, FRAME_22+8(%r1);                                  \
 134         stw     %r23, FRAME_23+8(%r1);                                  \
 135         stw     %r24, FRAME_24+8(%r1);                                  \
 136         stw     %r25, FRAME_25+8(%r1);                                  \
 137         stw     %r26, FRAME_26+8(%r1);                                  \
 138         stw     %r27, FRAME_27+8(%r1);                                  \
 139         stw     %r28, FRAME_28+8(%r1);                                  \
 140         stw     %r29, FRAME_29+8(%r1);                                  \
 141         stw     %r30, FRAME_30+8(%r1);                                  \
 142         stw     %r31, FRAME_31+8(%r1);                                  \
 143         lwz     %r28,(savearea+CPUSAVE_DAR)(%r2);  /* saved DAR */      \
 144         lwz     %r29,(savearea+CPUSAVE_DSISR)(%r2);/* saved DSISR */    \
 145         lwz     %r30,(savearea+CPUSAVE_SRR0)(%r2); /* saved SRR0 */     \
 146         lwz     %r31,(savearea+CPUSAVE_SRR1)(%r2); /* saved SRR1 */     \
 147         mfxer   %r3;                                                    \
 148         mfctr   %r4;                                                    \
 149         mflr    %r5;                                                    \
 150         andi.   %r5,%r5,0xff00;         /* convert LR to exc # */       \
 151         stw     %r3, FRAME_XER+8(1);    /* save xer/ctr/exc */          \
 152         stw     %r4, FRAME_CTR+8(1);                                    \
 153         stw     %r5, FRAME_EXC+8(1);                                    \
 154         stw     %r28,FRAME_DAR+8(1);                                    \
 155         stw     %r29,FRAME_DSISR+8(1);  /* save dsisr/srr0/srr1 */      \
 156         stw     %r30,FRAME_SRR0+8(1);                                   \
 157         stw     %r31,FRAME_SRR1+8(1)
 158
 159 #define FRAME_LEAVE(savearea)                                           \
 160 /* Now restore regs: */                                                 \
 161         lwz     %r2,FRAME_SRR0+8(%r1);                                  \
 162         lwz     %r3,FRAME_SRR1+8(%r1);                                  \
 163         lwz     %r4,FRAME_CTR+8(%r1);                                   \
 164         lwz     %r5,FRAME_XER+8(%r1);                                   \
 165         lwz     %r6,FRAME_LR+8(%r1);                                    \
 166         GET_CPUINFO(%r7);                                               \
 167         stw     %r2,(savearea+CPUSAVE_SRR0)(%r7); /* save SRR0 */       \
 168         stw     %r3,(savearea+CPUSAVE_SRR1)(%r7); /* save SRR1 */       \
 169         lwz     %r7,FRAME_CR+8(%r1);                                    \
 170         mtctr   %r4;                                                    \
 171         mtxer   %r5;                                                    \
 172         mtlr    %r6;                                                    \
 173         mtsprg1 %r7;                    /* save cr */                   \
 174         lwz     %r31,FRAME_31+8(%r1);   /* restore r0-31 */             \
 175         lwz     %r30,FRAME_30+8(%r1);                                   \
 176         lwz     %r29,FRAME_29+8(%r1);                                   \
 177         lwz     %r28,FRAME_28+8(%r1);                                   \
 178         lwz     %r27,FRAME_27+8(%r1);                                   \
 179         lwz     %r26,FRAME_26+8(%r1);                                   \
 180         lwz     %r25,FRAME_25+8(%r1);                                   \
 181         lwz     %r24,FRAME_24+8(%r1);                                   \
 182         lwz     %r23,FRAME_23+8(%r1);                                   \
 183         lwz     %r22,FRAME_22+8(%r1);                                   \
 184         lwz     %r21,FRAME_21+8(%r1);                                   \
 185         lwz     %r20,FRAME_20+8(%r1);                                   \
 186         lwz     %r19,FRAME_19+8(%r1);                                   \
 187         lwz     %r18,FRAME_18+8(%r1);                                   \
 188         lwz     %r17,FRAME_17+8(%r1);                                   \
 189         lwz     %r16,FRAME_16+8(%r1);                                   \
 190         lwz     %r15,FRAME_15+8(%r1);                                   \
 191         lwz     %r14,FRAME_14+8(%r1);                                   \
 192         lwz     %r13,FRAME_13+8(%r1);                                   \
 193         lwz     %r12,FRAME_12+8(%r1);                                   \
 194         lwz     %r11,FRAME_11+8(%r1);                                   \
 195         lwz     %r10,FRAME_10+8(%r1);                                   \
 196         lwz     %r9, FRAME_9+8(%r1);                                    \
 197         lwz     %r8, FRAME_8+8(%r1);                                    \
 198         lwz     %r7, FRAME_7+8(%r1);                                    \
 199         lwz     %r6, FRAME_6+8(%r1);                                    \
 200         lwz     %r5, FRAME_5+8(%r1);                                    \
 201         lwz     %r4, FRAME_4+8(%r1);                                    \
 202         lwz     %r3, FRAME_3+8(%r1);                                    \
 203         lwz     %r2, FRAME_2+8(%r1);                                    \
 204         lwz     %r0, FRAME_0+8(%r1);                                    \
 205         lwz     %r1, FRAME_1+8(%r1);                                    \
 206 /* Can't touch %r1 from here on */                                      \
 207         mtsprg2 %r2;                    /* save r2 & r3 */              \
 208         mtsprg3 %r3;                                                    \
 209 /* Disable translation, machine check and recoverability: */            \
 210         mfmsr   %r2;                                                    \
 211         andi.   %r2,%r2,~(PSL_DR|PSL_IR|PSL_EE|PSL_ME|PSL_RI)@l;        \
 212         mtmsr   %r2;                                                    \
 213         isync;                                                          \
 214 /* Decide whether we return to user mode: */                            \
 215         GET_CPUINFO(%r2);                                               \
 216         lwz     %r3,(savearea+CPUSAVE_SRR1)(%r2);                       \
 217         mtcr    %r3;                                                    \
 218         bf      17,1f;                  /* branch if PSL_PR is false */ \
 219 /* Restore user SRs */                                                  \
 220         RESTORE_USER_SRS(%r2,%r3);                                      \
 221 1:      mfsprg1 %r2;                    /* restore cr */                \
 222         mtcr    %r2;                                                    \
 223         GET_CPUINFO(%r2);                                               \
 224         lwz     %r3,(savearea+CPUSAVE_SRR0)(%r2); /* restore srr0 */    \
 225         mtsrr0  %r3;                                                    \
 226         lwz     %r3,(savearea+CPUSAVE_SRR1)(%r2); /* restore srr1 */    \
 227         mtsrr1  %r3;                                                    \
 228         mfsprg2 %r2;                    /* restore r2 & r3 */           \
 229         mfsprg3 %r3
 230
 231 #ifdef KDB
 232 /*
 233  * Define the kdb debugger stack
 234  */
 235         .data
 236 GLOBAL(dbstk)
 237         .space INTSTK+8                 /* kdb stack */
 238 #endif
 239
 240 /*
 241  * This code gets copied to all the trap vectors
 242  * (except ISI/DSI, ALI, and the interrupts)
 243  */
 244         .text
 245         .globl  CNAME(trapcode),CNAME(trapsize)
 246 CNAME(trapcode):
 247         mtsprg1 %r1                     /* save SP */
 248         GET_CPUINFO(%r1)
 249         stw     %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)     /* free r28-r31 */
 250         stw     %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
 251         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
 252         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
 253         mfsprg1 %r1                     /* restore SP, in case of branch */
 254         mflr    %r28                    /* save LR */
 255         mfcr    %r29                    /* save CR */
 256 /* Test whether we already had PR set */
 257         mfsrr1  %r31
 258         mtcr    %r31
 259         bla     s_trap                  /* LR & 0xff00 is exception # */
 260 CNAME(trapsize) = .-CNAME(trapcode)
 261
 262 /*
 263  * For ALI: has to save DSISR and DAR
 264  */
 265         .globl  CNAME(alitrap),CNAME(alisize)
 266 CNAME(alitrap):
 267         mtsprg1 %r1                     /* save SP */
 268         GET_CPUINFO(%r1)
 269         stw     %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)     /* free r28-r31 */
 270         stw     %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
 271         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
 272         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
 273         mfdar   %r30
 274         mfdsisr %r31
 275         stw     %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
 276         stw     %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
 277         mfsprg1 %r1                     /* restore SP, in case of branch */
 278         mflr    %r28                    /* save LR */
 279         mfcr    %r29                    /* save CR */
 280 /* Test whether we already had PR set */
 281         mfsrr1  %r31
 282         mtcr    %r31
 283         bla     s_trap                  /* LR & 0xff00 is exception # */
 284 CNAME(alisize) = .-CNAME(alitrap)
 285
 286 /*
 287  * Similar to the above for DSI
 288  * Has to handle BAT spills
 289  * and standard pagetable spills
 290  */
 291         .globl  CNAME(dsitrap),CNAME(dsisize)
 292 CNAME(dsitrap):
 293         mtsprg1 %r1                     /* save SP */
 294         GET_CPUINFO(%r1)
 295         stw     %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1)     /* free r28-r31 */
 296         stw     %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
 297         stw     %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
 298         stw     %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
 299         mfsprg1 %r1                     /* restore SP */
 300         mfcr    %r29                    /* save CR */
 301         mfxer   %r30                    /* save XER */
 302         mtsprg2 %r30                    /* in SPRG2 */
 303         mfsrr1  %r31                    /* test kernel mode */
 304         mtcr    %r31
 305         bt      17,1f                   /* branch if PSL_PR is set */
 306         mfdar   %r31                    /* get fault address */
 307         rlwinm  %r31,%r31,7,25,28       /* get segment * 8 */
 308
 309         /* get batu */
 310         addis   %r31,%r31,CNAME(battable)@ha
 311         lwz     %r30,CNAME(battable)@l(31)
 312         mtcr    %r30
 313         bf      30,1f                   /* branch if supervisor valid is
 314                                            false */
 315         /* get batl */
 316         lwz     %r31,CNAME(battable)+4@l(31)
 317 /* We randomly use the highest two bat registers here */
 318         mftb    %r28
 319         andi.   %r28,%r28,1
 320         bne     2f
 321         mtdbatu 2,%r30
 322         mtdbatl 2,%r31
 323         b       3f
 324 2:
 325         mtdbatu 3,%r30
 326         mtdbatl 3,%r31
 327 3:
 328         mfsprg2 %r30                    /* restore XER */
 329         mtxer   %r30
 330         mtcr    %r29                    /* restore CR */
 331         mtsprg1 %r1
 332         GET_CPUINFO(%r1)
 333         lwz     %r28,(PC_DISISAVE+CPUSAVE_R28)(%r1)     /* restore r28-r31 */
 334         lwz     %r29,(PC_DISISAVE+CPUSAVE_R29)(%r1)
 335         lwz     %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
 336         lwz     %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
 337         mfsprg1 %r1
 338         rfi                             /* return to trapped code */
 339 1:
 340         mflr    %r28                    /* save LR (SP already saved) */
 341         bla     disitrap
 342 CNAME(dsisize) = .-CNAME(dsitrap)
 343
 344 /*
 345  * Preamble code for DSI/ISI traps
 346  */
 347 disitrap:
 348         GET_CPUINFO(%r1)
 349         lwz     %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1)
 350         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
 351         lwz     %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1)
 352         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
 353         lwz     %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1)
 354         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
 355         lwz     %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1)
 356         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
 357         mfdar   %r30
 358         mfdsisr %r31
 359         stw     %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1)
 360         stw     %r31,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1)
 361
 362 #ifdef KDB
 363         /* Try and detect a kernel stack overflow */
 364         mfsrr1  %r31
 365         mtcr    %r31
 366         bt      17,realtrap             /* branch is user mode */
 367         mfsprg1 %r31                    /* get old SP */
 368         sub.    %r30,%r31,%r30          /* SP - DAR */
 369         bge     1f
 370         neg     %r30,%r30               /* modulo value */
 371 1:      cmplwi  %cr0,%r30,4096          /* is DAR within a page of SP? */
 372         bge     %cr0,realtrap           /* no, too far away. */
 373
 374         /* Now convert this DSI into a DDB trap.  */
 375         GET_CPUINFO(%r1)
 376         lwz     %r30,(PC_TEMPSAVE+CPUSAVE_DAR)(%r1) /* get DAR */
 377         stw     %r30,(PC_DBSAVE  +CPUSAVE_DAR)(%r1) /* save DAR */
 378         lwz     %r30,(PC_TEMPSAVE+CPUSAVE_DSISR)(%r1) /* get DSISR */
 379         lwz     %r30,(PC_DBSAVE  +CPUSAVE_DSISR)(%r1) /* save DSISR */
 380         lwz     %r30,(PC_DISISAVE+CPUSAVE_R28)(%r1) /* get  r28 */
 381         stw     %r30,(PC_DBSAVE  +CPUSAVE_R28)(%r1) /* save r28 */
 382         lwz     %r31,(PC_DISISAVE+CPUSAVE_R29)(%r1) /* get  r29 */
 383         stw     %r31,(PC_DBSAVE  +CPUSAVE_R29)(%r1) /* save r29 */
 384         lwz     %r30,(PC_DISISAVE+CPUSAVE_R30)(%r1) /* get  r30 */
 385         stw     %r30,(PC_DBSAVE  +CPUSAVE_R30)(%r1) /* save r30 */
 386         lwz     %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) /* get  r31 */
 387         stw     %r31,(PC_DBSAVE  +CPUSAVE_R31)(%r1) /* save r31 */
 388         lis     %r1,dbstk+INTSTK@ha     /* get new SP */
 389         addi    %r1,%r1,dbstk+INTSTK@l
 390         b       dbtrap
 391 #endif
 392
 393         /* XXX need stack probe here */
 394 realtrap:
 395 /* Test whether we already had PR set */
 396         mfsrr1  %r1
 397         mtcr    %r1
 398         mfsprg1 %r1                     /* restore SP (might have been
 399                                            overwritten) */
 400 s_trap:
 401         bf      17,k_trap               /* branch if PSL_PR is false */
 402         GET_CPUINFO(%r1)
 403 u_trap:
 404         lwz     %r1,PC_CURPCB(%r1)
 405         RESTORE_KERN_SRS(%r30,%r31)     /* enable kernel mapping */
 406
 407 /*
 408  * Now the common trap catching code.
 409  */
 410 k_trap:
 411         FRAME_SETUP(PC_TEMPSAVE)
 412 /* Call C interrupt dispatcher: */
 413 trapagain:
 414         addi    %r3,%r1,8
 415         bl      CNAME(powerpc_interrupt)
 416         .globl  CNAME(trapexit)         /* backtrace code sentinel */
 417 CNAME(trapexit):
 418
 419 /* Disable interrupts: */
 420         mfmsr   %r3
 421         andi.   %r3,%r3,~PSL_EE@l
 422         mtmsr   %r3
 423 /* Test AST pending: */
 424         lwz     %r5,FRAME_SRR1+8(%r1)
 425         mtcr    %r5
 426         bf      17,1f                   /* branch if PSL_PR is false */
 427
 428         GET_CPUINFO(%r3)                /* get per-CPU pointer */
 429         lwz     %r4, PC_CURTHREAD(%r3)  /* deref to get curthread */
 430         lwz     %r4, TD_FLAGS(%r4)      /* get thread flags value */
 431         lis     %r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@h
 432         ori     %r5,%r5, (TDF_ASTPENDING|TDF_NEEDRESCHED)@l
 433         and.    %r4,%r4,%r5
 434         beq     1f
 435         mfmsr   %r3                     /* re-enable interrupts */
 436         ori     %r3,%r3,PSL_EE@l
 437         mtmsr   %r3
 438         isync
 439         addi    %r3,%r1,8
 440         bl      CNAME(ast)
 441         .globl  CNAME(asttrapexit)      /* backtrace code sentinel #2 */
 442 CNAME(asttrapexit):
 443         b       trapexit                /* test ast ret value ? */
 444 1:
 445         FRAME_LEAVE(PC_TEMPSAVE)
 446         rfi
 447
 448 /*
 449  *     Temporary: vector-unavailable traps are directed to vector-assist traps
 450  */
 451         .globl  CNAME(vectrap),CNAME(vectrapsize)
 452 CNAME(vectrap):
 453         ba      EXC_VECAST
 454 CNAME(vectrapsize) = .-CNAME(vectrap)
 455
 456 #if defined(KDB)
 457 /*
 458  * Deliberate entry to dbtrap
 459  */
 460         .globl  CNAME(ppc_db_trap)
 461 CNAME(ppc_db_trap):
 462         mtsprg1 %r1
 463         mfmsr   %r3
 464         mtsrr1  %r3
 465         andi.   %r3,%r3,~(PSL_EE|PSL_ME)@l
 466         mtmsr   %r3                     /* disable interrupts */
 467         isync
 468         GET_CPUINFO(%r3)
 469         stw     %r28,(PC_DBSAVE+CPUSAVE_R28)(%r3)
 470         stw     %r29,(PC_DBSAVE+CPUSAVE_R29)(%r3)
 471         stw     %r30,(PC_DBSAVE+CPUSAVE_R30)(%r3)
 472         stw     %r31,(PC_DBSAVE+CPUSAVE_R31)(%r3)
 473         mflr    %r28
 474         li      %r29,EXC_BPT
 475         mtlr    %r29
 476         mfcr    %r29
 477         mtsrr0  %r28
 478
 479 /*
 480  * Now the kdb trap catching code.
 481  */
 482 dbtrap:
 483         FRAME_SETUP(PC_DBSAVE)
 484 /* Call C trap code: */
 485         addi    %r3,%r1,8
 486         bl      CNAME(db_trap_glue)
 487         or.     %r3,%r3,%r3
 488         bne     dbleave
 489 /* This wasn't for KDB, so switch to real trap: */
 490         lwz     %r3,FRAME_EXC+8(%r1)    /* save exception */
 491         GET_CPUINFO(%r4)
 492         stw     %r3,(PC_DBSAVE+CPUSAVE_R31)(%r4)
 493         FRAME_LEAVE(PC_DBSAVE)
 494         mtsprg1 %r1                     /* prepare for entrance to realtrap */
 495         GET_CPUINFO(%r1)
 496         stw     %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)
 497         stw     %r29,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)
 498         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)
 499         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)
 500         mflr    %r28
 501         mfcr    %r29
 502         lwz     %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1)
 503         mtlr    %r31
 504         mfsprg1 %r1
 505         b       realtrap
 506 dbleave:
 507         FRAME_LEAVE(PC_DBSAVE)
 508         rfi
 509
 510 /*
 511  * In case of KDB we want a separate trap catcher for it
 512  */
 513         .globl  CNAME(dblow),CNAME(dbsize)
 514 CNAME(dblow):
 515         mtsprg1 %r1                     /* save SP */
 516         mtsprg2 %r29                    /* save r29 */
 517         mfcr    %r29                    /* save CR in r29 */
 518         mfsrr1  %r1
 519         mtcr    %r1
 520         GET_CPUINFO(%r1)
 521         bf      17,1f                   /* branch if privileged */
 522         stw     %r28,(PC_TEMPSAVE+CPUSAVE_R28)(%r1)     /* free r28 */
 523         mfsprg2 %r28                            /* r29 holds cr ... */
 524         stw     %r28,(PC_TEMPSAVE+CPUSAVE_R29)(%r1)     /* free r29 */
 525         stw     %r30,(PC_TEMPSAVE+CPUSAVE_R30)(%r1)     /* free r30 */
 526         stw     %r31,(PC_TEMPSAVE+CPUSAVE_R31)(%r1)     /* free r31 */
 527         mflr    %r28                                    /* save LR */
 528         bla     u_trap
 529 1:
 530         stw     %r28,(PC_DBSAVE+CPUSAVE_R28)(%r1)       /* free r28 */
 531         mfsprg2 %r28                            /* r29 holds cr...  */
 532         stw     %r28,(PC_DBSAVE+CPUSAVE_R29)(%r1)       /* free r29 */
 533         stw     %r30,(PC_DBSAVE+CPUSAVE_R30)(%r1)       /* free r30 */
 534         stw     %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1)       /* free r31 */
 535         mflr    %r28                                    /* save LR */
 536         lis     %r1,dbstk+INTSTK@ha     /* get new SP */
 537         addi    %r1,%r1,dbstk+INTSTK@l
 538         bla     dbtrap
 539 CNAME(dbsize) = .-CNAME(dblow)
 540 #endif /* KDB */