1 /* $NetBSD: fpu_arith.h,v 1.4 2005/12/24 20:07:28 perry Exp $ */
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43 * @(#)fpu_arith.h 8.1 (Berkeley) 6/11/93
47 * Extended-precision arithmetic.
49 * We hold the notion of a `carry register', which may or may not be a
50 * machine carry bit or register. On the SPARC, it is just the machine's
53 * In the worst case, you can compute the carry from x+y as
54 * (unsigned)(x + y) < (unsigned)x
56 * ((unsigned)(x + y + c) <= (unsigned)x && (y|c) != 0)
62 /* set up for extended-precision arithemtic */
63 #define FPU_DECL_CARRY quad_t fpu_carry, fpu_tmp;
66 * We have three kinds of add:
67 * add with carry: r = x + y + c
68 * add (ignoring current carry) and set carry: c'r = x + y + 0
69 * add with carry and set carry: c'r = x + y + c
70 * The macros use `C' for `use carry' and `S' for `set carry'.
71 * Note that the state of the carry is undefined after ADDC and SUBC,
72 * so if all you have for these is `add with carry and set carry',
75 * The same goes for subtract, except that we compute x - y - c.
77 * Finally, we have a way to get the carry into a `regular' variable,
78 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
79 * into carry; GET_CARRY sets its argument to 0 or 1.
81 #define FPU_ADDC(r, x, y) \
82 (r) = (x) + (y) + (!!fpu_carry)
83 #define FPU_ADDS(r, x, y) \
85 fpu_tmp = (quad_t)(x) + (quad_t)(y); \
86 (r) = (u_int)fpu_tmp; \
87 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
89 #define FPU_ADDCS(r, x, y) \
91 fpu_tmp = (quad_t)(x) + (quad_t)(y) + (!!fpu_carry); \
92 (r) = (u_int)fpu_tmp; \
93 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
95 #define FPU_SUBC(r, x, y) \
96 (r) = (x) - (y) - (!!fpu_carry)
97 #define FPU_SUBS(r, x, y) \
99 fpu_tmp = (quad_t)(x) - (quad_t)(y); \
100 (r) = (u_int)fpu_tmp; \
101 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
103 #define FPU_SUBCS(r, x, y) \
105 fpu_tmp = (quad_t)(x) - (quad_t)(y) - (!!fpu_carry); \
106 (r) = (u_int)fpu_tmp; \
107 fpu_carry = ((fpu_tmp & 0xffffffff00000000LL) != 0); \
110 #define FPU_GET_CARRY(r) (r) = (!!fpu_carry)
111 #define FPU_SET_CARRY(v) fpu_carry = ((v) != 0)
114 /* set up for extended-precision arithemtic */
115 #define FPU_DECL_CARRY
118 * We have three kinds of add:
119 * add with carry: r = x + y + c
120 * add (ignoring current carry) and set carry: c'r = x + y + 0
121 * add with carry and set carry: c'r = x + y + c
122 * The macros use `C' for `use carry' and `S' for `set carry'.
123 * Note that the state of the carry is undefined after ADDC and SUBC,
124 * so if all you have for these is `add with carry and set carry',
127 * The same goes for subtract, except that we compute x - y - c.
129 * Finally, we have a way to get the carry into a `regular' variable,
130 * or set it from a value. SET_CARRY turns 0 into no-carry, nonzero
131 * into carry; GET_CARRY sets its argument to 0 or 1.
133 #define FPU_ADDC(r, x, y) \
134 __asm volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
135 #define FPU_ADDS(r, x, y) \
136 __asm volatile("addc %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
137 #define FPU_ADDCS(r, x, y) \
138 __asm volatile("adde %0,%1,%2" : "=r"(r) : "r"(x), "r"(y))
139 #define FPU_SUBC(r, x, y) \
140 __asm volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
141 #define FPU_SUBS(r, x, y) \
142 __asm volatile("subfc %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
143 #define FPU_SUBCS(r, x, y) \
144 __asm volatile("subfe %0,%2,%1" : "=r"(r) : "r"(x), "r"(y))
146 #define FPU_GET_CARRY(r) __asm volatile("li %0,0; addie %0,%0,0" : "=r"(r))
147 /* This one needs to destroy a temp register. */
148 #define FPU_SET_CARRY(v) do { int __tmp; \
149 __asm volatile("addic %0,%0,-1" : "r"(__tmp) : "r"(v)); \
152 #define FPU_SHL1_BY_ADD /* shift left 1 faster by ADDC than (a<<1)|(b>>31) */