2 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
7 * NASA Ames Research Center.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the NetBSD
20 * Foundation, Inc. and its contributors.
21 * 4. Neither the name of The NetBSD Foundation nor the names of its
22 * contributors may be used to endorse or promote products derived
23 * from this software without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
39 * Copyright (c) 1996 Charles M. Hannum. All rights reserved.
40 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
42 * Redistribution and use in source and binary forms, with or without
43 * modification, are permitted provided that the following conditions
45 * 1. Redistributions of source code must retain the above copyright
46 * notice, this list of conditions and the following disclaimer.
47 * 2. Redistributions in binary form must reproduce the above copyright
48 * notice, this list of conditions and the following disclaimer in the
49 * documentation and/or other materials provided with the distribution.
50 * 3. All advertising materials mentioning features or use of this software
51 * must display the following acknowledgement:
52 * This product includes software developed by Christopher G. Demetriou
53 * for the NetBSD Project.
54 * 4. The name of the author may not be used to endorse or promote products
55 * derived from this software without specific prior written permission
57 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
61 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
62 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
63 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
64 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
65 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
66 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 * $NetBSD: bus.h,v 1.9.4.1 2000/06/30 16:27:30 simonb Exp $
72 #ifndef _MACPPC_BUS_H_
73 #define _MACPPC_BUS_H_
75 #include <machine/_bus.h>
76 #include <machine/pio.h>
78 #define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
79 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
80 #define BUS_SPACE_MAXSIZE 0xFFFFFFFF
81 #define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
82 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
83 #define BUS_SPACE_MAXADDR 0xFFFFFFFF
85 #define BUS_SPACE_UNRESTRICTED (~0)
88 * Values for the macppc bus space tag, not to be used directly by MI code.
91 #define __BUS_SPACE_HAS_STREAM_METHODS 1
94 * Define the PPC tag values
96 #define PPC_BUS_SPACE_MEM 1 /* space is mem space */
97 #define PPC_BUS_SPACE_IO 2 /* space is io space */
99 static __inline void *
100 __ppc_ba(bus_space_tag_t tag __unused, bus_space_handle_t handle,
103 return ((void *)(handle + offset));
107 * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
108 * bus_size_t size, int flags, bus_space_handle_t *bshp));
110 * Map a region of bus space.
114 bus_space_map(bus_space_tag_t t __unused, bus_addr_t addr,
115 bus_size_t size __unused, int flags __unused,
116 bus_space_handle_t *bshp)
123 * int bus_space_unmap(bus_space_tag_t t,
124 * bus_space_handle_t bsh, bus_size_t size));
126 * Unmap a region of bus space.
130 bus_space_unmap(bus_space_tag_t t __unused, bus_space_handle_t bsh __unused,
131 bus_size_t size __unused)
136 * int bus_space_subregion(bus_space_tag_t t,
137 * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
138 * bus_space_handle_t *nbshp));
140 * Get a new handle for a subregion of an already-mapped area of bus space.
144 bus_space_subregion(bus_space_tag_t t __unused, bus_space_handle_t bsh,
145 bus_size_t offset, bus_size_t size __unused, bus_space_handle_t *nbshp)
147 *nbshp = bsh + offset;
152 * int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
153 * bus_addr_t rend, bus_size_t size, bus_size_t align,
154 * bus_size_t boundary, int flags, bus_addr_t *addrp,
155 * bus_space_handle_t *bshp));
157 * Allocate a region of bus space.
161 #define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) !!! unimplemented !!!
165 * int bus_space_free(bus_space_tag_t t,
166 * bus_space_handle_t bsh, bus_size_t size));
168 * Free a region of bus space.
171 #define bus_space_free(t, h, s) !!! unimplemented !!!
175 * u_intN_t bus_space_read_N(bus_space_tag_t tag,
176 * bus_space_handle_t bsh, bus_size_t offset));
178 * Read a 1, 2, 4, or 8 byte quantity from bus space
179 * described by tag/handle/offset.
182 static __inline u_int8_t
183 bus_space_read_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
185 return (in8(__ppc_ba(t, h, o)));
188 static __inline u_int16_t
189 bus_space_read_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
191 return (in16rb(__ppc_ba(t, h, o)));
194 static __inline u_int32_t
195 bus_space_read_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
197 return (in32rb(__ppc_ba(t, h, o)));
200 #if 0 /* Cause a link error for bus_space_read_8 */
201 #define bus_space_read_8(t, h, o) !!! unimplemented !!!
204 static __inline u_int8_t
205 bus_space_read_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
207 return (in8(__ppc_ba(t, h, o)));
210 static __inline u_int16_t
211 bus_space_read_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
213 return (in16(__ppc_ba(t, h, o)));
216 static __inline u_int32_t
217 bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
219 return (in32(__ppc_ba(t, h, o)));
222 #if 0 /* Cause a link error for bus_space_read_stream_8 */
223 #define bus_space_read_stream_8(t, h, o) !!! unimplemented !!!
227 * void bus_space_read_multi_N(bus_space_tag_t tag,
228 * bus_space_handle_t bsh, bus_size_t offset,
229 * u_intN_t *addr, size_t count));
231 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
232 * described by tag/handle/offset and copy into buffer provided.
236 bus_space_read_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
237 u_int8_t *a, size_t c)
239 ins8(__ppc_ba(t, h, o), a, c);
243 bus_space_read_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
244 u_int16_t *a, size_t c)
246 ins16rb(__ppc_ba(t, h, o), a, c);
250 bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
251 u_int32_t *a, size_t c)
253 ins32rb(__ppc_ba(t, h, o), a, c);
256 #if 0 /* Cause a link error for bus_space_read_multi_8 */
257 #define bus_space_read_multi_8 !!! unimplemented !!!
261 bus_space_read_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
262 bus_size_t o, u_int8_t *a, size_t c)
264 ins8(__ppc_ba(t, h, o), a, c);
268 bus_space_read_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
269 bus_size_t o, u_int16_t *a, size_t c)
271 ins16(__ppc_ba(t, h, o), a, c);
275 bus_space_read_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
276 bus_size_t o, u_int32_t *a, size_t c)
278 ins32(__ppc_ba(t, h, o), a, c);
281 #if 0 /* Cause a link error for bus_space_read_multi_stream_8 */
282 #define bus_space_read_multi_stream_8 !!! unimplemented !!!
286 * void bus_space_read_region_N(bus_space_tag_t tag,
287 * bus_space_handle_t bsh, bus_size_t offset,
288 * u_intN_t *addr, size_t count));
290 * Read `count' 1, 2, 4, or 8 byte quantities from bus space
291 * described by tag/handle and starting at `offset' and copy into
296 bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
297 bus_size_t offset, u_int8_t *addr, size_t count)
299 volatile u_int8_t *s = __ppc_ba(tag, bsh, offset);
303 __asm __volatile("eieio; sync");
307 bus_space_read_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
308 bus_size_t offset, u_int16_t *addr, size_t count)
310 volatile u_int16_t *s = __ppc_ba(tag, bsh, offset);
313 __asm __volatile("lhbrx %0, 0, %1" :
314 "=r"(*addr++) : "r"(s++));
315 __asm __volatile("eieio; sync");
319 bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
320 bus_size_t offset, u_int32_t *addr, size_t count)
322 volatile u_int32_t *s = __ppc_ba(tag, bsh, offset);
325 __asm __volatile("lwbrx %0, 0, %1" :
326 "=r"(*addr++) : "r"(s++));
327 __asm __volatile("eieio; sync");
330 #if 0 /* Cause a link error for bus_space_read_region_8 */
331 #define bus_space_read_region_8 !!! unimplemented !!!
335 bus_space_read_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
336 bus_size_t offset, u_int16_t *addr, size_t count)
338 volatile u_int16_t *s = __ppc_ba(tag, bsh, offset);
342 __asm __volatile("eieio; sync");
346 bus_space_read_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
347 bus_size_t offset, u_int32_t *addr, size_t count)
349 volatile u_int32_t *s = __ppc_ba(tag, bsh, offset);
353 __asm __volatile("eieio; sync");
356 #if 0 /* Cause a link error */
357 #define bus_space_read_region_stream_8 !!! unimplemented !!!
361 * void bus_space_write_N(bus_space_tag_t tag,
362 * bus_space_handle_t bsh, bus_size_t offset,
365 * Write the 1, 2, 4, or 8 byte value `value' to bus space
366 * described by tag/handle/offset.
370 bus_space_write_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
373 out8(__ppc_ba(t, h, o), v);
377 bus_space_write_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
380 out16rb(__ppc_ba(t, h, o), v);
384 bus_space_write_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
387 out32rb(__ppc_ba(t, h, o), v);
390 #if 0 /* Cause a link error for bus_space_write_8 */
391 #define bus_space_write_8 !!! unimplemented !!!
395 bus_space_write_stream_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
398 out8(__ppc_ba(t, h, o), v);
402 bus_space_write_stream_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
405 out16(__ppc_ba(t, h, o), v);
409 bus_space_write_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
412 out32(__ppc_ba(t, h, o), v);
415 #if 0 /* Cause a link error for bus_space_write_stream_8 */
416 #define bus_space_write_stream_8 !!! unimplemented !!!
421 * void bus_space_write_multi_N(bus_space_tag_t tag,
422 * bus_space_handle_t bsh, bus_size_t offset,
423 * const u_intN_t *addr, size_t count));
425 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
426 * provided to bus space described by tag/handle/offset.
430 bus_space_write_multi_1(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
431 uint8_t *a, size_t c)
433 outsb(__ppc_ba(t, h, o), a, c);
437 bus_space_write_multi_2(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
438 uint16_t *a, size_t c)
440 outsw(__ppc_ba(t, h, o), a, c);
444 bus_space_write_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
445 uint32_t *a, size_t c)
447 outsl(__ppc_ba(t, h, o), a, c);
451 #define bus_space_write_multi_8 !!! unimplemented !!!
455 bus_space_write_multi_stream_1(bus_space_tag_t t, bus_space_handle_t h,
456 bus_size_t o, const u_int8_t *a, size_t c)
458 outsb(__ppc_ba(t, h, o), a, c);
462 bus_space_write_multi_stream_2(bus_space_tag_t t, bus_space_handle_t h,
463 bus_size_t o, const u_int16_t *a, size_t c)
465 outsw(__ppc_ba(t, h, o), a, c);
469 bus_space_write_multi_stream_4(bus_space_tag_t t, bus_space_handle_t h,
470 bus_size_t o, const u_int32_t *a, size_t c)
472 outsl(__ppc_ba(t, h, o), a, c);
476 #define bus_space_write_multi_stream_8 !!! unimplemented !!!
480 * void bus_space_write_region_N(bus_space_tag_t tag,
481 * bus_space_handle_t bsh, bus_size_t offset,
482 * const u_intN_t *addr, size_t count));
484 * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
485 * to bus space described by tag/handle starting at `offset'.
489 bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
490 bus_size_t offset, const u_int8_t *addr, size_t count)
492 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
496 __asm __volatile("eieio; sync");
500 bus_space_write_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
501 bus_size_t offset, const u_int16_t *addr, size_t count)
503 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
506 __asm __volatile("sthbrx %0, 0, %1" ::
507 "r"(*addr++), "r"(d++));
508 __asm __volatile("eieio; sync");
512 bus_space_write_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
513 bus_size_t offset, const u_int32_t *addr, size_t count)
515 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
518 __asm __volatile("stwbrx %0, 0, %1" ::
519 "r"(*addr++), "r"(d++));
520 __asm __volatile("eieio; sync");
524 #define bus_space_write_region_8 !!! bus_space_write_region_8 unimplemented !!!
528 bus_space_write_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
529 bus_size_t offset, const u_int16_t *addr, size_t count)
531 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
535 __asm __volatile("eieio; sync");
539 bus_space_write_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
540 bus_size_t offset, const u_int32_t *addr, size_t count)
542 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
546 __asm __volatile("eieio; sync");
550 #define bus_space_write_region_stream_8 !!! unimplemented !!!
554 * void bus_space_set_multi_N(bus_space_tag_t tag,
555 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
558 * Write the 1, 2, 4, or 8 byte value `val' to bus space described
559 * by tag/handle/offset `count' times.
563 bus_space_set_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
564 bus_size_t offset, u_int8_t val, size_t count)
566 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
570 __asm __volatile("eieio; sync");
574 bus_space_set_multi_2(bus_space_tag_t tag, bus_space_handle_t bsh,
575 bus_size_t offset, u_int16_t val, size_t count)
577 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
580 __asm __volatile("sthbrx %0, 0, %1" ::
582 __asm __volatile("eieio; sync");
586 bus_space_set_multi_4(bus_space_tag_t tag, bus_space_handle_t bsh,
587 bus_size_t offset, u_int32_t val, size_t count)
589 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
592 __asm __volatile("stwbrx %0, 0, %1" ::
594 __asm __volatile("eieio; sync");
598 #define bus_space_set_multi_8 !!! bus_space_set_multi_8 unimplemented !!!
602 bus_space_set_multi_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
603 bus_size_t offset, u_int16_t val, size_t count)
605 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
609 __asm __volatile("eieio; sync");
613 bus_space_set_multi_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
614 bus_size_t offset, u_int32_t val, size_t count)
616 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
620 __asm __volatile("eieio; sync");
624 #define bus_space_set_multi_stream_8 !!! unimplemented !!!
628 * void bus_space_set_region_N(bus_space_tag_t tag,
629 * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
632 * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
633 * by tag/handle starting at `offset'.
637 bus_space_set_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
638 bus_size_t offset, u_int8_t val, size_t count)
640 volatile u_int8_t *d = __ppc_ba(tag, bsh, offset);
644 __asm __volatile("eieio; sync");
648 bus_space_set_region_2(bus_space_tag_t tag, bus_space_handle_t bsh,
649 bus_size_t offset, u_int16_t val, size_t count)
651 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
654 __asm __volatile("sthbrx %0, 0, %1" ::
656 __asm __volatile("eieio; sync");
660 bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
661 bus_size_t offset, u_int32_t val, size_t count)
663 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
666 __asm __volatile("stwbrx %0, 0, %1" ::
668 __asm __volatile("eieio; sync");
672 #define bus_space_set_region_8 !!! bus_space_set_region_8 unimplemented !!!
676 bus_space_set_region_stream_2(bus_space_tag_t tag, bus_space_handle_t bsh,
677 bus_size_t offset, u_int16_t val, size_t count)
679 volatile u_int16_t *d = __ppc_ba(tag, bsh, offset);
683 __asm __volatile("eieio; sync");
687 bus_space_set_region_stream_4(bus_space_tag_t tag, bus_space_handle_t bsh,
688 bus_size_t offset, u_int32_t val, size_t count)
690 volatile u_int32_t *d = __ppc_ba(tag, bsh, offset);
694 __asm __volatile("eieio; sync");
698 #define bus_space_set_region_stream_8 !!! unimplemented !!!
702 * void bus_space_copy_region_N(bus_space_tag_t tag,
703 * bus_space_handle_t bsh1, bus_size_t off1,
704 * bus_space_handle_t bsh2, bus_size_t off2,
707 * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
708 * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
711 /* XXX IMPLEMENT bus_space_copy_N() XXX */
714 * Bus read/write barrier methods.
716 * void bus_space_barrier(bus_space_tag_t tag,
717 * bus_space_handle_t bsh, bus_size_t offset,
718 * bus_size_t len, int flags));
720 * Note: the macppc does not currently require barriers, but we must
721 * provide the flags to MI code.
724 #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
725 #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
728 bus_space_barrier(bus_space_tag_t tag __unused,
729 bus_space_handle_t bsh __unused, bus_size_t offset __unused,
730 bus_size_t len __unused, int flags __unused)
732 __asm __volatile("" : : : "memory");
736 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
738 #include <machine/bus_dma.h>
740 #endif /* _MACPPC_BUS_H_ */