2 * Copyright (c) 2000 Tsubai Masanari. All rights reserved.
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
24 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * $NetBSD: hid.h,v 1.2 2001/08/22 21:05:25 matt Exp $
30 #ifndef _POWERPC_HID_H_
31 #define _POWERPC_HID_H_
33 /* Hardware Implementation Dependent registers for the PowerPC */
35 #define HID0_EMCP 0x80000000 /* Enable MCP */
36 #define HID0_DBP 0x40000000 /* Disable 60x bus parity generation */
37 #define HID0_EBA 0x20000000 /* Enable 60x bus address parity checking */
38 #define HID0_EBD 0x10000000 /* Enable 60x bus data parity checking */
39 #define HID0_BCLK 0x08000000 /* CLK_OUT clock type selection */
40 #define HID0_EICE 0x04000000 /* Enable ICE output */
41 #define HID0_TBEN 0x04000000 /* Time base enable (7450) */
42 #define HID0_ECLK 0x02000000 /* CLK_OUT clock type selection */
43 #define HID0_PAR 0x01000000 /* Disable precharge of ARTRY */
44 #define HID0_STEN 0x01000000 /* Software table search enable (7450) */
45 #define HID0_HBATEN 0x00800000 /* High BAT enable (74[45][578]) */
46 #define HID0_DOZE 0x00800000 /* Enable doze mode */
47 #define HID0_NAP 0x00400000 /* Enable nap mode */
48 #define HID0_SLEEP 0x00200000 /* Enable sleep mode */
49 #define HID0_DPM 0x00100000 /* Enable Dynamic power management */
50 #define HID0_RISEG 0x00080000 /* Read I-SEG */
51 #define HID0_BHTCLR 0x00040000 /* Clear branch history table (7450) */
52 #define HID0_EIEC 0x00040000 /* Enable internal error checking */
53 #define HID0_XAEN 0x00020000 /* Enable eXtended Addressing (7450) */
54 #define HID0_NHR 0x00010000 /* Not hard reset */
55 #define HID0_ICE 0x00008000 /* Enable i-cache */
56 #define HID0_DCE 0x00004000 /* Enable d-cache */
57 #define HID0_ILOCK 0x00002000 /* i-cache lock */
58 #define HID0_DLOCK 0x00001000 /* d-cache lock */
59 #define HID0_ICFI 0x00000800 /* i-cache flush invalidate */
60 #define HID0_DCFI 0x00000400 /* d-cache flush invalidate */
61 #define HID0_SPD 0x00000200 /* Disable speculative cache access */
62 #define HID0_XBSEN 0x00000100 /* Extended BAT block-size enable (7457) */
63 #define HID0_IFEM 0x00000100 /* Enable M-bit for I-fetch */
64 #define HID0_XBSEN 0x00000100 /* Extended BAT block size enable (7455+)*/
65 #define HID0_SGE 0x00000080 /* Enable store gathering */
66 #define HID0_DCFA 0x00000040 /* Data cache flush assist */
67 #define HID0_BTIC 0x00000020 /* Enable BTIC */
68 #define HID0_LRSTK 0x00000010 /* Link register stack enable (7450) */
69 #define HID0_ABE 0x00000008 /* Enable address broadcast */
70 #define HID0_FOLD 0x00000008 /* Branch folding enable (7450) */
71 #define HID0_BHT 0x00000004 /* Enable branch history table */
72 #define HID0_NOPTI 0x00000001 /* No-op the dcbt(st) */
74 #define HID0_BITMASK \
76 "\040EMCP\037DBP\036EBA\035EBD\034BCLK\033EICE\032ECLK\031PAR" \
77 "\030DOZE\027NAP\026SLEEP\025DPM\024RISEG\023EIEC\022res\021NHR" \
78 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011IFEM" \
79 "\010SGE\007DCFA\006BTIC\005FBIOB\004ABE\003BHT\002NOPDST\001NOPTI"
81 #define HID0_7450_BITMASK \
83 "\040EMCP\037b1\036b2\035b3\034b4\033TBEN\032b6\031STEN" \
84 "\030HBATEN\027NAP\026SLEEP\025DPM\024b12\023BHTCLR\022XAEN\021NHR" \
85 "\020ICE\017DCE\016ILOCK\015DLOCK\014ICFI\013DCFI\012SPD\011XBSEN" \
86 "\010SGE\007b25\006BTIC\005LRSTK\004FOLD\003BHT\002NOPDST\001NOPTI"
89 * HID0 bit definitions per cpu model
91 * bit 603 604 750 7400 7410 7450 7457
92 * 0 EMCP EMCP EMCP EMCP EMCP - -
94 * 2 EBA EBA EBA EBA EDA - -
95 * 3 EBD EBD EBD EBD EBD - -
96 * 4 SBCLK - BCLK BCKL BCLK - -
97 * 5 EICE - - - - TBEN TBEN
98 * 6 ECLK - ECLK ECLK ECLK - -
99 * 7 PAR PAR PAR PAR PAR STEN STEN
100 * 8 DOZE - DOZE DOZE DOZE - HBATEN
101 * 9 NAP - NAP NAP NAP NAP NAP
102 * 10 SLEEP - SLEEP SLEEP SLEEP SLEEP SLEEP
103 * 11 DPM - DPM DPM DPM DPM DPM
104 * 12 RISEG - - RISEG - - -
105 * 13 - - - EIEC EIEC BHTCLR BHTCLR
106 * 14 - - - - - XAEN XAEN
107 * 15 - NHR NHR NHR NHR NHR NHR
108 * 16 ICE ICE ICE ICE ICE ICE ICE
109 * 17 DCE DCE DCE DCE DCE DCE DCE
110 * 18 ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK ILOCK
111 * 19 DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK DLOCK
112 * 20 ICFI ICFI ICFI ICFI ICFI ICFI ICFI
113 * 21 DCFI DCFI DCFI DCFI DCFI DCFI DCFI
114 * 22 - - SPD SPD SPG SPD SPD
115 * 23 - - IFEM IFTT IFTT - XBSEN
116 * 24 - SIE SGE SGE SGE SGE SGE
117 * 25 - - DCFA DCFA DCFA - -
118 * 26 - - BTIC BTIC BTIC BTIC BTIC
119 * 27 FBIOB - - - - LRSTK LRSTK
120 * 28 - - ABE - - FOLD FOLD
121 * 29 - BHT BHT BHT BHT BHT BHT
122 * 30 - - - NOPDST NOPDST NOPDST NOPDST
123 * 31 NOOPTI - NOOPTI NOPTI NOPTI NOPTI NOPTI
125 * 604: ECP = Enable cache parity checking
126 * 604: SIE = Serial instruction execution disable
127 * 7450: TBEN = Time Base Enable
128 * 7450: STEN = Software table lookup enable
129 * 7450: BHTCLR = Branch history clear
130 * 7450: XAEN = Extended Addressing Enabled
131 * 7450: LRSTK = Link Register Stack Enable
132 * 7450: FOLD = Branch folding enable
133 * 7457: HBATEN = High BAT Enable
134 * 7457: XBSEN = Extended BAT Block Size Enable
137 #endif /* _POWERPC_HID_H_ */