2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2005 Peter Grehan
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8 * modification, are permitted provided that the following conditions
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31 #ifndef _MACHINE_MMUVAR_H_
32 #define _MACHINE_MMUVAR_H_
35 * A PowerPC MMU implementation is declared with a kernel object and
36 * an associated method table. The MMU_DEF macro is used to declare
37 * the class, and also links it to the global MMU class list.
41 * static mmu_method_t ppc8xx_methods[] = {
42 * MMUMETHOD(mmu_change_wiring, ppc8xx_mmu_change_wiring),
43 * MMUMETHOD(mmu_clear_modify, ppc8xx_mmu_clear_modify),
44 * MMUMETHOD(mmu_clear_reference, ppc8xx_mmu_clear_reference),
46 * MMUMETHOD(mmu_dev_direct_mapped, ppc8xx_mmu_dev_direct_mapped),
50 * MMU_DEF(ppc8xx, MMU_TYPE_8xx, ppc8xx_methods, sizeof(ppc8xx_mmu_softc));
52 * A single level of inheritance is supported in a similar fashion to
53 * kobj inheritance e.g.
55 * MMU_DEF_1(ppc860c, MMU_TYPE_860c, ppc860c_methods, 0, ppc8xx);
62 * An MMU instance is a kernel object
67 * Utility elements that an instance may use
69 struct mtx mmu_mtx; /* available for instance use */
70 void *mmu_iptr; /* instance data pointer */
73 * Opaque data that can be overlaid with an instance-private
74 * structure. MMU code can test that this is large enough at
75 * compile time with a sizeof() test againt it's softc. There
76 * is also a run-time test when the MMU kernel object is
79 #define MMU_OPAQUESZ 64
80 u_int mmu_opaque[MMU_OPAQUESZ];
83 typedef struct mmu_kobj *mmu_t;
84 typedef struct kobj_class mmu_def_t;
85 #define mmu_method_t kobj_method_t
87 #define MMUMETHOD KOBJMETHOD
89 #define MMU_DEF(name, ident, methods, size) \
92 ident, methods, size, NULL \
94 DATA_SET(mmu_set, name)
96 #define MMU_DEF_INHERIT(name, ident, methods, size, base1) \
98 static kobj_class_t name ## _baseclasses[] = \
101 ident, methods, size, name ## _baseclasses \
103 DATA_SET(mmu_set, name)
108 ident, methods, size, name ## _baseclasses \
110 DATA_SET(mmu_set, name)
116 #define MMU_TYPE_BOOKE "mmu_booke" /* Book-E MMU specification */
117 #define MMU_TYPE_OEA "mmu_oea" /* 32-bit OEA */
118 #define MMU_TYPE_G5 "mmu_g5" /* 64-bit bridge (ibm 970) */
119 #define MMU_TYPE_RADIX "mmu_radix" /* 64-bit native ISA 3.0 (POWER9) radix */
120 #define MMU_TYPE_8xx "mmu_8xx" /* 8xx quicc TLB */
122 #endif /* _MACHINE_MMUVAR_H_ */