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1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
5  * Copyright (c) Peter Wemm <peter@netplex.com.au>
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * $FreeBSD$
30  */
31
32 #ifndef _MACHINE_PCPU_H_
33 #define _MACHINE_PCPU_H_
34
35 #include <machine/cpufunc.h>
36 #include <machine/slb.h>
37 #include <machine/tlb.h>
38
39 struct pmap;
40 struct pvo_entry;
41 #define CPUSAVE_LEN     9
42
43 #define PCPU_MD_COMMON_FIELDS                                           \
44         int             pc_inside_intr;                                 \
45         struct pmap     *pc_curpmap;            /* current pmap */      \
46         struct thread   *pc_fputhread;          /* current fpu user */  \
47         struct thread   *pc_vecthread;          /* current vec user */  \
48         uintptr_t       pc_hwref;                                       \
49         int             pc_bsp;                                         \
50         volatile int    pc_awake;                                       \
51         uint32_t        pc_ipimask;                                     \
52         register_t      pc_tempsave[CPUSAVE_LEN];                       \
53         register_t      pc_disisave[CPUSAVE_LEN];                       \
54         register_t      pc_dbsave[CPUSAVE_LEN];                         \
55         void            *pc_restore;                                    \
56         vm_offset_t     pc_qmap_addr;
57
58 #define PCPU_MD_AIM32_FIELDS                                            \
59         struct pvo_entry *qmap_pvo;                                     \
60         struct mtx      qmap_lock;                                      \
61         char            __pad[128];
62
63 #define PCPU_MD_AIM64_FIELDS                                            \
64         struct slb      slb[64];                                        \
65         struct slb      **userslb;                                      \
66         register_t      slbsave[18];                                    \
67         uint8_t         slbstack[1024];                         \
68         struct pvo_entry *qmap_pvo;                                     \
69         struct mtx      qmap_lock;                                      \
70         char            __pad[1345];
71
72 #ifdef __powerpc64__
73 #define PCPU_MD_AIM_FIELDS      PCPU_MD_AIM64_FIELDS
74 #else
75 #define PCPU_MD_AIM_FIELDS      PCPU_MD_AIM32_FIELDS
76 #endif
77
78 #define BOOKE_CRITSAVE_LEN      (CPUSAVE_LEN + 2)
79 #define BOOKE_TLB_MAXNEST       3
80 #define BOOKE_TLB_SAVELEN       16
81 #define BOOKE_TLBSAVE_LEN       (BOOKE_TLB_SAVELEN * BOOKE_TLB_MAXNEST)
82
83 #ifdef __powerpc64__
84 #define BOOKE_PCPU_PAD  901
85 #else
86 #define BOOKE_PCPU_PAD  429
87 #endif
88 #define PCPU_MD_BOOKE_FIELDS                                            \
89         register_t      critsave[BOOKE_CRITSAVE_LEN];           \
90         register_t      mchksave[CPUSAVE_LEN];                  \
91         register_t      tlbsave[BOOKE_TLBSAVE_LEN];             \
92         register_t      tlb_level;                              \
93         uintptr_t       *tlb_lock;                              \
94         int             tid_next;                                       \
95         char            __pad[BOOKE_PCPU_PAD];
96
97 /* Definitions for register offsets within the exception tmp save areas */
98 #define CPUSAVE_R27     0               /* where r27 gets saved */
99 #define CPUSAVE_R28     1               /* where r28 gets saved */
100 #define CPUSAVE_R29     2               /* where r29 gets saved */
101 #define CPUSAVE_R30     3               /* where r30 gets saved */
102 #define CPUSAVE_R31     4               /* where r31 gets saved */
103 #define CPUSAVE_AIM_DAR         5       /* where SPR_DAR gets saved */
104 #define CPUSAVE_AIM_DSISR       6       /* where SPR_DSISR gets saved */
105 #define CPUSAVE_BOOKE_DEAR      5       /* where SPR_DEAR gets saved */
106 #define CPUSAVE_BOOKE_ESR       6       /* where SPR_ESR gets saved */
107 #define CPUSAVE_SRR0    7               /* where SRR0 gets saved */
108 #define CPUSAVE_SRR1    8               /* where SRR1 gets saved */
109 #define BOOKE_CRITSAVE_SRR0     9       /* where real SRR0 gets saved (critical) */
110 #define BOOKE_CRITSAVE_SRR1     10      /* where real SRR0 gets saved (critical) */
111
112 /* Book-E TLBSAVE is more elaborate */
113 #define TLBSAVE_BOOKE_LR        0
114 #define TLBSAVE_BOOKE_CR        1
115 #define TLBSAVE_BOOKE_SRR0      2
116 #define TLBSAVE_BOOKE_SRR1      3
117 #define TLBSAVE_BOOKE_R20       4
118 #define TLBSAVE_BOOKE_R21       5
119 #define TLBSAVE_BOOKE_R22       6
120 #define TLBSAVE_BOOKE_R23       7
121 #define TLBSAVE_BOOKE_R24       8
122 #define TLBSAVE_BOOKE_R25       9
123 #define TLBSAVE_BOOKE_R26       10
124 #define TLBSAVE_BOOKE_R27       11
125 #define TLBSAVE_BOOKE_R28       12
126 #define TLBSAVE_BOOKE_R29       13
127 #define TLBSAVE_BOOKE_R30       14
128 #define TLBSAVE_BOOKE_R31       15
129
130 #define PCPU_MD_FIELDS          \
131         PCPU_MD_COMMON_FIELDS   \
132         union {                 \
133             struct {            \
134                 PCPU_MD_AIM_FIELDS      \
135             } pc_aim;           \
136             struct {            \
137                 PCPU_MD_BOOKE_FIELDS    \
138             } pc_booke;         \
139         }
140
141 #ifdef _KERNEL
142
143 #define pcpup   (get_pcpu())
144
145 static __inline __pure2 struct thread *
146 __curthread(void)
147 {
148         struct thread *td;
149 #ifdef __powerpc64__
150         __asm __volatile("mr %0,13" : "=r"(td));
151 #else
152         __asm __volatile("mr %0,2" : "=r"(td));
153 #endif
154         return (td);
155 }
156 #define curthread (__curthread())
157
158 #define PCPU_GET(member)        (pcpup->pc_ ## member)
159
160 /*
161  * XXX The implementation of this operation should be made atomic
162  * with respect to preemption.
163  */
164 #define PCPU_ADD(member, value) (pcpup->pc_ ## member += (value))
165 #define PCPU_INC(member)        PCPU_ADD(member, 1)
166 #define PCPU_PTR(member)        (&pcpup->pc_ ## member)
167 #define PCPU_SET(member,value)  (pcpup->pc_ ## member = (value))
168
169 #endif  /* _KERNEL */
170
171 #endif  /* !_MACHINE_PCPU_H_ */